OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [config/] [arc/] [arc-protos.h] - Blame information for rev 298

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 282 jeremybenn
/* Definitions of target machine for GNU compiler, Argonaut ARC cpu.
2
   Copyright (C) 2000, 2004, 2007 Free Software Foundation, Inc.
3
 
4
This file is part of GCC.
5
 
6
GCC is free software; you can redistribute it and/or modify
7
it under the terms of the GNU General Public License as published by
8
the Free Software Foundation; either version 3, or (at your option)
9
any later version.
10
 
11
GCC is distributed in the hope that it will be useful,
12
but WITHOUT ANY WARRANTY; without even the implied warranty of
13
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14
GNU General Public License for more details.
15
 
16
You should have received a copy of the GNU General Public License
17
along with GCC; see the file COPYING3.  If not see
18
<http://www.gnu.org/licenses/>.  */
19
 
20
#ifdef RTX_CODE
21
extern enum machine_mode arc_select_cc_mode (enum rtx_code, rtx, rtx);
22
 
23
/* Define the function that build the compare insn for scc and bcc.  */
24
extern struct rtx_def *gen_compare_reg (enum rtx_code, rtx, rtx);
25
#endif
26
 
27
/* Declarations for various fns used in the .md file.  */
28
extern const char *output_shift (rtx *);
29
 
30
extern int symbolic_operand (rtx, enum machine_mode);
31
extern int arc_double_limm_p (rtx);
32
extern int arc_eligible_for_epilogue_delay (rtx, int);
33
extern void arc_initialize_trampoline (rtx, rtx, rtx);
34
extern void arc_print_operand (FILE *, rtx, int);
35
extern void arc_print_operand_address (FILE *, rtx);
36
extern void arc_final_prescan_insn (rtx, rtx *, int);
37
extern int call_address_operand (rtx, enum machine_mode);
38
extern int call_operand (rtx, enum machine_mode);
39
extern int symbolic_memory_operand (rtx, enum machine_mode);
40
extern int short_immediate_operand (rtx, enum machine_mode);
41
extern int long_immediate_operand (rtx, enum machine_mode);
42
extern int long_immediate_loadstore_operand (rtx, enum machine_mode);
43
extern int move_src_operand (rtx, enum machine_mode);
44
extern int move_double_src_operand (rtx, enum machine_mode);
45
extern int move_dest_operand (rtx, enum machine_mode);
46
extern int load_update_operand (rtx, enum machine_mode);
47
extern int store_update_operand (rtx, enum machine_mode);
48
extern int nonvol_nonimm_operand (rtx, enum machine_mode);
49
extern int const_sint32_operand (rtx, enum machine_mode);
50
extern int const_uint32_operand (rtx, enum machine_mode);
51
extern int proper_comparison_operator (rtx, enum machine_mode);
52
extern int shift_operator (rtx, enum machine_mode);
53
 
54
extern enum arc_function_type arc_compute_function_type (tree);
55
 
56
 
57
extern void arc_init (void);
58
extern unsigned int arc_compute_frame_size (int);
59
extern void arc_save_restore (FILE *, const char *, unsigned int,
60
                              unsigned int, const char *);
61
extern int arc_delay_slots_for_epilogue (void);
62
extern void arc_ccfsm_at_label (const char *, int);
63
extern int arc_ccfsm_branch_deleted_p (void);
64
extern void arc_ccfsm_record_branch_deleted (void);

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.