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jeremybenn |
; Options for the ARM port of the compiler.
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; Copyright (C) 2005, 2007, 2008 Free Software Foundation, Inc.
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;
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; This file is part of GCC.
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;
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; GCC is free software; you can redistribute it and/or modify it under
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; the terms of the GNU General Public License as published by the Free
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; Software Foundation; either version 3, or (at your option) any later
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; version.
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;
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; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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; WARRANTY; without even the implied warranty of MERCHANTABILITY or
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; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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; for more details.
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;
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; You should have received a copy of the GNU General Public License
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; along with GCC; see the file COPYING3. If not see
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; .
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mabi=
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Target RejectNegative Joined Var(target_abi_name)
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Specify an ABI
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mabort-on-noreturn
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Target Report Mask(ABORT_NORETURN)
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Generate a call to abort if a noreturn function returns
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mapcs
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Target RejectNegative Mask(APCS_FRAME) MaskExists Undocumented
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mapcs-float
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Target Report Mask(APCS_FLOAT)
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Pass FP arguments in FP registers
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mapcs-frame
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Target Report Mask(APCS_FRAME)
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Generate APCS conformant stack frames
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mapcs-reentrant
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Target Report Mask(APCS_REENT)
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Generate re-entrant, PIC code
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mapcs-stack-check
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Target Report Mask(APCS_STACK) Undocumented
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march=
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Target RejectNegative Joined
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Specify the name of the target architecture
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marm
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Target RejectNegative InverseMask(THUMB) Undocumented
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mbig-endian
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Target Report RejectNegative Mask(BIG_END)
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Assume target CPU is configured as big endian
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mcallee-super-interworking
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Target Report Mask(CALLEE_INTERWORKING)
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Thumb: Assume non-static functions may be called from ARM code
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mcaller-super-interworking
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Target Report Mask(CALLER_INTERWORKING)
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Thumb: Assume function pointers may go to non-Thumb aware code
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mcirrus-fix-invalid-insns
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Target Report Mask(CIRRUS_FIX_INVALID_INSNS)
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Cirrus: Place NOPs to avoid invalid instruction combinations
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mcpu=
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Target RejectNegative Joined
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Specify the name of the target CPU
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mfloat-abi=
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Target RejectNegative Joined Var(target_float_abi_name)
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Specify if floating point hardware should be used
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mfp=
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Target RejectNegative Joined Undocumented Var(target_fpe_name)
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mfp16-format=
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Target RejectNegative Joined Var(target_fp16_format_name)
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Specify the __fp16 floating-point format
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;; Now ignored.
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mfpe
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Target RejectNegative Mask(FPE) Undocumented
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mfpe=
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Target RejectNegative Joined Undocumented Var(target_fpe_name)
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mfpu=
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Target RejectNegative Joined Var(target_fpu_name)
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Specify the name of the target floating point hardware/format
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mhard-float
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Target RejectNegative
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Alias for -mfloat-abi=hard
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mlittle-endian
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Target Report RejectNegative InverseMask(BIG_END)
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Assume target CPU is configured as little endian
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mlong-calls
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Target Report Mask(LONG_CALLS)
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Generate call insns as indirect calls, if necessary
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mpic-register=
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Target RejectNegative Joined Var(arm_pic_register_string)
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Specify the register to be used for PIC addressing
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mpoke-function-name
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Target Report Mask(POKE_FUNCTION_NAME)
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Store function names in object code
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msched-prolog
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Target Report Mask(SCHED_PROLOG)
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Permit scheduling of a function's prologue sequence
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msingle-pic-base
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Target Report Mask(SINGLE_PIC_BASE)
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Do not load the PIC register in function prologues
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msoft-float
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Target RejectNegative
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Alias for -mfloat-abi=soft
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mstructure-size-boundary=
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Target RejectNegative Joined Var(structure_size_string)
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Specify the minimum bit alignment of structures
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mthumb
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Target Report Mask(THUMB)
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Compile for the Thumb not the ARM
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mthumb-interwork
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Target Report Mask(INTERWORK)
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Support calls between Thumb and ARM instruction sets
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mtp=
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Target RejectNegative Joined Var(target_thread_switch)
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Specify how to access the thread pointer
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mtpcs-frame
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Target Report Mask(TPCS_FRAME)
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Thumb: Generate (non-leaf) stack frames even if not needed
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mtpcs-leaf-frame
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Target Report Mask(TPCS_LEAF_FRAME)
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Thumb: Generate (leaf) stack frames even if not needed
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mtune=
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Target RejectNegative Joined
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Tune code for the given processor
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mwords-little-endian
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Target Report RejectNegative Mask(LITTLE_WORDS)
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Assume big endian bytes, little endian words
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mvectorize-with-neon-quad
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Target Report Mask(NEON_VECTORIZE_QUAD)
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Use Neon quad-word (rather than double-word) registers for vectorization
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mword-relocations
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Target Report Var(target_word_relocations) Init(TARGET_DEFAULT_WORD_RELOCATIONS)
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Only generate absolute relocations on word sized values.
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mfix-cortex-m3-ldrd
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Target Report Var(fix_cm3_ldrd) Init(2)
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Avoid overlapping destination and address registers on LDRD instructions
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that may trigger Cortex-M3 errata.
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