OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [config/] [bfin/] [bfin.opt] - Blame information for rev 282

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 282 jeremybenn
; Options for the Blackfin port of the compiler
2
;
3
; Copyright (C) 2005, 2007, 2008 Free Software Foundation, Inc.
4
;
5
; This file is part of GCC.
6
;
7
; GCC is free software; you can redistribute it and/or modify it under
8
; the terms of the GNU General Public License as published by the Free
9
; Software Foundation; either version 3, or (at your option) any later
10
; version.
11
;
12
; GCC is distributed in the hope that it will be useful, but WITHOUT
13
; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14
; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
15
; License for more details.
16
;
17
; You should have received a copy of the GNU General Public License
18
; along with GCC; see the file COPYING3.  If not see
19
; .
20
 
21
msim
22
Target RejectNegative
23
Use simulator runtime
24
 
25
mcpu=
26
Target RejectNegative Joined
27
Specify the name of the target CPU
28
 
29
momit-leaf-frame-pointer
30
Target Report Mask(OMIT_LEAF_FRAME_POINTER)
31
Omit frame pointer for leaf functions
32
 
33
mlow64k
34
Target Report Mask(LOW_64K)
35
Program is entirely located in low 64k of memory
36
 
37
mcsync-anomaly
38
Target Report Var(bfin_csync_anomaly) Init(-1)
39
Work around a hardware anomaly by adding a number of NOPs before a
40
CSYNC or SSYNC instruction.
41
 
42
mspecld-anomaly
43
Target Report Var(bfin_specld_anomaly) Init(-1)
44
Avoid speculative loads to work around a hardware anomaly.
45
 
46
mid-shared-library
47
Target Report Mask(ID_SHARED_LIBRARY)
48
Enabled ID based shared library
49
 
50
mleaf-id-shared-library
51
Target Report Mask(LEAF_ID_SHARED_LIBRARY)
52
Generate code that won't be linked against any other ID shared libraries,
53
but may be used as a shared library.
54
 
55
mshared-library-id=
56
Target RejectNegative Joined UInteger Var(bfin_library_id)
57
ID of shared library to build
58
 
59
msep-data
60
Target Report Mask(SEP_DATA)
61
Enable separate data segment
62
 
63
mlong-calls
64
Target Report Mask(LONG_CALLS)
65
Avoid generating pc-relative calls; use indirection
66
 
67
mfast-fp
68
Target Report Mask(FAST_FP)
69
Link with the fast floating-point library
70
 
71
mfdpic
72
Target Report Mask(FDPIC)
73
Enable Function Descriptor PIC mode
74
 
75
minline-plt
76
Target Report Mask(INLINE_PLT)
77
Enable inlining of PLT in function calls
78
 
79
mstack-check-l1
80
Target Report Mask(STACK_CHECK_L1)
81
Do stack checking using bounds in L1 scratch memory
82
 
83
mmulticore
84
Target Report Mask(MULTICORE)
85
Enable multicore support
86
 
87
mcorea
88
Target Report Mask(COREA)
89
Build for Core A
90
 
91
mcoreb
92
Target Report Mask(COREB)
93
Build for Core B
94
 
95
msdram
96
Target Report Mask(SDRAM)
97
Build for SDRAM
98
 
99
micplb
100
Target Report Mask(ICPLB)
101
Assume ICPLBs are enabled at runtime.

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.