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[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [config/] [bfin/] [lib1funcs.asm] - Blame information for rev 290

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1 282 jeremybenn
/* libgcc functions for Blackfin.
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   Copyright (C) 2005, 2009 Free Software Foundation, Inc.
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   Contributed by Analog Devices.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GCC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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GNU General Public License for more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
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.  */
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#ifdef L_divsi3
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.text
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.align 2
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.global ___divsi3;
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.type ___divsi3, STT_FUNC;
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___divsi3:
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        [--SP]= RETS;
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        [--SP] = R7;
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        R2 = -R0;
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        CC = R0 < 0;
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        IF CC R0 = R2;
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        R7 = CC;
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        R2 = -R1;
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        CC = R1 < 0;
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        IF CC R1 = R2;
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        R2 = CC;
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        R7 = R7 ^ R2;
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        CALL ___udivsi3;
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        CC = R7;
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        R1 = -R0;
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        IF CC R0 = R1;
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        R7 = [SP++];
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        RETS = [SP++];
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        RTS;
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#endif
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#ifdef L_modsi3
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.align 2
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.global ___modsi3;
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.type ___modsi3, STT_FUNC;
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___modsi3:
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        [--SP] = RETS;
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        [--SP] = R0;
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        [--SP] = R1;
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        CALL ___divsi3;
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        R2 = [SP++];
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        R1 = [SP++];
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        R2 *= R0;
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        R0 = R1 - R2;
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        RETS = [SP++];
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        RTS;
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#endif
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#ifdef L_udivsi3
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.align 2
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.global ___udivsi3;
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.type ___udivsi3, STT_FUNC;
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___udivsi3:
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        P0 = 32;
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        LSETUP (0f, 1f) LC0 = P0;
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        /* upper half of dividend */
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        R3 = 0;
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0:
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        /* The first time round in the loop we shift in garbage, but since we
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           perform 33 shifts, it doesn't matter.  */
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        R0 = ROT R0 BY 1;
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        R3 = ROT R3 BY 1;
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        R2 = R3 - R1;
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        CC = R3 < R1 (IU);
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1:
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        /* Last instruction of the loop.  */
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        IF ! CC R3 = R2;
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        /* Shift in the last bit.  */
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        R0 = ROT R0 BY 1;
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        /* R0 is the result, R3 contains the remainder.  */
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        R0 = ~ R0;
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        RTS;
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#endif
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#ifdef L_umodsi3
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.align 2
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.global ___umodsi3;
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.type ___umodsi3, STT_FUNC;
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___umodsi3:
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        [--SP] = RETS;
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        CALL ___udivsi3;
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        R0 = R3;
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        RETS = [SP++];
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        RTS;
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#endif
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#ifdef L_umulsi3_highpart
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.align 2
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.global ___umulsi3_highpart;
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.type ___umulsi3_highpart, STT_FUNC;
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___umulsi3_highpart:
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        A1 = R1.L * R0.L (FU);
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        A1 = A1 >> 16;
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        A0 = R1.H * R0.H, A1 += R1.L * R0.H (FU);
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        A1 += R0.L * R1.H (FU);
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        A1 = A1 >> 16;
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        A0 += A1;
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        R0 = A0 (FU);
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        RTS;
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#endif
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#ifdef L_smulsi3_highpart
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.align 2
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.global ___smulsi3_highpart;
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.type ___smulsi3_highpart, STT_FUNC;
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___smulsi3_highpart:
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        A1 = R1.L * R0.L (FU);
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        A1 = A1 >> 16;
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        A0 = R0.H * R1.H, A1 += R0.H * R1.L (IS,M);
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        A1 += R1.H * R0.L (IS,M);
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        A1 = A1 >>> 16;
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        R0 = (A0 += A1);
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        RTS;
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#endif

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