OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [config/] [frv/] [frv-modes.def] - Blame information for rev 303

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 282 jeremybenn
/* Definitions of target machine for GNU compiler for FRV.
2
   Copyright (C) 2002, 2004, 2007 Free Software Foundation, Inc.
3
 
4
This file is part of GCC.
5
 
6
GCC is free software; you can redistribute it and/or modify
7
it under the terms of the GNU General Public License as published by
8
the Free Software Foundation; either version 3, or (at your option)
9
any later version.
10
 
11
GCC is distributed in the hope that it will be useful,
12
but WITHOUT ANY WARRANTY; without even the implied warranty of
13
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14
GNU General Public License for more details.
15
 
16
You should have received a copy of the GNU General Public License
17
along with GCC; see the file COPYING3.  If not see
18
.  */
19
 
20
/* On the FRV, the CC modes used are:
21
 
22
   CCmode       set ICCs from comparing signed integers
23
   CC_UNSmode   set ICCs from comparing unsigned integers
24
   CC_NZmode    set ICCs for comparisons that just need the Z and N flags
25
   CC_FPmode    set FCCs from comparing floating point
26
   CC_CCRmode   set CCRs to do conditional execution */
27
 
28
CC_MODE (CC_UNS);
29
CC_MODE (CC_NZ);
30
CC_MODE (CC_FP);
31
CC_MODE (CC_CCR);
32
 
33
VECTOR_MODE (INT, QI, 4);     /*                 V4QI */
34
VECTOR_MODE (INT, SI, 4);     /*                 V4SI */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.