OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [config/] [i386/] [ia32intrin.h] - Blame information for rev 282

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 282 jeremybenn
/* Copyright (C) 2009 Free Software Foundation, Inc.
2
 
3
   This file is part of GCC.
4
 
5
   GCC is free software; you can redistribute it and/or modify
6
   it under the terms of the GNU General Public License as published by
7
   the Free Software Foundation; either version 3, or (at your option)
8
   any later version.
9
 
10
   GCC is distributed in the hope that it will be useful,
11
   but WITHOUT ANY WARRANTY; without even the implied warranty of
12
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13
   GNU General Public License for more details.
14
 
15
   Under Section 7 of GPL version 3, you are granted additional
16
   permissions described in the GCC Runtime Library Exception, version
17
   3.1, as published by the Free Software Foundation.
18
 
19
   You should have received a copy of the GNU General Public License and
20
   a copy of the GCC Runtime Library Exception along with this program;
21
   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
22
   <http://www.gnu.org/licenses/>.  */
23
 
24
#ifndef _X86INTRIN_H_INCLUDED
25
# error "Never use <ia32intrin.h> directly; include <x86intrin.h> instead."
26
#endif
27
 
28
/* 32bit bsf */
29
extern __inline int
30
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
31
__bsfd (int __X)
32
{
33
  return __builtin_ctz (__X);
34
}
35
 
36
/* 32bit bsr */
37
extern __inline int
38
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
39
__bsrd (int __X)
40
{
41
  return __builtin_ia32_bsrsi (__X);
42
}
43
 
44
/* 32bit bswap */
45
extern __inline int
46
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
47
__bswapd (int __X)
48
{
49
  return __builtin_bswap32 (__X);
50
}
51
 
52
#ifdef __SSE4_2__
53
/* 32bit accumulate CRC32 (polynomial 0x11EDC6F41) value.  */
54
extern __inline unsigned int
55
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
56
__crc32b (unsigned int __C, unsigned char __V)
57
{
58
  return __builtin_ia32_crc32qi (__C, __V);
59
}
60
 
61
extern __inline unsigned int
62
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
63
__crc32w (unsigned int __C, unsigned short __V)
64
{
65
  return __builtin_ia32_crc32hi (__C, __V);
66
}
67
 
68
extern __inline unsigned int
69
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
70
__crc32d (unsigned int __C, unsigned int __V)
71
{
72
  return __builtin_ia32_crc32si (__C, __V);
73
}
74
#endif /* SSE4.2 */
75
 
76
/* 32bit popcnt */
77
extern __inline int
78
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
79
__popcntd (unsigned int __X)
80
{
81
  return __builtin_popcount (__X);
82
}
83
 
84
/* rdpmc */
85
extern __inline unsigned long long
86
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
87
__rdpmc (int __S)
88
{
89
  return __builtin_ia32_rdpmc (__S);
90
}
91
 
92
/* rdtsc */
93
extern __inline unsigned long long
94
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
95
__rdtsc (void)
96
{
97
  return __builtin_ia32_rdtsc ();
98
}
99
 
100
/* rdtscp */
101
extern __inline unsigned long long
102
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
103
__rdtscp (unsigned int *__A)
104
{
105
  return __builtin_ia32_rdtscp (__A);
106
}
107
 
108
/* 8bit rol */
109
extern __inline unsigned char
110
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
111
__rolb (unsigned char __X, int __C)
112
{
113
  return __builtin_ia32_rolqi (__X, __C);
114
}
115
 
116
/* 16bit rol */
117
extern __inline unsigned short
118
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
119
__rolw (unsigned short __X, int __C)
120
{
121
  return __builtin_ia32_rolhi (__X, __C);
122
}
123
 
124
/* 32bit rol */
125
extern __inline unsigned int
126
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
127
__rold (unsigned int __X, int __C)
128
{
129
  return (__X << __C) | (__X >> (32 - __C));
130
}
131
 
132
/* 8bit ror */
133
extern __inline unsigned char
134
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
135
__rorb (unsigned char __X, int __C)
136
{
137
  return __builtin_ia32_rorqi (__X, __C);
138
}
139
 
140
/* 16bit ror */
141
extern __inline unsigned short
142
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
143
__rorw (unsigned short __X, int __C)
144
{
145
  return __builtin_ia32_rorhi (__X, __C);
146
}
147
 
148
/* 32bit ror */
149
extern __inline unsigned int
150
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
151
__rord (unsigned int __X, int __C)
152
{
153
  return (__X >> __C) | (__X << (32 - __C));
154
}
155
 
156
#ifdef __x86_64__
157
/* 64bit bsf */
158
extern __inline int
159
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
160
__bsfq (long long __X)
161
{
162
  return __builtin_ctzll (__X);
163
}
164
 
165
/* 64bit bsr */
166
extern __inline int
167
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
168
__bsrq (long long __X)
169
{
170
  return __builtin_ia32_bsrdi (__X);
171
}
172
 
173
/* 64bit bswap */
174
extern __inline long long
175
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
176
__bswapq (long long __X)
177
{
178
  return __builtin_bswap64 (__X);
179
}
180
 
181
#ifdef __SSE4_2__
182
/* 64bit accumulate CRC32 (polynomial 0x11EDC6F41) value.  */
183
extern __inline unsigned long long
184
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
185
__crc32q (unsigned long long __C, unsigned long long __V)
186
{
187
  return __builtin_ia32_crc32di (__C, __V);
188
}
189
#endif
190
 
191
/* 64bit popcnt */
192
extern __inline long long
193
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
194
__popcntq (unsigned long long __X)
195
{
196
  return __builtin_popcountll (__X);
197
}
198
 
199
/* 64bit rol */
200
extern __inline unsigned long long
201
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
202
__rolq (unsigned long long __X, int __C)
203
{
204
  return (__X << __C) | (__X >> (64 - __C));
205
}
206
 
207
/* 64bit ror */
208
extern __inline unsigned long long
209
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
210
__rorq (unsigned long long __X, int __C)
211
{
212
  return (__X >> __C) | (__X << (64 - __C));
213
}
214
 
215
#define _bswap64(a)             __bswapq(a)
216
#define _popcnt64(a)            __popcntq(a)
217
#define _lrotl(a,b)             __rolq((a), (b))
218
#define _lrotr(a,b)             __rorq((a), (b))
219
#else
220
#define _lrotl(a,b)             __rold((a), (b))
221
#define _lrotr(a,b)             __rord((a), (b))
222
#endif
223
 
224
#define _bit_scan_forward(a)    __bsfd(a)
225
#define _bit_scan_reverse(a)    __bsrd(a)
226
#define _bswap(a)               __bswapd(a)
227
#define _popcnt32(a)            __popcntd(a)
228
#define _rdpmc(a)               __rdpmc(a)
229
#define _rdtsc()                __rdtsc()
230
#define _rdtscp(a)              __rdtscp(a)
231
#define _rotwl(a,b)             __rolw((a), (b))
232
#define _rotwr(a,b)             __rorw((a), (b))
233
#define _rotl(a,b)              __rold((a), (b))
234
#define _rotr(a,b)              __rord((a), (b))

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.