OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [config/] [m32c/] [m32c-modes.def] - Blame information for rev 282

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 282 jeremybenn
/* Target-Specific Modes for R8C/M16C/M32C
2
   Copyright (C) 2005, 2007
3
   Free Software Foundation, Inc.
4
   Contributed by Red Hat.
5
 
6
   This file is part of GCC.
7
 
8
   GCC is free software; you can redistribute it and/or modify it
9
   under the terms of the GNU General Public License as published
10
   by the Free Software Foundation; either version 3, or (at your
11
   option) any later version.
12
 
13
   GCC is distributed in the hope that it will be useful, but WITHOUT
14
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
16
   License for more details.
17
 
18
   You should have received a copy of the GNU General Public License
19
   along with GCC; see the file COPYING3.  If not see
20
   .  */
21
 
22
/* 24-bit pointers, whole */
23
/*INT_MODE (PI, 3);*/
24
 
25
/* 24-bit pointers, in 32-bit units */
26
PARTIAL_INT_MODE (SI);
27
 
28
/* 48-bit MULEX result */
29
/* INT_MODE (MI, 6); */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.