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[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [config/] [m32r/] [constraints.md] - Blame information for rev 433

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1 282 jeremybenn
;; Constraint definitions for Renesas M32R cpu for GNU C compiler
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;; Copyright (C) 2007 Free Software Foundation, Inc.
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;;
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;; This file is part of GCC.
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;;
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;; GCC is free software; you can redistribute it and/or modify it
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;; under the terms of the GNU General Public License as published
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;; by the Free Software Foundation; either version 3, or (at your
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;; option) any later version.
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;; GCC is distributed in the hope that it will be useful, but WITHOUT
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;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
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;; License for more details.
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;;
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;; You should have received a copy of the GNU General Public License
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;; along with GCC; see the file COPYING3.  If not see
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;; .
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;; The letters I, J, K, L, M, N, O, P in a register constraint string
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;; can be used to stand for particular ranges of immediate operands.
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;; The letters Q, R, S, T, U are used to segregate specific types of
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;; operands, usually memory references, for the target machine.
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;;
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;; I is used for 8-bit signed immediates.
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;; J is used for 16-bit signed immediates.
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;; K is used for 16-bit unsigned immediates.
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;; L is used for 16-bit immediates left shifted by 16 (sign ???).
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;; M is used for 24-bit unsigned immediates.
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;; N is used for 8-bit signed immediates for compares
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;;   (values in the range -127 to +128).
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;; O is used for 5-bit unsigned immediates (shift count).
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;; P is used for 16-bit signed immediates for compares
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;;     (values in the range -32767 to +32768).
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;;
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;; Q is for symbolic addresses loadable with ld24.
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;; R is for symbolic addresses when ld24 can't be used.
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;; S is for stores with pre {inc,dec}rement
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;; T is for indirect of a pointer.
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;; U is for loads with post increment.
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;; W is used for an immediate value of 0.
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;;
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;; Register constraints
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(define_register_constraint "a" "ACCUM_REGS"
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  "@internal")
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(define_register_constraint "c" "CARRY_REG"
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  "@internal")
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;; Integer constraints
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(define_constraint "I"
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  "8-bit signed immediate."
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  (and (match_code "const_int")
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       (match_test "ival >= -0x80 && ival <= 0x7f")))
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(define_constraint "J"
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  "16-bit signed immediate."
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  (and (match_code "const_int")
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       (match_test "ival >= -0x8000 && ival <= 0x7fff")))
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(define_constraint "K"
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  "16-bit unsigned immediate."
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  (and (match_code "const_int")
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       (match_test "(unsigned HOST_WIDE_INT) ival <= 0x0000ffff")))
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(define_constraint "L"
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  "16-bit signed immediate left shifted by 16."
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  (and (match_code "const_int")
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       (match_test "(ival & 0xffff) == 0")
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       (match_test "(ival >> 16) >= -0x8000 && (ival >> 16) <= 0x7fff")))
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(define_constraint "M"
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  "24-bit unsigned immediate."
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  (and (match_code "const_int")
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       (match_test "(unsigned HOST_WIDE_INT) ival <= 0x00ffffff")))
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(define_constraint "N"
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  "8-bit signed immediate for compare."
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  (and (match_code "const_int")
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       (match_test "ival >= -127 && ival <= 128")))
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(define_constraint "O"
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  "5-bit unsigned immediate."
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  (and (match_code "const_int")
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       (match_test "ival >= 0 && ival < 32")))
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(define_constraint "P"
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  "16-bit signed immediate for compare."
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  (and (match_code "const_int")
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       (match_test "ival >= -0x7fff && ival <= 0x8000")))
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;; Floating-point constraints
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(define_constraint "G"
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  "Double constant loadable with 2 ldi insns."
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  (and (match_code "const_double")
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       (match_test "easy_di_const (op)")))
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(define_constraint "H"
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  "Double constant loadable with movdf."
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  (and (match_code "const_double")
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       (match_test "easy_df_const (op)")))
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;; Extra constraints
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(define_constraint "Q"
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  "A symbolic address loadable when ld24."
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  (ior (and (match_test "TARGET_ADDR24")
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            (match_test "GET_CODE (op) == LABEL_REF"))
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       (match_test "addr24_operand (op, VOIDmode)")))
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(define_constraint "R"
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  "A symbolic address loadable with ld24 can't be used."
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  (ior (and (match_test "TARGET_ADDR32")
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            (match_test "GET_CODE (op) == LABEL_REF"))
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       (match_test "addr32_operand (op, VOIDmode)")))
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(define_constraint "S"
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  "A store with pre {inc,dec}rement."
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  (and (match_code "mem")
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       (match_test "STORE_PREINC_PREDEC_P (GET_MODE (op), XEXP (op, 0))")))
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(define_constraint "T"
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  "An indirect of a pointer."
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  (and (match_code "mem")
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       (match_test "memreg_operand (op, GET_MODE (op))")))
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(define_constraint "U"
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  "A load with post increment."
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  (and (match_code "mem")
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       (match_test "LOAD_POSTINC_P (GET_MODE (op), XEXP (op, 0))")))
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(define_constraint "W"
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  "zero immediate."
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  (and (match_code "const_int")
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       (match_test "ival == 0")))
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