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1 282 jeremybenn
/* Definitions of target machine for GNU compiler,
2
   for Motorola M*CORE Processor.
3
   Copyright (C) 1993, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007,
4
   2008, 2009 Free Software Foundation, Inc.
5
 
6
   This file is part of GCC.
7
 
8
   GCC is free software; you can redistribute it and/or modify it
9
   under the terms of the GNU General Public License as published
10
   by the Free Software Foundation; either version 3, or (at your
11
   option) any later version.
12
 
13
   GCC is distributed in the hope that it will be useful, but WITHOUT
14
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
16
   License for more details.
17
 
18
   You should have received a copy of the GNU General Public License
19
   along with GCC; see the file COPYING3.  If not see
20
   <http://www.gnu.org/licenses/>.  */
21
 
22
#ifndef GCC_MCORE_H
23
#define GCC_MCORE_H
24
 
25
/* RBE: need to move these elsewhere.  */
26
#undef  LIKE_PPC_ABI 
27
#define MCORE_STRUCT_ARGS
28
/* RBE: end of "move elsewhere".  */
29
 
30
/* Run-time Target Specification.  */
31
#define TARGET_MCORE
32
 
33
/* Get tree.c to declare a target-specific specialization of
34
   merge_decl_attributes.  */
35
#define TARGET_DLLIMPORT_DECL_ATTRIBUTES 1
36
 
37
#define TARGET_CPU_CPP_BUILTINS()                                         \
38
  do                                                                      \
39
    {                                                                     \
40
      builtin_define ("__mcore__");                                       \
41
      builtin_define ("__MCORE__");                                       \
42
      if (TARGET_LITTLE_END)                                              \
43
        builtin_define ("__MCORELE__");                                   \
44
      else                                                                \
45
        builtin_define ("__MCOREBE__");                                   \
46
      if (TARGET_M340)                                                    \
47
        builtin_define ("__M340__");                                      \
48
      else                                                                \
49
        builtin_define ("__M210__");                                      \
50
    }                                                                     \
51
  while (0)
52
 
53
#undef  CPP_SPEC
54
#define CPP_SPEC "%{m210:%{mlittle-endian:%ethe m210 does not have little endian support}}"
55
 
56
/* We don't have a -lg library, so don't put it in the list.  */
57
#undef  LIB_SPEC
58
#define LIB_SPEC "%{!shared: %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}}"
59
 
60
#undef  ASM_SPEC
61
#define ASM_SPEC "%{mbig-endian:-EB} %{m210:-cpu=210 -EB}"
62
 
63
#undef  LINK_SPEC
64
#define LINK_SPEC "%{mbig-endian:-EB} %{m210:-EB} -X"
65
 
66
#define TARGET_DEFAULT  \
67
  (MASK_HARDLIT         \
68
   | MASK_DIV           \
69
   | MASK_RELAX_IMM     \
70
   | MASK_M340          \
71
   | MASK_LITTLE_END)
72
 
73
#ifndef MULTILIB_DEFAULTS
74
#define MULTILIB_DEFAULTS { "mlittle-endian", "m340" }
75
#endif
76
 
77
/* The ability to have 4 byte alignment is being suppressed for now.
78
   If this ability is reenabled, you must disable the definition below
79
   *and* edit t-mcore to enable multilibs for 4 byte alignment code.  */
80
#undef TARGET_8ALIGN
81
#define TARGET_8ALIGN 1
82
 
83
extern char * mcore_current_function_name;
84
 
85
/* The MCore ABI says that bitfields are unsigned by default.  */
86
#define CC1_SPEC "-funsigned-bitfields"
87
 
88
/* What options are we going to default to specific settings when
89
   -O* happens; the user can subsequently override these settings.
90
 
91
   Omitting the frame pointer is a very good idea on the MCore.
92
   Scheduling isn't worth anything on the current MCore implementation.  */
93
#define OPTIMIZATION_OPTIONS(LEVEL,SIZE)        \
94
{                                               \
95
  if (LEVEL)                                    \
96
    {                                           \
97
      flag_no_function_cse = 1;                 \
98
      flag_omit_frame_pointer = 1;              \
99
                                                \
100
      if (LEVEL >= 2)                           \
101
        {                                       \
102
          flag_caller_saves = 0;         \
103
          flag_schedule_insns = 0;               \
104
          flag_schedule_insns_after_reload = 0;  \
105
        }                                       \
106
    }                                           \
107
  if (SIZE)                                     \
108
    {                                           \
109
      target_flags &= ~MASK_HARDLIT;            \
110
    }                                           \
111
}
112
 
113
/* What options are we going to force to specific settings,
114
   regardless of what the user thought he wanted.
115
   We also use this for some post-processing of options.  */
116
#define OVERRIDE_OPTIONS  mcore_override_options ()
117
 
118
/* Target machine storage Layout.  */
119
 
120
#define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE)       \
121
  if (GET_MODE_CLASS (MODE) == MODE_INT         \
122
      && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
123
    {                                           \
124
      (MODE) = SImode;                          \
125
      (UNSIGNEDP) = 1;                          \
126
    }
127
 
128
/* Define this if most significant bit is lowest numbered
129
   in instructions that operate on numbered bit-fields.  */
130
#define BITS_BIG_ENDIAN  0
131
 
132
/* Define this if most significant byte of a word is the lowest numbered.  */
133
#define BYTES_BIG_ENDIAN (! TARGET_LITTLE_END)
134
 
135
/* Define this if most significant word of a multiword number is the lowest
136
   numbered.  */
137
#define WORDS_BIG_ENDIAN (! TARGET_LITTLE_END)
138
 
139
#define LIBGCC2_WORDS_BIG_ENDIAN 1
140
#ifdef __MCORELE__
141
#undef  LIBGCC2_WORDS_BIG_ENDIAN
142
#define LIBGCC2_WORDS_BIG_ENDIAN 0
143
#endif
144
 
145
#define MAX_BITS_PER_WORD 32
146
 
147
/* Width of a word, in units (bytes).  */
148
#define UNITS_PER_WORD  4
149
 
150
/* A C expression for the size in bits of the type `long long' on the
151
   target machine.  If you don't define this, the default is two
152
   words.  */
153
#define LONG_LONG_TYPE_SIZE 64
154
 
155
/* Allocation boundary (in *bits*) for storing arguments in argument list.  */
156
#define PARM_BOUNDARY   32
157
 
158
/* Doubles must be aligned to an 8 byte boundary.  */
159
#define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
160
  ((MODE != BLKmode && (GET_MODE_SIZE (MODE) == 8)) \
161
   ? BIGGEST_ALIGNMENT : PARM_BOUNDARY)
162
 
163
/* Boundary (in *bits*) on which stack pointer should be aligned.  */
164
#define STACK_BOUNDARY  (TARGET_8ALIGN ? 64 : 32)
165
 
166
/* Largest increment in UNITS we allow the stack to grow in a single operation.  */
167
extern int mcore_stack_increment;
168
#define STACK_UNITS_MAXSTEP  4096
169
 
170
/* Allocation boundary (in *bits*) for the code of a function.  */
171
#define FUNCTION_BOUNDARY  ((TARGET_OVERALIGN_FUNC) ? 32 : 16)
172
 
173
/* Alignment of field after `int : 0' in a structure.  */
174
#define EMPTY_FIELD_BOUNDARY  32
175
 
176
/* No data type wants to be aligned rounder than this.  */
177
#define BIGGEST_ALIGNMENT  (TARGET_8ALIGN ? 64 : 32)
178
 
179
/* The best alignment to use in cases where we have a choice.  */
180
#define FASTEST_ALIGNMENT 32
181
 
182
/* Every structures size must be a multiple of 8 bits.  */
183
#define STRUCTURE_SIZE_BOUNDARY 8
184
 
185
/* Look at the fundamental type that is used for a bit-field and use
186
   that to impose alignment on the enclosing structure.
187
   struct s {int a:8}; should have same alignment as "int", not "char".  */
188
#define PCC_BITFIELD_TYPE_MATTERS       1
189
 
190
/* Largest integer machine mode for structures.  If undefined, the default
191
   is GET_MODE_SIZE(DImode).  */
192
#define MAX_FIXED_MODE_SIZE 32
193
 
194
/* Make strings word-aligned so strcpy from constants will be faster.  */
195
#define CONSTANT_ALIGNMENT(EXP, ALIGN)  \
196
  ((TREE_CODE (EXP) == STRING_CST       \
197
    && (ALIGN) < FASTEST_ALIGNMENT)     \
198
   ? FASTEST_ALIGNMENT : (ALIGN))
199
 
200
/* Make arrays of chars word-aligned for the same reasons.  */
201
#define DATA_ALIGNMENT(TYPE, ALIGN)             \
202
  (TREE_CODE (TYPE) == ARRAY_TYPE               \
203
   && TYPE_MODE (TREE_TYPE (TYPE)) == QImode    \
204
   && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN))
205
 
206
/* Set this nonzero if move instructions will actually fail to work
207
   when given unaligned data.  */
208
#define STRICT_ALIGNMENT 1
209
 
210
/* Standard register usage.  */
211
 
212
/* Register allocation for our first guess
213
 
214
        r0              stack pointer
215
        r1              scratch, target reg for xtrb?
216
        r2-r7           arguments.
217
        r8-r14          call saved
218
        r15             link register
219
        ap              arg pointer (doesn't really exist, always eliminated)
220
        c               c bit
221
        fp              frame pointer (doesn't really exist, always eliminated)
222
        x19             two control registers.  */
223
 
224
/* Number of actual hardware registers.
225
   The hardware registers are assigned numbers for the compiler
226
   from 0 to just below FIRST_PSEUDO_REGISTER.
227
   All registers that the compiler knows about must be given numbers,
228
   even those that are not normally considered general registers.
229
 
230
   MCore has 16 integer registers and 2 control registers + the arg
231
   pointer.  */
232
 
233
#define FIRST_PSEUDO_REGISTER 20
234
 
235
#define R1_REG  1       /* Where literals are forced.  */
236
#define LK_REG  15      /* Overloaded on general register.  */
237
#define AP_REG  16      /* Fake arg pointer register.  */
238
/* RBE: mcore.md depends on CC_REG being set to 17.  */
239
#define CC_REG  17      /* Can't name it C_REG.  */
240
#define FP_REG  18      /* Fake frame pointer register.  */
241
 
242
/* Specify the registers used for certain standard purposes.
243
   The values of these macros are register numbers.  */
244
 
245
 
246
#undef PC_REGNUM /* Define this if the program counter is overloaded on a register.  */
247
#define STACK_POINTER_REGNUM 0 /* Register to use for pushing function arguments.  */
248
#define FRAME_POINTER_REGNUM 8 /* When we need FP, use r8.  */
249
 
250
/* The assembler's names for the registers.  RFP need not always be used as
251
   the Real framepointer; it can also be used as a normal general register.
252
   Note that the name `fp' is horribly misleading since `fp' is in fact only
253
   the argument-and-return-context pointer.  */
254
#define REGISTER_NAMES                                  \
255
{                                                       \
256
  "sp", "r1", "r2",  "r3",  "r4",  "r5",  "r6",  "r7",  \
257
  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
258
  "apvirtual",  "c", "fpvirtual", "x19" \
259
}
260
 
261
/* 1 for registers that have pervasive standard uses
262
   and are not available for the register allocator.  */
263
#define FIXED_REGISTERS  \
264
 /*  r0  r1  r2  r3  r4  r5  r6  r7  r8  r9  r10 r11 r12 r13 r14 r15 ap  c  fp x19 */ \
265
   { 1,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  1,  1, 1, 1}
266
 
267
/* 1 for registers not available across function calls.
268
   These must include the FIXED_REGISTERS and also any
269
   registers that can be used without being saved.
270
   The latter must include the registers where values are returned
271
   and the register where structure-value addresses are passed.
272
   Aside from that, you can include as many other registers as you like.  */
273
 
274
/* RBE: r15 {link register} not available across calls,
275
   But we don't mark it that way here....  */
276
#define CALL_USED_REGISTERS \
277
 /*  r0  r1  r2  r3  r4  r5  r6  r7  r8  r9  r10 r11 r12 r13 r14 r15 ap  c   fp x19 */ \
278
   { 1,  1,  1,  1,  1,  1,  1,  1,  0,  0,  0,  0,  0,  0,  0,  0,  1,  1,  1, 1}
279
 
280
/* The order in which register should be allocated.  */
281
#define REG_ALLOC_ORDER  \
282
 /* r7  r6  r5  r4  r3  r2  r15 r14 r13 r12 r11 r10  r9  r8  r1  r0  ap  c   fp x19*/ \
283
  {  7,  6,  5,  4,  3,  2,  15, 14, 13, 12, 11, 10,  9,  8,  1,  0, 16, 17, 18, 19}
284
 
285
/* Return number of consecutive hard regs needed starting at reg REGNO
286
   to hold something of mode MODE.
287
   This is ordinarily the length in words of a value of mode MODE
288
   but can be less for certain modes in special long registers.
289
 
290
   On the MCore regs are UNITS_PER_WORD bits wide; */
291
#define HARD_REGNO_NREGS(REGNO, MODE)  \
292
   (((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
293
 
294
/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
295
   We may keep double values in even registers.  */
296
#define HARD_REGNO_MODE_OK(REGNO, MODE)  \
297
  ((TARGET_8ALIGN && GET_MODE_SIZE (MODE) > UNITS_PER_WORD) ? (((REGNO) & 1) == 0) : (REGNO < 18))
298
 
299
/* Value is 1 if it is a good idea to tie two pseudo registers
300
   when one has mode MODE1 and one has mode MODE2.
301
   If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
302
   for any hard reg, then this must be 0 for correct output.  */
303
#define MODES_TIEABLE_P(MODE1, MODE2) \
304
  ((MODE1) == (MODE2) || GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
305
 
306
/* Definitions for register eliminations.
307
 
308
   We have two registers that can be eliminated on the MCore.  First, the
309
   frame pointer register can often be eliminated in favor of the stack
310
   pointer register.  Secondly, the argument pointer register can always be
311
   eliminated; it is replaced with either the stack or frame pointer.  */
312
 
313
/* Base register for access to arguments of the function.  */
314
#define ARG_POINTER_REGNUM      16
315
 
316
/* Register in which the static-chain is passed to a function.  */
317
#define STATIC_CHAIN_REGNUM     1
318
 
319
/* This is an array of structures.  Each structure initializes one pair
320
   of eliminable registers.  The "from" register number is given first,
321
   followed by "to".  Eliminations of the same "from" register are listed
322
   in order of preference.  */
323
#define ELIMINABLE_REGS                         \
324
{{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
325
 { ARG_POINTER_REGNUM,   STACK_POINTER_REGNUM}, \
326
 { ARG_POINTER_REGNUM,   FRAME_POINTER_REGNUM},}
327
 
328
/* Define the offset between two registers, one to be eliminated, and the other
329
   its replacement, at the start of a routine.  */
330
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
331
  OFFSET = mcore_initial_elimination_offset (FROM, TO)
332
 
333
/* Define the classes of registers for register constraints in the
334
   machine description.  Also define ranges of constants.
335
 
336
   One of the classes must always be named ALL_REGS and include all hard regs.
337
   If there is more than one class, another class must be named NO_REGS
338
   and contain no registers.
339
 
340
   The name GENERAL_REGS must be the name of a class (or an alias for
341
   another name such as ALL_REGS).  This is the class of registers
342
   that is allowed by "g" or "r" in a register constraint.
343
   Also, registers outside this class are allocated only when
344
   instructions express preferences for them.
345
 
346
   The classes must be numbered in nondecreasing order; that is,
347
   a larger-numbered class must never be contained completely
348
   in a smaller-numbered class.
349
 
350
   For any two classes, it is very desirable that there be another
351
   class that represents their union.  */
352
 
353
/* The MCore has only general registers. There are
354
   also some special purpose registers: the T bit register, the
355
   procedure Link and the Count Registers.  */
356
enum reg_class
357
{
358
  NO_REGS,
359
  ONLYR1_REGS,
360
  LRW_REGS,
361
  GENERAL_REGS,
362
  C_REGS,
363
  ALL_REGS,
364
  LIM_REG_CLASSES
365
};
366
 
367
#define N_REG_CLASSES  (int) LIM_REG_CLASSES
368
 
369
#define IRA_COVER_CLASSES               \
370
{                                       \
371
  GENERAL_REGS, C_REGS, LIM_REG_CLASSES \
372
}
373
 
374
 
375
/* Give names of register classes as strings for dump file.  */
376
#define REG_CLASS_NAMES  \
377
{                       \
378
  "NO_REGS",            \
379
  "ONLYR1_REGS",        \
380
  "LRW_REGS",           \
381
  "GENERAL_REGS",       \
382
  "C_REGS",             \
383
  "ALL_REGS",           \
384
}
385
 
386
/* Define which registers fit in which classes.
387
   This is an initializer for a vector of HARD_REG_SET
388
   of length N_REG_CLASSES.  */
389
 
390
/* ??? STACK_POINTER_REGNUM should be excluded from LRW_REGS.  */
391
#define REG_CLASS_CONTENTS              \
392
{                                       \
393
  {0x000000},  /* NO_REGS       */      \
394
  {0x000002},  /* ONLYR1_REGS   */      \
395
  {0x007FFE},  /* LRW_REGS      */      \
396
  {0x01FFFF},  /* GENERAL_REGS  */      \
397
  {0x020000},  /* C_REGS        */      \
398
  {0x0FFFFF}   /* ALL_REGS      */      \
399
}
400
 
401
/* The same information, inverted:
402
   Return the class number of the smallest class containing
403
   reg number REGNO.  This could be a conditional expression
404
   or could index an array.  */
405
 
406
extern const enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER];
407
#define REGNO_REG_CLASS(REGNO) regno_reg_class[REGNO]
408
 
409
/* When defined, the compiler allows registers explicitly used in the
410
   rtl to be used as spill registers but prevents the compiler from
411
   extending the lifetime of these registers.  */
412
#define SMALL_REGISTER_CLASSES 1
413
 
414
/* The class value for index registers, and the one for base regs.  */
415
#define INDEX_REG_CLASS  NO_REGS
416
#define BASE_REG_CLASS   GENERAL_REGS
417
 
418
/* Get reg_class from a letter such as appears in the machine
419
   description.  */
420
extern const enum reg_class reg_class_from_letter[];
421
 
422
#define REG_CLASS_FROM_LETTER(C) \
423
   (ISLOWER (C) ? reg_class_from_letter[(C) - 'a'] : NO_REGS)
424
 
425
/* The letters I, J, K, L, M, N, O, and P in a register constraint string
426
   can be used to stand for particular ranges of immediate operands.
427
   This macro defines what the ranges are.
428
   C is the letter, and VALUE is a constant value.
429
   Return 1 if VALUE is in the range specified by C.
430
        I: loadable by movi (0..127)
431
        J: arithmetic operand 1..32
432
        K: shift operand 0..31
433
        L: negative arithmetic operand -1..-32
434
        M: powers of two, constants loadable by bgeni
435
        N: powers of two minus 1, constants loadable by bmaski, including -1
436
        O: allowed by cmov with two constants +/- 1 of each other
437
        P: values we will generate 'inline' -- without an 'lrw'
438
 
439
   Others defined for use after reload
440
        Q: constant 1
441
        R: a label
442
        S: 0/1/2 cleared bits out of 32 [for bclri's]
443
        T: 2 set bits out of 32 [for bseti's]
444
        U: constant 0
445
        xxxS: 1 cleared bit out of 32 (complement of power of 2). for bclri
446
        xxxT: 2 cleared bits out of 32. for pairs of bclris.  */
447
#define CONST_OK_FOR_I(VALUE) (((HOST_WIDE_INT)(VALUE)) >= 0 && ((HOST_WIDE_INT)(VALUE)) <= 0x7f)
448
#define CONST_OK_FOR_J(VALUE) (((HOST_WIDE_INT)(VALUE)) >  0 && ((HOST_WIDE_INT)(VALUE)) <= 32)
449
#define CONST_OK_FOR_L(VALUE) (((HOST_WIDE_INT)(VALUE)) <  0 && ((HOST_WIDE_INT)(VALUE)) >= -32)
450
#define CONST_OK_FOR_K(VALUE) (((HOST_WIDE_INT)(VALUE)) >= 0 && ((HOST_WIDE_INT)(VALUE)) <= 31)
451
#define CONST_OK_FOR_M(VALUE) (exact_log2 (VALUE) >= 0 && exact_log2 (VALUE) <= 30)
452
#define CONST_OK_FOR_N(VALUE) (((HOST_WIDE_INT)(VALUE)) == -1 || (exact_log2 ((VALUE) + 1) >= 0 && exact_log2 ((VALUE) + 1) <= 30))
453
#define CONST_OK_FOR_O(VALUE) (CONST_OK_FOR_I(VALUE) || \
454
                               CONST_OK_FOR_M(VALUE) || \
455
                               CONST_OK_FOR_N(VALUE) || \
456
                               CONST_OK_FOR_M((HOST_WIDE_INT)(VALUE) - 1) || \
457
                               CONST_OK_FOR_N((HOST_WIDE_INT)(VALUE) + 1))
458
 
459
#define CONST_OK_FOR_P(VALUE) (mcore_const_ok_for_inline (VALUE)) 
460
 
461
#define CONST_OK_FOR_LETTER_P(VALUE, C)     \
462
     ((C) == 'I' ? CONST_OK_FOR_I (VALUE)   \
463
    : (C) == 'J' ? CONST_OK_FOR_J (VALUE)   \
464
    : (C) == 'L' ? CONST_OK_FOR_L (VALUE)   \
465
    : (C) == 'K' ? CONST_OK_FOR_K (VALUE)   \
466
    : (C) == 'M' ? CONST_OK_FOR_M (VALUE)   \
467
    : (C) == 'N' ? CONST_OK_FOR_N (VALUE)   \
468
    : (C) == 'P' ? CONST_OK_FOR_P (VALUE)   \
469
    : (C) == 'O' ? CONST_OK_FOR_O (VALUE)   \
470
    : 0)
471
 
472
/* Similar, but for floating constants, and defining letters G and H.
473
   Here VALUE is the CONST_DOUBLE rtx itself.  */
474
#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
475
   ((C) == 'G' ? CONST_OK_FOR_I (CONST_DOUBLE_HIGH (VALUE)) \
476
              && CONST_OK_FOR_I (CONST_DOUBLE_LOW (VALUE))  \
477
    : 0)
478
 
479
/* Letters in the range `Q' through `U' in a register constraint string
480
   may be defined in a machine-dependent fashion to stand for arbitrary
481
   operand types.  */
482
#define EXTRA_CONSTRAINT(OP, C)                         \
483
  ((C) == 'R' ? (GET_CODE (OP) == MEM                   \
484
                 && GET_CODE (XEXP (OP, 0)) == LABEL_REF) \
485
   : (C) == 'S' ? (GET_CODE (OP) == CONST_INT \
486
                   && mcore_num_zeros (INTVAL (OP)) <= 2) \
487
   : (C) == 'T' ? (GET_CODE (OP) == CONST_INT \
488
                   && mcore_num_ones (INTVAL (OP)) == 2) \
489
   : (C) == 'Q' ? (GET_CODE (OP) == CONST_INT \
490
                   && INTVAL(OP) == 1) \
491
   : (C) == 'U' ? (GET_CODE (OP) == CONST_INT \
492
                   && INTVAL(OP) == 0) \
493
   : 0)
494
 
495
/* Given an rtx X being reloaded into a reg required to be
496
   in class CLASS, return the class of reg to actually use.
497
   In general this is just CLASS; but on some machines
498
   in some cases it is preferable to use a more restrictive class.  */
499
#define PREFERRED_RELOAD_CLASS(X, CLASS) mcore_reload_class (X, CLASS)
500
 
501
/* Return the register class of a scratch register needed to copy IN into
502
   or out of a register in CLASS in MODE.  If it can be done directly,
503
   NO_REGS is returned.  */
504
#define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \
505
  mcore_secondary_reload_class (CLASS, MODE, X)
506
 
507
/* Return the maximum number of consecutive registers
508
   needed to represent mode MODE in a register of class CLASS.
509
 
510
   On MCore this is the size of MODE in words.  */
511
#define CLASS_MAX_NREGS(CLASS, MODE)  \
512
     (ROUND_ADVANCE (GET_MODE_SIZE (MODE)))
513
 
514
/* Stack layout; function entry, exit and calling.  */
515
 
516
/* Define the number of register that can hold parameters.
517
   These two macros are used only in other macro definitions below.  */
518
#define NPARM_REGS 6
519
#define FIRST_PARM_REG 2
520
#define FIRST_RET_REG 2
521
 
522
/* Define this if pushing a word on the stack
523
   makes the stack pointer a smaller address.  */
524
#define STACK_GROWS_DOWNWARD  
525
 
526
/* Offset within stack frame to start allocating local variables at.
527
   If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
528
   first local allocated.  Otherwise, it is the offset to the BEGINNING
529
   of the first local allocated.  */
530
#define STARTING_FRAME_OFFSET  0
531
 
532
/* If defined, the maximum amount of space required for outgoing arguments
533
   will be computed and placed into the variable
534
   `crtl->outgoing_args_size'.  No space will be pushed
535
   onto the stack for each call; instead, the function prologue should
536
   increase the stack frame size by this amount.  */
537
#define ACCUMULATE_OUTGOING_ARGS 1
538
 
539
/* Offset of first parameter from the argument pointer register value.  */
540
#define FIRST_PARM_OFFSET(FNDECL)  0
541
 
542
/* Value is the number of byte of arguments automatically
543
   popped when returning from a subroutine call.
544
   FUNTYPE is the data type of the function (as a tree),
545
   or for a library call it is an identifier node for the subroutine name.
546
   SIZE is the number of bytes of arguments passed on the stack.
547
 
548
   On the MCore, the callee does not pop any of its arguments that were passed
549
   on the stack.  */
550
#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
551
 
552
/* Define how to find the value returned by a function.
553
   VALTYPE is the data type of the value (as a tree).
554
   If the precise function being called is known, FUNC is its FUNCTION_DECL;
555
   otherwise, FUNC is 0.  */
556
#define FUNCTION_VALUE(VALTYPE, FUNC)  mcore_function_value (VALTYPE, FUNC)
557
 
558
/* Don't default to pcc-struct-return, because gcc is the only compiler, and
559
   we want to retain compatibility with older gcc versions.  */
560
#define DEFAULT_PCC_STRUCT_RETURN 0
561
 
562
/* Define how to find the value returned by a library function
563
   assuming the value has mode MODE.  */
564
#define LIBCALL_VALUE(MODE)  gen_rtx_REG (MODE, FIRST_RET_REG)
565
 
566
/* 1 if N is a possible register number for a function value.
567
   On the MCore, only r4 can return results.  */
568
#define FUNCTION_VALUE_REGNO_P(REGNO)  ((REGNO) == FIRST_RET_REG)
569
 
570
/* 1 if N is a possible register number for function argument passing.  */
571
#define FUNCTION_ARG_REGNO_P(REGNO)  \
572
  ((REGNO) >= FIRST_PARM_REG && (REGNO) < (NPARM_REGS + FIRST_PARM_REG))
573
 
574
/* Define a data type for recording info about an argument list
575
   during the scan of that argument list.  This data type should
576
   hold all necessary information about the function itself
577
   and about the args processed so far, enough to enable macros
578
   such as FUNCTION_ARG to determine where the next arg should go.
579
 
580
   On MCore, this is a single integer, which is a number of words
581
   of arguments scanned so far (including the invisible argument,
582
   if any, which holds the structure-value-address).
583
   Thus NARGREGS or more means all following args should go on the stack.  */
584
#define CUMULATIVE_ARGS  int
585
 
586
#define ROUND_ADVANCE(SIZE)     \
587
  ((SIZE + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
588
 
589
/* Round a register number up to a proper boundary for an arg of mode
590
   MODE.
591
 
592
   We round to an even reg for things larger than a word.  */
593
#define ROUND_REG(X, MODE)                              \
594
  ((TARGET_8ALIGN                                       \
595
   && GET_MODE_UNIT_SIZE ((MODE)) > UNITS_PER_WORD)     \
596
   ? ((X) + ((X) & 1)) : (X))
597
 
598
 
599
/* Initialize a variable CUM of type CUMULATIVE_ARGS
600
   for a call to a function whose data type is FNTYPE.
601
   For a library call, FNTYPE is 0.
602
 
603
   On MCore, the offset always starts at 0: the first parm reg is always
604
   the same reg.  */
605
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
606
  ((CUM) = 0)
607
 
608
/* Update the data in CUM to advance over an argument
609
   of mode MODE and data type TYPE.
610
   (TYPE is null for libcalls where that information may not be
611
   available.)  */
612
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)       \
613
 ((CUM) = (ROUND_REG ((CUM), (MODE))                       \
614
           + ((NAMED) * mcore_num_arg_regs (MODE, TYPE)))) \
615
 
616
/* Define where to put the arguments to a function.  */
617
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
618
  mcore_function_arg (CUM, MODE, TYPE, NAMED)
619
 
620
/* Call the function profiler with a given profile label.  */
621
#define FUNCTION_PROFILER(STREAM,LABELNO)               \
622
{                                                       \
623
  fprintf (STREAM, "    trap    1\n");                  \
624
  fprintf (STREAM, "    .align  2\n");                  \
625
  fprintf (STREAM, "    .long   LP%d\n", (LABELNO));    \
626
}
627
 
628
/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
629
   the stack pointer does not matter.  The value is tested only in
630
   functions that have frame pointers.
631
   No definition is equivalent to always zero.  */
632
#define EXIT_IGNORE_STACK 0
633
 
634
/* Length in units of the trampoline for entering a nested function.  */
635
#define TRAMPOLINE_SIZE  12
636
 
637
/* Alignment required for a trampoline in bits.  */
638
#define TRAMPOLINE_ALIGNMENT  32
639
 
640
/* Macros to check register numbers against specific register classes.  */
641
 
642
/* These assume that REGNO is a hard or pseudo reg number.
643
   They give nonzero only if REGNO is a hard reg of the suitable class
644
   or a pseudo reg currently allocated to a suitable hard reg.
645
   Since they use reg_renumber, they are safe only once reg_renumber
646
   has been allocated, which happens in local-alloc.c.  */
647
#define REGNO_OK_FOR_BASE_P(REGNO)  \
648
  ((REGNO) < AP_REG || (unsigned) reg_renumber[(REGNO)] < AP_REG)
649
 
650
#define REGNO_OK_FOR_INDEX_P(REGNO)   0
651
 
652
/* Maximum number of registers that can appear in a valid memory
653
   address.  */
654
#define MAX_REGS_PER_ADDRESS 1
655
 
656
/* Recognize any constant value that is a valid address.  */
657
#define CONSTANT_ADDRESS_P(X)    (GET_CODE (X) == LABEL_REF)
658
 
659
/* Nonzero if the constant value X is a legitimate general operand.
660
   It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
661
 
662
   On the MCore, allow anything but a double.  */
663
#define LEGITIMATE_CONSTANT_P(X) (GET_CODE(X) != CONST_DOUBLE \
664
                                  && CONSTANT_P (X))
665
 
666
/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
667
   and check its validity for a certain class.
668
   We have two alternate definitions for each of them.
669
   The usual definition accepts all pseudo regs; the other rejects
670
   them unless they have been allocated suitable hard regs.
671
   The symbol REG_OK_STRICT causes the latter definition to be used.  */
672
#ifndef REG_OK_STRICT
673
 
674
/* Nonzero if X is a hard reg that can be used as a base reg
675
   or if it is a pseudo reg.  */
676
#define REG_OK_FOR_BASE_P(X) \
677
        (REGNO (X) <= 16 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
678
 
679
/* Nonzero if X is a hard reg that can be used as an index
680
   or if it is a pseudo reg.  */
681
#define REG_OK_FOR_INDEX_P(X)   0
682
 
683
#else
684
 
685
/* Nonzero if X is a hard reg that can be used as a base reg.  */
686
#define REG_OK_FOR_BASE_P(X)    \
687
        REGNO_OK_FOR_BASE_P (REGNO (X))
688
 
689
/* Nonzero if X is a hard reg that can be used as an index.  */
690
#define REG_OK_FOR_INDEX_P(X)   0
691
 
692
#endif
693
/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
694
   that is a valid memory address for an instruction.
695
   The MODE argument is the machine mode for the MEM expression
696
   that wants to use this address.
697
 
698
   The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS.  */
699
#define BASE_REGISTER_RTX_P(X)  \
700
  (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X))
701
 
702
#define INDEX_REGISTER_RTX_P(X)  \
703
  (GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X))
704
 
705
 
706
/* Jump to LABEL if X is a valid address RTX.  This must also take
707
   REG_OK_STRICT into account when deciding about valid registers, but it uses
708
   the above macros so we are in luck.
709
 
710
   Allow  REG
711
          REG+disp
712
 
713
   A legitimate index for a QI is 0..15, for HI is 0..30, for SI is 0..60,
714
   and for DI is 0..56 because we use two SI loads, etc.  */
715
#define GO_IF_LEGITIMATE_INDEX(MODE, REGNO, OP, LABEL)                  \
716
  do                                                                    \
717
    {                                                                   \
718
      if (GET_CODE (OP) == CONST_INT)                                   \
719
        {                                                               \
720
          if (GET_MODE_SIZE (MODE) >= 4                                 \
721
              && (((unsigned HOST_WIDE_INT) INTVAL (OP)) % 4) == 0       \
722
              &&  ((unsigned HOST_WIDE_INT) INTVAL (OP))                \
723
              <= (unsigned HOST_WIDE_INT) 64 - GET_MODE_SIZE (MODE))    \
724
            goto LABEL;                                                 \
725
          if (GET_MODE_SIZE (MODE) == 2                                 \
726
              && (((unsigned HOST_WIDE_INT) INTVAL (OP)) % 2) == 0       \
727
              &&  ((unsigned HOST_WIDE_INT) INTVAL (OP)) <= 30)         \
728
            goto LABEL;                                                 \
729
          if (GET_MODE_SIZE (MODE) == 1                                 \
730
              && ((unsigned HOST_WIDE_INT) INTVAL (OP)) <= 15)          \
731
            goto LABEL;                                                 \
732
        }                                                               \
733
    }                                                                   \
734
  while (0)
735
 
736
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL)                  \
737
{                                                                 \
738
  if (BASE_REGISTER_RTX_P (X))                                    \
739
    goto LABEL;                                                   \
740
  else if (GET_CODE (X) == PLUS || GET_CODE (X) == LO_SUM)        \
741
    {                                                             \
742
      rtx xop0 = XEXP (X,0);                                       \
743
      rtx xop1 = XEXP (X,1);                                      \
744
      if (BASE_REGISTER_RTX_P (xop0))                             \
745
        GO_IF_LEGITIMATE_INDEX (MODE, REGNO (xop0), xop1, LABEL); \
746
      if (BASE_REGISTER_RTX_P (xop1))                             \
747
        GO_IF_LEGITIMATE_INDEX (MODE, REGNO (xop1), xop0, LABEL); \
748
    }                                                             \
749
}
750
 
751
/* Specify the machine mode that this machine uses
752
   for the index in the tablejump instruction.  */
753
#define CASE_VECTOR_MODE SImode
754
 
755
/* 'char' is signed by default.  */
756
#define DEFAULT_SIGNED_CHAR  0
757
 
758
/* The type of size_t unsigned int.  */
759
#define SIZE_TYPE "unsigned int"
760
 
761
/* Max number of bytes we can move from memory to memory
762
   in one reasonably fast instruction.  */
763
#define MOVE_MAX 4
764
 
765
/* Define if operations between registers always perform the operation
766
   on the full register even if a narrower mode is specified.  */
767
#define WORD_REGISTER_OPERATIONS
768
 
769
/* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
770
   will either zero-extend or sign-extend.  The value of this macro should
771
   be the code that says which one of the two operations is implicitly
772
   done, UNKNOWN if none.  */
773
#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
774
 
775
/* Nonzero if access to memory by bytes is slow and undesirable.  */
776
#define SLOW_BYTE_ACCESS TARGET_SLOW_BYTES
777
 
778
/* Shift counts are truncated to 6-bits (0 to 63) instead of the expected
779
   5-bits, so we can not define SHIFT_COUNT_TRUNCATED to true for this
780
   target.  */
781
#define SHIFT_COUNT_TRUNCATED 0
782
 
783
/* All integers have the same format so truncation is easy.  */
784
#define TRULY_NOOP_TRUNCATION(OUTPREC,INPREC)  1
785
 
786
/* Define this if addresses of constant functions
787
   shouldn't be put through pseudo regs where they can be cse'd.
788
   Desirable on machines where ordinary constants are expensive
789
   but a CALL with constant address is cheap.  */
790
/* Why is this defined??? -- dac */
791
#define NO_FUNCTION_CSE 1
792
 
793
/* The machine modes of pointers and functions.  */
794
#define Pmode          SImode
795
#define FUNCTION_MODE  Pmode
796
 
797
/* Compute extra cost of moving data between one register class
798
   and another.  All register moves are cheap.  */
799
#define REGISTER_MOVE_COST(MODE, SRCCLASS, DSTCLASS) 2
800
 
801
#define WORD_REGISTER_OPERATIONS
802
 
803
/* Assembler output control.  */
804
#define ASM_COMMENT_START "\t//"
805
 
806
#define ASM_APP_ON      "// inline asm begin\n"
807
#define ASM_APP_OFF     "// inline asm end\n"
808
 
809
#define FILE_ASM_OP     "\t.file\n"
810
 
811
/* Switch to the text or data segment.  */
812
#define TEXT_SECTION_ASM_OP  "\t.text"
813
#define DATA_SECTION_ASM_OP  "\t.data"
814
 
815
/* Switch into a generic section.  */
816
#undef  TARGET_ASM_NAMED_SECTION
817
#define TARGET_ASM_NAMED_SECTION  mcore_asm_named_section
818
 
819
/* This is how to output an insn to push a register on the stack.
820
   It need not be very fast code.  */
821
#define ASM_OUTPUT_REG_PUSH(FILE,REGNO)  \
822
  fprintf (FILE, "\tsubi\t %s,%d\n\tstw\t %s,(%s)\n",   \
823
           reg_names[STACK_POINTER_REGNUM],             \
824
           (STACK_BOUNDARY / BITS_PER_UNIT),            \
825
           reg_names[REGNO],                            \
826
           reg_names[STACK_POINTER_REGNUM])
827
 
828
/* Length in instructions of the code output by ASM_OUTPUT_REG_PUSH.  */
829
#define REG_PUSH_LENGTH 2
830
 
831
/* This is how to output an insn to pop a register from the stack.  */
832
#define ASM_OUTPUT_REG_POP(FILE,REGNO)  \
833
  fprintf (FILE, "\tldw\t %s,(%s)\n\taddi\t %s,%d\n",   \
834
           reg_names[REGNO],                            \
835
           reg_names[STACK_POINTER_REGNUM],             \
836
           reg_names[STACK_POINTER_REGNUM],             \
837
           (STACK_BOUNDARY / BITS_PER_UNIT))
838
 
839
 
840
/* Output a reference to a label.  */
841
#undef  ASM_OUTPUT_LABELREF
842
#define ASM_OUTPUT_LABELREF(STREAM, NAME)  \
843
  fprintf (STREAM, "%s%s", USER_LABEL_PREFIX, \
844
           (* targetm.strip_name_encoding) (NAME))
845
 
846
/* This is how to output an assembler line
847
   that says to advance the location counter
848
   to a multiple of 2**LOG bytes.  */
849
#define ASM_OUTPUT_ALIGN(FILE,LOG)      \
850
  if ((LOG) != 0)                        \
851
    fprintf (FILE, "\t.align\t%d\n", LOG)
852
 
853
#ifndef ASM_DECLARE_RESULT
854
#define ASM_DECLARE_RESULT(FILE, RESULT)
855
#endif
856
 
857
#define MULTIPLE_SYMBOL_SPACES 1
858
 
859
#define SUPPORTS_ONE_ONLY 1
860
 
861
/* A pair of macros to output things for the callgraph data.
862
   VALUE means (to the tools that reads this info later):
863
 
864
        1 the call is special (e.g. dst is "unknown" or "alloca")
865
        2 the call is special (e.g., the src is a table instead of routine)
866
 
867
   Frame sizes are augmented with timestamps to help later tools
868
   differentiate between static entities with same names in different
869
   files.  */
870
extern long mcore_current_compilation_timestamp;
871
#define ASM_OUTPUT_CG_NODE(FILE,SRCNAME,VALUE)                          \
872
  do                                                                    \
873
    {                                                                   \
874
      if (mcore_current_compilation_timestamp == 0)                      \
875
        mcore_current_compilation_timestamp = time (0);                  \
876
      fprintf ((FILE),"\t.equ\t__$frame$size$_%s_$_%08lx,%d\n",         \
877
             (SRCNAME), mcore_current_compilation_timestamp, (VALUE));  \
878
    }                                                                   \
879
  while (0)
880
 
881
#define ASM_OUTPUT_CG_EDGE(FILE,SRCNAME,DSTNAME,VALUE)          \
882
  do                                                            \
883
    {                                                           \
884
      fprintf ((FILE),"\t.equ\t__$function$call$_%s_$_%s,%d\n", \
885
             (SRCNAME), (DSTNAME), (VALUE));                    \
886
    }                                                           \
887
  while (0)
888
 
889
/* Globalizing directive for a label.  */
890
#define GLOBAL_ASM_OP "\t.export\t"
891
 
892
/* The prefix to add to user-visible assembler symbols.  */
893
#undef  USER_LABEL_PREFIX
894
#define USER_LABEL_PREFIX ""
895
 
896
/* Make an internal label into a string.  */
897
#undef  ASM_GENERATE_INTERNAL_LABEL
898
#define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM)  \
899
  sprintf (STRING, "*.%s%ld", PREFIX, (long) NUM)
900
 
901
/* Jump tables must be 32 bit aligned.  */
902
#undef  ASM_OUTPUT_CASE_LABEL
903
#define ASM_OUTPUT_CASE_LABEL(STREAM,PREFIX,NUM,TABLE) \
904
  fprintf (STREAM, "\t.align 2\n.%s%d:\n", PREFIX, NUM);
905
 
906
/* Output a relative address. Not needed since jump tables are absolute
907
   but we must define it anyway.  */
908
#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM,BODY,VALUE,REL)  \
909
  fputs ("- - - ASM_OUTPUT_ADDR_DIFF_ELT called!\n", STREAM)
910
 
911
/* Output an element of a dispatch table.  */
912
#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM,VALUE)  \
913
    fprintf (STREAM, "\t.long\t.L%d\n", VALUE)
914
 
915
/* Output various types of constants.  */
916
 
917
/* This is how to output an assembler line
918
   that says to advance the location counter by SIZE bytes.  */
919
#undef  ASM_OUTPUT_SKIP
920
#define ASM_OUTPUT_SKIP(FILE,SIZE)  \
921
  fprintf (FILE, "\t.fill %d, 1\n", (int)(SIZE))
922
 
923
/* This says how to output an assembler line
924
   to define a global common symbol, with alignment information.  */
925
/* XXX - for now we ignore the alignment.  */
926
#undef  ASM_OUTPUT_ALIGNED_COMMON
927
#define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN)      \
928
  do                                                            \
929
    {                                                           \
930
      if (mcore_dllexport_name_p (NAME))                        \
931
        MCORE_EXPORT_NAME (FILE, NAME)                          \
932
      if (! mcore_dllimport_name_p (NAME))                      \
933
        {                                                       \
934
          fputs ("\t.comm\t", FILE);                            \
935
          assemble_name (FILE, NAME);                           \
936
          fprintf (FILE, ",%lu\n", (unsigned long)(SIZE));      \
937
        }                                                       \
938
    }                                                           \
939
  while (0)
940
 
941
/* This says how to output an assembler line
942
   to define a local common symbol....  */
943
#undef  ASM_OUTPUT_LOCAL
944
#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED)     \
945
  (fputs ("\t.lcomm\t", FILE),                          \
946
  assemble_name (FILE, NAME),                           \
947
  fprintf (FILE, ",%d\n", (int)SIZE))
948
 
949
/* ... and how to define a local common symbol whose alignment
950
   we wish to specify.  ALIGN comes in as bits, we have to turn
951
   it into bytes.  */
952
#undef  ASM_OUTPUT_ALIGNED_LOCAL
953
#define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN)               \
954
  do                                                                    \
955
    {                                                                   \
956
      fputs ("\t.bss\t", (FILE));                                       \
957
      assemble_name ((FILE), (NAME));                                   \
958
      fprintf ((FILE), ",%d,%d\n", (int)(SIZE), (ALIGN) / BITS_PER_UNIT);\
959
    }                                                                   \
960
  while (0)
961
 
962
/* Print operand X (an rtx) in assembler syntax to file FILE.
963
   CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
964
   For `%' followed by punctuation, CODE is the punctuation and X is null.  */
965
#define PRINT_OPERAND(STREAM, X, CODE)  mcore_print_operand (STREAM, X, CODE)
966
 
967
/* Print a memory address as an operand to reference that memory location.  */
968
#define PRINT_OPERAND_ADDRESS(STREAM,X)  mcore_print_operand_address (STREAM, X)
969
 
970
#define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
971
  ((CHAR)=='.' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^' || (CHAR) == '!')
972
 
973
#endif /* ! GCC_MCORE_H */

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