OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [config/] [mep/] [mep.opt] - Blame information for rev 298

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 282 jeremybenn
; Target specific command line options for the MEP port of the compiler.
2
; Copyright (C) 2005, 2007, 2009 Free Software Foundation, Inc.
3
; Contributed by Red Hat Inc.
4
;
5
; GCC is free software; you can redistribute it and/or modify it under
6
; the terms of the GNU General Public License as published by the Free
7
; Software Foundation; either version 3, or (at your option) any later
8
; version.
9
;
10
; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
11
; WARRANTY; without even the implied warranty of MERCHANTABILITY or
12
; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
13
; for more details.
14
;
15
; You should have received a copy of the GNU General Public License
16
; along with GCC; see the file COPYING3.  If not see
17
; .  */
18
 
19
mabsdiff
20
Target Mask(OPT_ABSDIFF)
21
Enable absolute difference instructions
22
 
23
mall-opts
24
Target RejectNegative
25
Enable all optional instructions
26
 
27
maverage
28
Target Mask(OPT_AVERAGE)
29
Enable average instructions
30
 
31
mbased=
32
Target Joined Var(mep_based_cutoff) RejectNegative UInteger Init(0)
33
Variables this size and smaller go in the based section. (default 0)
34
 
35
mbitops
36
Target Mask(OPT_BITOPS)
37
Enable bit manipulation instructions
38
 
39
mc=
40
Target Joined Var(mep_const_section) RejectNegative
41
Section to put all const variables in (tiny, near, far) (no default)
42
 
43
mclip
44
Target Mask(OPT_CLIP)
45
Enable clip instructions
46
 
47
mconfig=
48
Target Joined Var(mep_config_string) RejectNegative
49
Configuration name
50
 
51
mcop
52
Target Mask(COP)
53
Enable MeP Coprocessor
54
 
55
mcop32
56
Target Mask(COP) MaskExists RejectNegative
57
Enable MeP Coprocessor with 32-bit registers
58
 
59
mcop64
60
Target Mask(64BIT_CR_REGS) RejectNegative
61
Enable MeP Coprocessor with 64-bit registers
62
 
63
mivc2
64
Target Mask(IVC2) RejectNegative
65
Enable IVC2 scheduling
66
 
67
mdc
68
Target Mask(DC) RejectNegative
69
Const variables default to the near section
70
 
71
mdebug
72
Target Disabled Undocumented
73
 
74
mdiv
75
Target Mask(OPT_DIV)
76
Enable 32-bit divide instructions
77
 
78
meb
79
Target InverseMask(LITTLE_ENDIAN) RejectNegative
80
Use big-endian byte order
81
 
82
mel
83
Target Mask(LITTLE_ENDIAN) RejectNegative
84
Use little-endian byte order
85
 
86
mio-volatile
87
Target Mask(IO_VOLATILE)
88
__io vars are volatile by default
89
 
90
ml
91
Target Mask(L) RejectNegative
92
All variables default to the far section
93
 
94
mleadz
95
Target Mask(OPT_LEADZ)
96
Enable leading zero instructions
97
 
98
mlibrary
99
Target Mask(LIBRARY) RejectNegative Undocumented
100
 
101
mm
102
Target Mask(M) RejectNegative
103
All variables default to the near section
104
 
105
mminmax
106
Target Mask(OPT_MINMAX)
107
Enable min/max instructions
108
 
109
mmult
110
Target Mask(OPT_MULT)
111
Enable 32-bit multiply instructions
112
 
113
mno-opts
114
Target RejectNegative
115
Disable all optional instructions
116
 
117
mrand-tpgp
118
Target Mask(RAND_TPGP) RejectNegative Undocumented
119
 
120
mrepeat
121
Target Mask(OPT_REPEAT)
122
Allow gcc to use the repeat/erepeat instructions
123
 
124
ms
125
Target Mask(S) RejectNegative
126
All variables default to the tiny section
127
 
128
msatur
129
Target Mask(OPT_SATUR)
130
Enable saturation instructions
131
 
132
msdram
133
Target
134
Use sdram version of runtime
135
 
136
msim
137
Target RejectNegative
138
Use simulator runtime
139
 
140
msimnovec
141
Target RejectNegative
142
Use simulator runtime without vectors
143
 
144
mtf
145
Target Mask(TF) RejectNegative
146
All functions default to the far section
147
 
148
mtiny=
149
Target Joined Var(mep_tiny_cutoff) RejectNegative UInteger Init(4)
150
Variables this size and smaller go in the tiny section. (default 4)
151
 
152
mvl32
153
Target InverseMask(OPT_VL64) Undocumented RejectNegative
154
 
155
mvl64
156
Target Mask(OPT_VL64) Undocumented RejectNegative
157
 
158
mvliw
159
Target Mask(VLIW) Undocumented

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.