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282 |
jeremybenn |
/* Definitions of target machine for GNU compiler.
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MIPS SDE version, for use with the SDE C library rather than newlib.
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Copyright (C) 2007, 2008, 2009
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Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GCC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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#define TARGET_OS_CPP_BUILTINS() \
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do \
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{ \
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builtin_assert ("system=sde"); \
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builtin_assert ("system=posix"); \
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builtin_define ("__SDE_MIPS__"); \
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\
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/* Deprecated: use __mips_isa_rev >= 2. */ \
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if (ISA_MIPS32R2) \
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builtin_define ("__mipsr2"); \
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\
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/* Deprecated: use __mips_fpr == 64. */ \
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if (TARGET_FLOAT64) \
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builtin_define ("__mipsfp64"); \
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\
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if (TARGET_NO_FLOAT) \
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{ \
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builtin_define ("__NO_FLOAT"); \
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builtin_define ("__mips_no_float"); \
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} \
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else if (TARGET_SOFT_FLOAT_ABI) \
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builtin_define ("__SOFT_FLOAT"); \
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else if (TARGET_SINGLE_FLOAT) \
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builtin_define ("__SINGLE_FLOAT"); \
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\
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if (TARGET_BIG_ENDIAN) \
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{ \
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builtin_assert ("endian=big"); \
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builtin_assert ("cpu=mipseb"); \
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} \
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else \
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{ \
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builtin_assert ("endian=little"); \
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builtin_assert ("cpu=mipsel"); \
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} \
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} \
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while (0)
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#undef SUBTARGET_OVERRIDE_OPTIONS
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#define SUBTARGET_OVERRIDE_OPTIONS \
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do \
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{ \
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if (TARGET_NO_FLOAT) \
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{ \
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target_flags |= MASK_SOFT_FLOAT_ABI; \
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target_flags_explicit |= MASK_SOFT_FLOAT_ABI; \
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} \
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} \
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while (0)
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/* For __clear_cache in libgcc2.c. */
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#ifdef IN_LIBGCC2
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extern void mips_sync_icache (void *beg, unsigned long len);
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#undef CLEAR_INSN_CACHE
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#define CLEAR_INSN_CACHE(beg, end) \
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mips_sync_icache (beg, end - beg)
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#endif
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/* For mips_cache_flush_func in mips.opt. */
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#undef CACHE_FLUSH_FUNC
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#define CACHE_FLUSH_FUNC "mips_sync_icache"
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/* For inline code which needs to sync the icache and dcache,
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noting that the SDE library takes arguments (address, size). */
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#undef MIPS_ICACHE_SYNC
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#define MIPS_ICACHE_SYNC(ADDR, SIZE) \
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emit_library_call (gen_rtx_SYMBOL_REF (Pmode, mips_cache_flush_func), \
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LCT_NORMAL, VOIDmode, 2, ADDR, Pmode, \
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SIZE, TYPE_MODE (sizetype))
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/* This version of _mcount does not pop 2 words from the stack. */
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#undef FUNCTION_PROFILER
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#define FUNCTION_PROFILER(FILE, LABELNO) \
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{ \
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mips_push_asm_switch (&mips_noat); \
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/* _mcount treats $2 as the static chain register. */ \
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if (cfun->static_chain_decl != NULL) \
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fprintf (FILE, "\tmove\t%s,%s\n", reg_names[2], \
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reg_names[STATIC_CHAIN_REGNUM]); \
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/* MIPS16 code passes saved $ra in $v1 instead of $at. */ \
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fprintf (FILE, "\tmove\t%s,%s\n", \
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reg_names[GP_REG_FIRST + (TARGET_MIPS16 ? 3 : 1)], \
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reg_names[RETURN_ADDR_REGNUM]); \
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fprintf (FILE, "\tjal\t_mcount\n"); \
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mips_pop_asm_switch (&mips_noat); \
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/* _mcount treats $2 as the static chain register. */ \
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if (cfun->static_chain_decl != NULL) \
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fprintf (FILE, "\tmove\t%s,%s\n", reg_names[STATIC_CHAIN_REGNUM], \
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reg_names[2]); \
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}
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/* ...nor does the call sequence preserve $31. */
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#undef MIPS_SAVE_REG_FOR_PROFILING_P
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#define MIPS_SAVE_REG_FOR_PROFILING_P(REGNO) ((REGNO) == RETURN_ADDR_REGNUM)
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