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[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [config/] [mips/] [vr4120-div.S] - Blame information for rev 282

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1 282 jeremybenn
/* Support file for -mfix-vr4120.
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   Copyright (C) 2002, 2004, 2007 Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GCC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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        along with GCC; see the file COPYING3.  If not see
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.  */
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/* This file contains functions which implement divsi3 and modsi3 for
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   -mfix-vr4120.  div and ddiv do not give the correct result when one
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   of the operands is negative.  */
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        .set    nomips16
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#define DIV                                                             \
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        xor     $3,$4,$5        /* t = x ^ y */ ;                       \
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        li      $2,0x80000000;                                          \
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        .set    noreorder;                                              \
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        bgez    $4,1f           /* x >= 0 */;                           \
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        and     $3,$3,$2        /* t = (x ^ y) & 0x80000000 in delay slot */ ;\
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        .set    reorder;                                                \
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        subu    $4,$0,$4        /* x = -x */ ;                          \
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1:;                                                                     \
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        .set    noreorder;                                              \
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        bgez    $5,2f           /* y >= 0 */ ;                          \
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        nop;                                                            \
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        subu    $5,$0,$5        /* y = -y */ ;                          \
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        .set    reorder;                                                \
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2:;                                                                     \
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        divu    $0,$4,$5;       /* we use divu because of INT_MIN */    \
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        .set    noreorder;                                              \
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        bne     $5,$0,3f;                                               \
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        nop;                                                            \
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        break   7               /* division on zero y */ ;              \
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3:;                                                                     \
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        .set    reorder;                                                \
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        mflo    $2              /* r = x / y */ ;                       \
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        .set    noreorder;                                              \
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        beq     $3,$0,4f        /* t == 0 */ ;                          \
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        nop;                                                            \
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        subu    $2,$0,$2        /* r = -r */ ;                          \
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        .set    reorder;                                                \
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4:
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        .globl  __vr4120_divsi3
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        .ent    __vr4120_divsi3
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__vr4120_divsi3:
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        DIV
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        j       $31
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        .end    __vr4120_divsi3
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        .globl  __vr4120_modsi3
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        .ent    __vr4120_modsi3
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__vr4120_modsi3:
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        move    $6,$4           # x1 = x
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        move    $7,$5           # y1 = y
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        DIV
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        mult    $2,$7           # r = r * y1
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        mflo    $2
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        .set    noreorder
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        j       $31
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        subu    $2,$6,$2        # r = x1 - r  in delay slot
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        .end    __vr4120_modsi3

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