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[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [config/] [or32/] [or32.S] - Blame information for rev 433

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Line No. Rev Author Line
1 282 jeremybenn
/*
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 * Assembly functions for software multiplication and devision.
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 */
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#define ENTRY(symbol)   \
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        .align 4        ;\
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        .global symbol  ;\
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symbol:
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#ifdef L__mulsi3
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ENTRY(__mulsi3)
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        l.addi r11,r0,0x0
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        l.sfne r3,r11
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        l.bnf 3f
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        l.ori r5,r3,0x0
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        l.addi r6,r0,0x0
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1:
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        l.andi r3,r5,0x1
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        l.sfeq r3,r6
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        l.bf 2f
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        l.srli r5,r5,0x1
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        l.add r11,r11,r4
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2:
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        l.sfne r5,r6
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        l.bf 1b
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        l.slli r4,r4,0x1
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3:
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        l.jr r9
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        l.nop 0x0
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#endif
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#ifdef L__udivsi3
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ENTRY(__udivsi3)
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        l.addi          r1,r1,-4
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        l.sw            0(r1),r9
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        l.addi          r11,r0,0
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        l.addi          r8,r4,0
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        l.addi          r5,r3,0
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        l.sfne          r8,r11
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        l.bnf           4f
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        l.addi          r7,r0,0
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        l.sfgtu         r8,r5
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        l.bf            5f
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        l.sfeq          r8,r5
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        l.bf            6f
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        l.sfltu         r11,r8
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        l.bnf           2f
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        l.addi          r13,r0,32
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        l.movhi         r9,hi(0x80000000)
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        l.addi          r6,r0,-1
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1:
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        l.and           r3,r5,r9
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        l.slli          r4,r7,1
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        l.addi          r15,r5,0
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        l.srli          r3,r3,31
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        l.add           r13,r13,r6
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        l.or            r7,r4,r3
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        l.sfltu         r7,r8
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        l.bf            1b
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        l.slli          r5,r5,1
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2:
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        l.srli          r7,r7,1
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        l.addi          r13,r13,1
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        l.addi          r9,r0,0
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        l.sfltu         r9,r13
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        l.bnf           4f
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        l.addi          r5,r15,0
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        l.movhi         r15,hi(0x80000000)
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        l.addi          r17,r0,0
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3:
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        l.and           r3,r5,r15
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        l.slli          r4,r7,1
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        l.srli          r3,r3,31
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        l.or            r7,r4,r3
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        l.sub           r6,r7,r8
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        l.and           r3,r6,r15
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        l.srli          r3,r3,31
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        l.addi          r4,r0,0
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        l.sfne          r3,r4
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        l.bf            1f
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        l.slli          r3,r11,1
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        l.addi          r4,r0,1
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1:
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        l.slli          r5,r5,1
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        l.sfne          r4,r17
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        l.bnf           2f
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        l.or            r11,r3,r4
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        l.addi          r7,r6,0
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2:
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        l.addi          r9,r9,1
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        l.sfltu         r9,r13
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        l.bf            3b
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        l.nop           0
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        l.j             4f
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        l.nop           0
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6:
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        l.j             4f
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        l.addi          r11,r0,1
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5:
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        l.addi          r7,r5,0
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4:
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        l.lwz           r9,0(r1)
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        l.jr            r9
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        l.addi          r1,r1,4
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#endif
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#ifdef L__divsi3
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ENTRY(__divsi3)
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        l.addi          r1,r1,-8
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        l.sw            0(r1),r9
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        l.sw            4(r1),r14
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        l.addi          r5,r3,0
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        l.addi          r14,r0,0
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        l.sflts         r5,r0
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        l.bnf           1f
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        l.addi          r3,r0,0
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        l.addi          r14,r0,1
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        l.sub           r5,r0,r5
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1:
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        l.sflts         r4,r0
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        l.bnf           1f
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        l.nop           0
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        l.addi          r14,r14,1
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        l.sub           r4,r0,r4
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1:
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        l.jal           __udivsi3
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        l.addi          r3,r5,0
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        l.sfeqi         r14,1
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        l.bnf           1f
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        l.nop           0
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        l.sub           r11,r0,r11
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1:
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        l.lwz           r9,0(r1)
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        l.lwz           r14,4(r1)
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        l.jr            r9
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        l.addi          r1,r1,8
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#endif
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#ifdef L__umodsi3
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ENTRY(__umodsi3)
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        l.addi          r1,r1,-4
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        l.sw            0(r1),r9
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        l.jal           __udivsi3
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        l.nop           0
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        l.addi          r11,r7,0
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        l.lwz           r9,0(r1)
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        l.jr            r9
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        l.addi          r1,r1,4
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#endif
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#ifdef L__modsi3
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ENTRY(__modsi3)
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        l.addi          r1,r1,-8
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        l.sw            0(r1),r9
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        l.sw            4(r1),r14
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        l.addi          r14,r0,0
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        l.sflts         r3,r0
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        l.bnf           1f
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        l.nop           0
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        l.addi          r14,r0,1
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        l.sub           r3,r0,r3
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1:
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        l.sflts         r4,r0
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        l.bnf           1f
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        l.nop           0
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        l.sub           r4,r0,r4
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1:
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        l.jal           __udivsi3
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        l.nop           0
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        l.sfeqi         r14,1
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        l.bnf           1f
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        l.addi          r11,r7,0
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        l.sub           r11,r0,r11
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1:
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        l.lwz           r9,0(r1)
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        l.lwz           r14,4(r1)
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        l.jr            r9
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        l.addi          r1,r1,8
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#endif

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