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[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [config/] [or32/] [or32.c] - Blame information for rev 444

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1 378 julius
/* Subroutines for insn-output.c for GNU compiler.  OpenRISC 1000 version.
2 282 jeremybenn
   Copyright (C) 1987, 1992, 1997, 1999, 2000, 2001, 2002, 2003, 2004,
3
   2005, 2006, 2007, 2008, 2009, 2010  Free Software Foundation, Inc
4
   Copyright (C) 2010 Embecosm Limited
5
 
6
   Contributed by Damjan Lampret <damjanl@bsemi.com> in 1999.
7
   Major optimizations by Matjaz Breskvar <matjazb@bsemi.com> in 2005.
8 399 jeremybenn
   Updated for GCC 4.5 by Jeremy Bennett <jeremy.bennett@embecoms.com>
9
   and Joern Rennecke <joern.rennecke@embecosm.com> in 2010.
10 282 jeremybenn
 
11
   This file is part of GNU CC.
12
 
13
   This program is free software; you can redistribute it and/or modify it
14
   under the terms of the GNU General Public License as published by the Free
15
   Software Foundation; either version 3 of the License, or (at your option)
16
   any later version.
17
 
18
   This program is distributed in the hope that it will be useful, but WITHOUT
19
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
20
   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
21
   more details.
22
 
23
   You should have received a copy of the GNU General Public License along
24
   with this program.  If not, see <http://www.gnu.org/licenses/>. */
25
 
26
#include "config.h"
27
#include "system.h"
28
#include "coretypes.h"
29
#include "tm.h"
30
#include "rtl.h"
31
#include "tree.h"
32
#include "obstack.h"
33
#include "regs.h"
34
#include "hard-reg-set.h"
35
#include "real.h"
36
#include "insn-config.h"
37
#include "conditions.h"
38
#include "output.h"
39
#include "insn-attr.h"
40
#include "flags.h"
41
#include "reload.h"
42
#include "function.h"
43
#include "expr.h"
44
#include "toplev.h"
45
#include "recog.h"
46
#include "ggc.h"
47
#include "except.h"
48
#include "integrate.h"
49
#include "tm_p.h"
50
#include "target.h"
51
#include "target-def.h"
52
#include "debug.h"
53
#include "langhooks.h"
54
#include "df.h"
55
#include "dwarf2.h"
56
 
57
 
58 332 jeremybenn
/* ========================================================================== */
59
/* Local macros                                                               */
60 282 jeremybenn
 
61 332 jeremybenn
/* Construct a l.movhi instruction for the given reg and value */
62
#define OR32_MOVHI(rd, k)                                               \
63
  ((0x6 << 26) | ((rd) << 21) | (k))
64
 
65
/* Construct a l.ori instruction for the given two regs and value */
66
#define OR32_ORI(rd, ra, k)                                             \
67
  ((0x2a << 26) | ((rd) << 21) | ((ra) << 16) | (k))
68
 
69
/* Construct a l.lwz instruction for the given two registers and offset */
70
#define OR32_LWZ(rd, ra, i)                                             \
71
  ((0x21 << 26) | ((rd) << 21) | ((ra) << 16) | (i))
72
 
73
/* Construct a l.jr instruction for the given register */
74
#define OR32_JR(rb)                                                     \
75
  ((0x11 << 26) | ((rb) << 11))
76
 
77 282 jeremybenn
/* ========================================================================== */
78
/* Static variables (i.e. global to this file only.                           */
79
 
80
 
81
/* Save information from a "cmpxx" pattern until the branch or scc is
82
   emitted. These record the two operands of the "cmpxx" */
83
rtx  or32_compare_op0;
84
rtx  or32_compare_op1;
85
 
86
/*!Stack layout we use for pushing and poping saved registers */
87
static struct
88
{
89
  bool save_lr_p;
90
  int lr_save_offset;
91
  bool save_fp_p;
92
  int fp_save_offset;
93
  int gpr_size;
94
  int gpr_offset;
95
  int total_size;
96
  int vars_size;
97
  int args_size;
98 414 jeremybenn
  int gpr_frame;
99
  int late_frame;
100 282 jeremybenn
  HOST_WIDE_INT mask;
101
}  frame_info;
102
 
103
 
104
/* ========================================================================== */
105
/* Local (i.e. static) utility functions */
106
 
107
/* -------------------------------------------------------------------------- */
108
/*!Must the current function save a register?
109
 
110
   @param[in] regno  The register to consider.
111
 
112
   @return  Non-zero (TRUE) if current function must save "regno", zero
113
            (FALSE) otherwise.                                                */
114
/* -------------------------------------------------------------------------- */
115
static bool
116
or32_save_reg_p (int regno)
117
{
118
  /* No need to save the faked cc0 register.  */
119
  if (regno == OR32_FLAGS_REG)
120
    return false;
121
 
122
  /* Check call-saved registers.  */
123
  if (df_regs_ever_live_p(regno) && !call_used_regs[regno])
124
    return true;
125
 
126
  /* We need to save the old frame pointer before setting up a new
127
     one.  */
128 399 jeremybenn
  if (regno == HARD_FRAME_POINTER_REGNUM && frame_pointer_needed)
129 282 jeremybenn
    return true;
130
 
131
  /* We need to save the incoming return address if it is ever clobbered
132
     within the function.  */
133
  if (regno == LINK_REGNUM && df_regs_ever_live_p(regno))
134
    return true;
135
 
136
  return false;
137
 
138
}       /* or32_save_reg_p () */
139
 
140 399 jeremybenn
bool
141
or32_save_reg_p_cached (int regno)
142
{
143
  return (frame_info.mask & ((HOST_WIDE_INT) 1 << regno)) != 0;
144
}
145
 
146
/* N.B. contrary to the ISA documentation, the stack includes the outgoing
147
   arguments.  */
148 282 jeremybenn
/* -------------------------------------------------------------------------- */
149
/*!Compute full frame size and layout.
150
 
151
   Store information in "frame_info".
152
 
153
   @param[in] size  The size of the function's local variables.
154
 
155
   @return  Total size of stack frame.                                        */
156
/* -------------------------------------------------------------------------- */
157
static HOST_WIDE_INT
158
or32_compute_frame_size (HOST_WIDE_INT size)
159
{
160
  HOST_WIDE_INT args_size;
161
  HOST_WIDE_INT vars_size;
162
  HOST_WIDE_INT stack_offset;
163 414 jeremybenn
  HOST_WIDE_INT save_size;
164 399 jeremybenn
  bool interrupt_p = false;
165 282 jeremybenn
 
166
  int regno;
167
 
168
  args_size = crtl->outgoing_args_size;
169
  vars_size = OR32_ALIGN (size, 4);
170
 
171
  frame_info.args_size = args_size;
172
  frame_info.vars_size = vars_size;
173 414 jeremybenn
  frame_info.gpr_frame = interrupt_p ? or32_redzone : 0;
174 282 jeremybenn
 
175
  /* If the function has local variables, we're committed to
176
     allocating it anyway.  Otherwise reclaim it here.  */
177
  /* FIXME: Verify this.  Got if from the MIPS port.  */
178
  if (vars_size == 0 && current_function_is_leaf)
179
    args_size = 0;
180
 
181 399 jeremybenn
  stack_offset = 0;
182 282 jeremybenn
 
183 399 jeremybenn
  /* Save link register right at the bottom.  */
184 282 jeremybenn
  if (or32_save_reg_p (LINK_REGNUM))
185
    {
186 399 jeremybenn
      stack_offset = stack_offset - UNITS_PER_WORD;
187 282 jeremybenn
      frame_info.lr_save_offset = stack_offset;
188
      frame_info.save_lr_p = true;
189
    }
190
  else
191
    frame_info.save_lr_p = false;
192
 
193
  /* Save frame pointer right after possible link register.  */
194 399 jeremybenn
  if (frame_pointer_needed)
195 282 jeremybenn
    {
196 399 jeremybenn
      stack_offset = stack_offset - UNITS_PER_WORD;
197 282 jeremybenn
      frame_info.fp_save_offset = stack_offset;
198
      frame_info.save_fp_p = true;
199
    }
200
  else
201
    frame_info.save_fp_p = false;
202
 
203
  frame_info.gpr_size = 0;
204
  frame_info.mask = 0;
205
 
206 399 jeremybenn
  for (regno = 0; regno <= OR32_LAST_ACTUAL_REG; regno++)
207 282 jeremybenn
    {
208 399 jeremybenn
      if (regno == LINK_REGNUM
209
          || (frame_pointer_needed && regno == HARD_FRAME_POINTER_REGNUM))
210 282 jeremybenn
        /* These have already been saved if so needed.  */
211
        continue;
212
 
213
      if (or32_save_reg_p (regno))
214
        {
215
          frame_info.gpr_size += UNITS_PER_WORD;
216 399 jeremybenn
          frame_info.mask |= ((HOST_WIDE_INT) 1 << regno);
217 282 jeremybenn
        }
218
    }
219
 
220 414 jeremybenn
  save_size = (frame_info.gpr_size
221
               + (frame_info.save_fp_p ? UNITS_PER_WORD : 0)
222
               + (frame_info.save_lr_p ? UNITS_PER_WORD : 0));
223
  frame_info.total_size = save_size + vars_size + args_size;
224 399 jeremybenn
  gcc_assert (PROLOGUE_TMP != STATIC_CHAIN_REGNUM);
225
  if (frame_info.total_size > 32767 && interrupt_p)
226
    {
227
      int n_extra
228
        = (!!(~frame_info.mask && 1 << PROLOGUE_TMP)
229
           + !!(~frame_info.mask & 1 << EPILOGUE_TMP)) * UNITS_PER_WORD;
230 282 jeremybenn
 
231 414 jeremybenn
      save_size += n_extra;
232 399 jeremybenn
      frame_info.gpr_size += n_extra;
233
      frame_info.total_size += n_extra;
234
      frame_info.mask |= (1 << PROLOGUE_TMP) | (1 << EPILOGUE_TMP);
235
    }
236
 
237
  stack_offset -= frame_info.gpr_size;
238
  frame_info.gpr_offset = stack_offset;
239 414 jeremybenn
  frame_info.late_frame = frame_info.total_size;
240 399 jeremybenn
 
241 414 jeremybenn
  if (save_size > or32_redzone
242
      || (frame_info.gpr_frame
243
          && (frame_info.gpr_frame + frame_info.late_frame <= 32767)))
244
    {
245
      if (frame_info.gpr_frame + frame_info.late_frame <= 32767)
246
        save_size = frame_info.total_size;
247
      frame_info.gpr_frame += save_size;
248
      frame_info.lr_save_offset += save_size;
249
      frame_info.fp_save_offset += save_size;
250
      frame_info.gpr_offset += save_size;
251
      frame_info.late_frame -= save_size;
252
      /* FIXME: check in TARGET_OVERRIDE_OPTIONS for invalid or32_redzone.  */
253
      gcc_assert (frame_info.gpr_frame <= 32767);
254
      gcc_assert ((frame_info.gpr_frame & 3) == 0);
255
    }
256
 
257 282 jeremybenn
  return frame_info.total_size;
258
 
259
}       /* or32_compute_frame_size () */
260
 
261
 
262
/* -------------------------------------------------------------------------- */
263
/*!Emit a frame related insn.
264
 
265
   Same as emit_insn, but sets RTX_FRAME_RELATED_P to one. Getting this right
266
   will matter for DWARF 2 output, if prologues are handled via the "prologue"
267
   pattern rather than target hooks.
268
 
269
   @param[in] insn  The insn to emit.
270
 
271
   @return  The RTX for the emitted insn.                                     */
272
/* -------------------------------------------------------------------------- */
273
static rtx
274
emit_frame_insn (rtx insn)
275
{
276
  insn = emit_insn (insn);
277
  RTX_FRAME_RELATED_P (insn) = 1;
278
  return (insn);
279
 
280
}       /* emit_frame_insn () */
281
 
282
 
283
/* -------------------------------------------------------------------------- */
284 399 jeremybenn
/* Generate a RTX for the indexed memory address based on stack_pointer_rtx
285
   and a displacement
286 282 jeremybenn
 
287
   @param[in] disp  The displacement
288
 
289
   @return  The RTX for the generated address.                                */
290
/* -------------------------------------------------------------------------- */
291
static rtx
292 399 jeremybenn
stack_disp_mem (HOST_WIDE_INT disp)
293 282 jeremybenn
{
294 399 jeremybenn
  return gen_frame_mem (Pmode, plus_constant (stack_pointer_rtx, disp));
295
}
296 282 jeremybenn
 
297
 
298
/* -------------------------------------------------------------------------- */
299
/*!Generate insn patterns to do an integer compare of operands.
300
 
301
   @param[in] code  RTX for the condition code.
302
   @param[in] op0   RTX for the first operand.
303
   @param[in] op1   RTX for the second operand.
304
 
305
   @return  RTX for the comparison.                                           */
306
/* -------------------------------------------------------------------------- */
307
static rtx
308
or32_expand_int_compare (enum rtx_code  code,
309
                         rtx            op0,
310
                         rtx            op1)
311
{
312
  enum machine_mode cmpmode;
313
  rtx tmp, flags;
314
 
315
  cmpmode = SELECT_CC_MODE (code, op0, op1);
316
  flags = gen_rtx_REG (cmpmode, OR32_FLAGS_REG);
317
 
318
  /* This is very simple, but making the interface the same as in the
319
     FP case makes the rest of the code easier.  */
320
  tmp = gen_rtx_COMPARE (cmpmode, op0, op1);
321
  emit_insn (gen_rtx_SET (VOIDmode, flags, tmp));
322
 
323
  /* Return the test that should be put into the flags user, i.e.
324
     the bcc, scc, or cmov instruction.  */
325
  return gen_rtx_fmt_ee (code, VOIDmode, flags, const0_rtx);
326
 
327
}       /* or32_expand_int_compare () */
328
 
329
 
330
/* -------------------------------------------------------------------------- */
331
/*!Generate insn patterns to do an integer compare of operands.
332
 
333
   We only deal with the case where the comparison is an integer
334
   comparison. This wrapper function potentially allows reuse for non-integer
335
   comparison in the future.
336
 
337
   @param[in] code  RTX for the condition code.
338
   @param[in] op0   RTX for the first operand.
339
   @param[in] op1   RTX for the second operand.
340
 
341
   @return  RTX for the comparison.                                           */
342
/* -------------------------------------------------------------------------- */
343
static rtx
344
or32_expand_compare (enum rtx_code code, rtx op0, rtx op1)
345
{
346
  return or32_expand_int_compare (code, op0, op1);
347
 
348
}       /* or32_expand_compare () */
349
 
350
 
351
/* -------------------------------------------------------------------------- */
352
/*!Emit insns to use the l.cmov instruction
353
 
354
   Emit a compare and then cmov. Only works for integer first operand.
355
 
356
   @param[in] dest        RTX for the destination operand.
357
   @param[in] op          RTX for the comparison operation
358
   @param[in] true_cond   RTX to move to dest if condition is TRUE.
359
   @param[in] false_cond  RTX to move to dest if condition is FALSE.
360
 
361
   @return  Non-zero (TRUE) if insns were emitted, zero (FALSE) otherwise.    */
362
/* -------------------------------------------------------------------------- */
363
static int
364
or32_emit_int_cmove (rtx  dest,
365
                     rtx  op,
366
                     rtx  true_cond,
367
                     rtx  false_cond)
368
{
369
  rtx condition_rtx, cr;
370
 
371
  if ((GET_MODE (or32_compare_op0) != SImode) &&
372
      (GET_MODE (or32_compare_op0) != HImode) &&
373
      (GET_MODE (or32_compare_op0) != QImode))
374
    {
375
      return 0;
376
    }
377
 
378
  /* We still have to do the compare, because cmov doesn't do a compare, it
379
     just looks at the FLAG bit set by a previous compare instruction.  */
380
  condition_rtx = or32_expand_compare (GET_CODE (op),
381
                                       or32_compare_op0, or32_compare_op1);
382
 
383
  cr = XEXP (condition_rtx, 0);
384
 
385
  emit_insn (gen_cmov (dest, condition_rtx, true_cond, false_cond, cr));
386
 
387
  return 1;
388
 
389
}       /* or32_emit_int_cmove () */
390
 
391
 
392
/* -------------------------------------------------------------------------- */
393
/*!Calculate stack size for current function.
394
 
395
   We need space for:
396
   - any callee-saved registers that are live in the function
397
   - any local variables
398
   - the return address (if saved)
399
   - the frame pointer (if saved)
400
   - any outgoing arguments.
401
 
402
   We also return information on whether the return address and frame pointer
403
   must be saved, the space required to save callee-saved registers and the
404
   sapce required to save the return address, frame pointer and outgoing
405
   arguments.
406
 
407
   Throughout adjust for OR32 alignment requirements.
408
 
409
   @param[in]  vars           Bytes required for local variables (if any).
410
   @param[out] lr_save_area   Space required for return address (if any).
411
   @param[out] fp_save_area   Space required for frame pointer (if any).
412
   @param[out] gpr_save_area  Space required for callee-saved registers (if
413
                              any).
414
   @param[out] save_area      Space required for outgoing arguments (if any) +
415
                              return address (if any) and frame pointer (if
416
                              any).
417
 
418
   @return  Total space required (if any).                                    */
419
/* -------------------------------------------------------------------------- */
420
static int
421
calculate_stack_size (int  vars,
422
                      int *lr_save_area,
423
                      int *fp_save_area,
424
                      int *gpr_save_area,
425
                      int *save_area)
426
{
427
  int regno;
428
 
429
  *gpr_save_area = 0;
430
  for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
431
    {
432
      if (df_regs_ever_live_p(regno) && !call_used_regs[regno])
433
        *gpr_save_area += 4;
434
    }
435
 
436
  *lr_save_area = (!current_function_is_leaf
437
                   || df_regs_ever_live_p(LINK_REGNUM)) ? 4 : 0;
438
  *fp_save_area = frame_pointer_needed ? 4 : 0;
439
  *save_area    = (OR32_ALIGN (crtl->outgoing_args_size, 4)
440
                   + *lr_save_area + *fp_save_area);
441
 
442
  return *save_area + *gpr_save_area + OR32_ALIGN (vars, 4);
443
 
444
}       /* calculate_stack_size () */
445
 
446
 
447
/* -------------------------------------------------------------------------- */
448
/*!Is this a value suitable for an OR32 address displacement?
449
 
450
   Must be an integer (signed) which fits into 16-bits. If the result is a
451
   double word, we had better also check that we can also get at the second
452
   word.
453
 
454
   @param[in] mode  Mode of the result for which this displacement will be
455
                    used.
456
   @param[in] x     RTX for an expression.
457
 
458
   @return  Non-zero (TRUE) if this is a valid 16-bit offset, zero (FALSE)
459
            otherwise.                                                        */
460
/* -------------------------------------------------------------------------- */
461
static int
462
or32_legitimate_displacement_p (enum machine_mode  mode,
463
                                rtx                x)
464
{
465
  if (CONST_INT == GET_CODE(x))
466
    {
467
      HOST_WIDE_INT  disp = INTVAL (x);
468
 
469
      /* Allow for a second access 4 bytes further on if double. */
470
      if ((DFmode == mode) || (DImode == mode))
471
        {
472
          return  (-32768 < disp) && (disp <= 32763);
473
        }
474
      else
475
        {
476
          return  (-32768 < disp) && (disp <= 32767);
477
        }
478
    }
479
  else
480
    {
481
      return  0;
482
    }
483
}       /* or32_legitimate_displacement_p () */
484
 
485
 
486
/* -------------------------------------------------------------------------- */
487
/*!Can this register be used as a base register?
488
 
489
   We need a strict version, for which the register must either be a hard
490
   register, or already renumbered to a hard register.
491
 
492
   For the non-strict version, any register (other than the flag register will
493
   do).
494
 
495
   @todo The code from the old port does not allow r0 as a base when strict,
496
         and does when non-strict. Surely it is always a valid register?
497
 
498
   @param[in] regno   The register to test
499
   @param[in] strict  Non-zero (TRUE) if this is a strict check, zero (FALSE)
500
                      otherwise.
501
 
502
   @return  Non-zero (TRUE) if this register can be used as a base register,
503
            zero (FALSE) otherwise.                                           */
504
/* -------------------------------------------------------------------------- */
505
static bool
506
or32_regnum_ok_for_base_p (HOST_WIDE_INT  num,
507
                           bool           strict)
508
{
509
  if (strict)
510
    {
511
      return (num < FIRST_PSEUDO_REGISTER)
512
        ? (num > 0) && (num <= OR32_LAST_INT_REG)
513
        : (reg_renumber[num] > 0) && (reg_renumber[num] <= OR32_LAST_INT_REG);
514
    }
515
  else
516
    {
517
      return (num <= OR32_LAST_INT_REG) || (num >= FIRST_PSEUDO_REGISTER);
518
    }
519
}       /* or32_regnum_ok_for_base_p () */
520
 
521
 
522 332 jeremybenn
/* -------------------------------------------------------------------------- */
523
/*!Emit a move from SRC to DEST.
524
 
525
   Assume that the move expanders can handle all moves if !can_create_pseudo_p
526
   ().  The distinction is important because, unlike emit_move_insn, the move
527
   expanders know how to force Pmode objects into the constant pool even when
528
   the constant pool address is not itself legitimate.
529
 
530
   @param[in] dest  Destination of the move.
531
   @param[in] src   Source for the move.
532
 
533
   @return  RTX for the move.                                                 */
534
/* -------------------------------------------------------------------------- */
535 399 jeremybenn
static rtx
536 332 jeremybenn
or32_emit_move (rtx dest, rtx src)
537
{
538
  return (can_create_pseudo_p ()
539
          ? emit_move_insn (dest, src)
540
          : emit_move_insn_1 (dest, src));
541
 
542
}       /* or32_emit_move () */
543
 
544
 
545
/* -------------------------------------------------------------------------- */
546
/*!Emit an instruction of the form (set TARGET (CODE OP0 OP1)).
547
 
548
   @param[in] code    The code for the operation.
549
   @param[in] target  Destination for the set operation.
550
   @param[in] op0     First operand.
551
   @param[in] op1     Second operand.                                         */
552
/* -------------------------------------------------------------------------- */
553
static void
554
or32_emit_binary (enum rtx_code  code,
555
                  rtx            target,
556
                  rtx            op0,
557
                  rtx            op1)
558
{
559
  emit_insn (gen_rtx_SET (VOIDmode, target,
560
                          gen_rtx_fmt_ee (code, GET_MODE (target), op0, op1)));
561
 
562
}       /* or32_emit_binary () */
563
 
564
 
565
/* -------------------------------------------------------------------------- */
566
/*!Compute the result of an operation into a new register.
567
 
568
   Compute ("code" "op0" "op1") and store the result in a new register of mode
569
   "mode".
570
 
571
   @param[in] mode  Mode of the result
572
   @parma[in] code  RTX for the operation to perform
573
   @param[in] op0   RTX for the first operand
574
   @param[in] op1   RTX for the second operand
575
 
576
   @return  The RTX for the new register.                                     */
577
/* -------------------------------------------------------------------------- */
578
static rtx
579
or32_force_binary (enum machine_mode  mode,
580
                   enum rtx_code      code,
581
                   rtx                op0,
582
                   rtx                op1)
583
{
584
  rtx  reg;
585
 
586
  reg = gen_reg_rtx (mode);
587
  or32_emit_binary (code, reg, op0, op1);
588
 
589
  return reg;
590
 
591
}       /* or32_force_binary () */
592
 
593
 
594 282 jeremybenn
/* ========================================================================== */
595 332 jeremybenn
/* Global support functions                                                   */
596
 
597
/* -------------------------------------------------------------------------- */
598
/* Return the size in bytes of the trampoline code.
599
 
600
   Padded to TRAMPOLINE_ALIGNMENT bits. The code sequence is documented in
601
   or32_trampoline_init ().
602
 
603
   This is just the code size. the static chain pointer and target function
604
   address immediately follow.
605
 
606
   @return  The size of the trampoline code in bytes.                         */
607
/* -------------------------------------------------------------------------- */
608
int
609
or32_trampoline_code_size (void)
610
{
611
  const int  TRAMP_BYTE_ALIGN = TRAMPOLINE_ALIGNMENT / 8;
612
 
613
  /* Five 32-bit code words are needed */
614
  return (5 * 4 + TRAMP_BYTE_ALIGN - 1) / TRAMP_BYTE_ALIGN * TRAMP_BYTE_ALIGN;
615
 
616
}       /* or32_trampoline_code_size () */
617
 
618
 
619
/* ========================================================================== */
620 282 jeremybenn
/* Functions to support the Machine Description                               */
621
 
622
 
623
/* -------------------------------------------------------------------------- */
624
/*!Expand a prologue pattern.
625
 
626
   Called after register allocation to add any instructions needed for the
627
   prologue.  Using a prologue insn is favored compared to putting all of the
628
   instructions in output_function_prologue(), since it allows the scheduler
629
   to intermix instructions with the saves of the caller saved registers.  In
630
   some cases, it might be necessary to emit a barrier instruction as the last
631
   insn to prevent such scheduling.
632
 
633
   For the OR32 this is currently controlled by the -mlogue option. It should
634
   be the default, once it is proved to work.                                 */
635
/* -------------------------------------------------------------------------- */
636
void
637
or32_expand_prologue (void)
638
{
639
  int total_size = or32_compute_frame_size (get_frame_size ());
640 399 jeremybenn
  rtx insn;
641 282 jeremybenn
 
642
  if (!total_size)
643
    /* No frame needed.  */
644
    return;
645
 
646 414 jeremybenn
  if (frame_info.gpr_frame)
647
    emit_frame_insn (gen_add2_insn (stack_pointer_rtx,
648
                                    GEN_INT (-frame_info.gpr_frame)));
649 282 jeremybenn
  if (frame_info.save_fp_p)
650
    {
651 399 jeremybenn
      emit_frame_insn (gen_rtx_SET (Pmode,
652
                                    stack_disp_mem (frame_info.fp_save_offset),
653
                                    hard_frame_pointer_rtx));
654 282 jeremybenn
 
655
      emit_frame_insn
656 399 jeremybenn
        (gen_add3_insn (hard_frame_pointer_rtx, stack_pointer_rtx, const0_rtx));
657 282 jeremybenn
    }
658
  if (frame_info.save_lr_p)
659
    {
660
 
661
      emit_frame_insn
662 399 jeremybenn
        (gen_rtx_SET (Pmode, stack_disp_mem (frame_info.lr_save_offset),
663 282 jeremybenn
                      gen_rtx_REG (Pmode, LINK_REGNUM)));
664
    }
665
  if (frame_info.gpr_size)
666
    {
667
      int offset = 0;
668
      int regno;
669
 
670 399 jeremybenn
      for (regno = 0; regno <= OR32_LAST_ACTUAL_REG; regno++)
671 282 jeremybenn
        {
672 399 jeremybenn
          if (!(frame_info.mask & ((HOST_WIDE_INT) 1 << regno)))
673 282 jeremybenn
            continue;
674
 
675
          emit_frame_insn
676
            (gen_rtx_SET (Pmode,
677 399 jeremybenn
                          stack_disp_mem (frame_info.gpr_offset + offset),
678 282 jeremybenn
                          gen_rtx_REG (Pmode, regno)));
679
          offset = offset + UNITS_PER_WORD;
680
        }
681
    }
682 399 jeremybenn
 
683
  /* Update the stack pointer to reflect frame size.  */
684 414 jeremybenn
  total_size = frame_info.late_frame;
685 399 jeremybenn
  insn = gen_add2_insn (stack_pointer_rtx, GEN_INT (-total_size));
686 414 jeremybenn
  if (total_size > 32768)
687 399 jeremybenn
    {
688
      rtx note = insn;
689
      rtx value_rtx = gen_rtx_REG (Pmode, PROLOGUE_TMP);
690
 
691
      or32_emit_set_const32 (value_rtx, GEN_INT (-total_size));
692
      insn = emit_frame_insn (gen_add2_insn (stack_pointer_rtx, value_rtx));
693
      add_reg_note (insn, REG_FRAME_RELATED_EXPR, note);
694
    }
695 414 jeremybenn
  else if (total_size)
696 399 jeremybenn
    emit_frame_insn (insn);
697
 
698 282 jeremybenn
}       /* or32_expand_prologue () */
699
 
700
 
701
/* -------------------------------------------------------------------------- */
702
/*!Expand an epilogue pattern.
703
 
704
   Called after register allocation to add any instructions needed for the
705
   epilogue.  Using an epilogue insn is favored compared to putting all of the
706
   instructions in output_function_epilogue(), since it allows the scheduler
707
   to intermix instructions with the restores of the caller saved registers.
708
   In some cases, it might be necessary to emit a barrier instruction as the
709
   first insn to prevent such scheduling.
710
 
711
   For the OR32 this is currently controlled by the -mlogue option. It should
712
   be the default, once it is proved to work.
713
 
714 399 jeremybenn
   @param[in] sibcall  The sibcall epilogue insn if this is a sibcall return,
715
                       NULL_RTX otherwise.                                             */
716 282 jeremybenn
/* -------------------------------------------------------------------------- */
717
void
718 399 jeremybenn
or32_expand_epilogue (rtx sibcall)
719 282 jeremybenn
{
720
  int total_size = or32_compute_frame_size (get_frame_size ());
721 399 jeremybenn
  int sibcall_regno = FIRST_PSEUDO_REGISTER;
722 282 jeremybenn
 
723 399 jeremybenn
  if (sibcall)
724 282 jeremybenn
    {
725 399 jeremybenn
      sibcall = next_nonnote_insn (sibcall);
726
      gcc_assert (CALL_P (sibcall) && SIBLING_CALL_P (sibcall));
727
      sibcall = XVECEXP (PATTERN (sibcall), 0, 0);
728
      if (GET_CODE (sibcall) == SET)
729
        sibcall = SET_SRC (sibcall);
730
      gcc_assert (GET_CODE (sibcall) == CALL);
731
      sibcall = XEXP (sibcall, 0);
732
      gcc_assert (MEM_P (sibcall));
733
      sibcall = XEXP (sibcall, 0);
734
      if (REG_P (sibcall))
735
        sibcall_regno = REGNO (sibcall);
736
      else
737
        gcc_assert (CONSTANT_P (sibcall));
738 282 jeremybenn
    }
739 399 jeremybenn
  if (frame_info.save_fp_p)
740
    {
741 414 jeremybenn
      emit_insn (gen_frame_dealloc_fp ());
742 399 jeremybenn
      emit_insn
743
        (gen_rtx_SET (Pmode, hard_frame_pointer_rtx,
744
                      stack_disp_mem (frame_info.fp_save_offset)));
745
    }
746 282 jeremybenn
  else
747 399 jeremybenn
    {
748
      rtx value_rtx;
749 282 jeremybenn
 
750 414 jeremybenn
      total_size = frame_info.late_frame;
751 399 jeremybenn
      if (total_size > 32767)
752
        {
753
          value_rtx = gen_rtx_REG (Pmode, EPILOGUE_TMP);
754
          or32_emit_set_const32 (value_rtx, GEN_INT (total_size));
755
        }
756 414 jeremybenn
      else if (frame_info.late_frame)
757 399 jeremybenn
        value_rtx = GEN_INT (total_size);
758
      if (total_size)
759 414 jeremybenn
        emit_insn (gen_frame_dealloc_sp (value_rtx));
760 399 jeremybenn
    }
761
 
762 282 jeremybenn
  if (frame_info.save_lr_p)
763
    {
764
      emit_insn
765
        (gen_rtx_SET (Pmode, gen_rtx_REG (Pmode, LINK_REGNUM),
766 399 jeremybenn
                      stack_disp_mem (frame_info.lr_save_offset)));
767 282 jeremybenn
    }
768
 
769
  if (frame_info.gpr_size)
770
    {
771
      int offset = 0;
772
      int regno;
773
 
774 399 jeremybenn
      for (regno = 0; regno <= OR32_LAST_ACTUAL_REG; regno++)
775 282 jeremybenn
        {
776 399 jeremybenn
          if (!(frame_info.mask & ((HOST_WIDE_INT) 1 << regno)))
777 282 jeremybenn
            continue;
778
 
779 399 jeremybenn
          if (regno != sibcall_regno)
780
            emit_insn
781
              (gen_rtx_SET (Pmode, gen_rtx_REG (Pmode, regno),
782
                            stack_disp_mem (frame_info.gpr_offset + offset)));
783 282 jeremybenn
          offset = offset + UNITS_PER_WORD;
784
        }
785
    }
786
 
787 414 jeremybenn
  if (frame_info.gpr_frame)
788
    emit_insn (gen_add2_insn (stack_pointer_rtx,
789
                              GEN_INT (frame_info.gpr_frame)));
790 282 jeremybenn
  if (!sibcall)
791 399 jeremybenn
    emit_jump_insn (gen_return_internal (gen_rtx_REG (Pmode, 9)));
792 282 jeremybenn
 
793
}       /* or32_expand_epilogue () */
794
 
795 399 jeremybenn
/* We are outputting a jump which needs JUMP_ADDRESS, which is the
796
   register it uses as jump destination, restored,
797
   e.g. a sibcall using a callee-saved register.
798
   Emit the register restore as delay slot insn.  */
799
void
800
or32_print_jump_restore (rtx jump_address)
801
{
802
  int regno, jump_regno;
803
  HOST_WIDE_INT offset = frame_info.gpr_offset;
804 282 jeremybenn
 
805 399 jeremybenn
  gcc_assert (REG_P (jump_address));
806
  jump_regno = REGNO (jump_address);
807
  for (regno = 0; regno != jump_regno; regno++)
808
    {
809
      gcc_assert (regno <= OR32_LAST_ACTUAL_REG);
810
      if (!(frame_info.mask & ((HOST_WIDE_INT) 1 << regno)))
811
        continue;
812
      offset = offset + UNITS_PER_WORD;
813
    }
814
  asm_fprintf (asm_out_file, "\n\tl.lwz\tr%d,"HOST_WIDE_INT_PRINT_DEC"(r1)\n",
815
               jump_regno, offset);
816
}
817
 
818
 
819 282 jeremybenn
/* -------------------------------------------------------------------------- */
820
/*!Generate assembler code for a movdi/movdf pattern
821
 
822
   @param[in] operands  Operands to the movdx pattern.
823
 
824
   @return  The assembler string to output (always "", since we've done the
825
            output here).                                                     */
826
/* -------------------------------------------------------------------------- */
827
const char *
828
or32_output_move_double (rtx *operands)
829
{
830
  rtx xoperands[3];
831
 
832
  switch (GET_CODE (operands[0]))
833
    {
834
    case REG:
835
      if (GET_CODE (operands[1]) == REG)
836
        {
837
          if (REGNO (operands[0]) == REGNO (operands[1]) + 1)
838
            {
839
              output_asm_insn ("\tl.or    \t%H0, %H1, r0", operands);
840
              output_asm_insn ("\tl.or    \t%0, %1, r0", operands);
841
              return "";
842
            }
843
          else
844
            {
845
              output_asm_insn ("\tl.or    \t%0, %1, r0", operands);
846
              output_asm_insn ("\tl.or    \t%H0, %H1, r0", operands);
847
              return "";
848
            }
849
        }
850
      else if (GET_CODE (operands[1]) == MEM)
851
        {
852
          xoperands[1] = XEXP (operands[1], 0);
853
          if (GET_CODE (xoperands[1]) == REG)
854
            {
855
              xoperands[0] = operands[0];
856
              if (REGNO (xoperands[0]) == REGNO (xoperands[1]))
857
                {
858
                  output_asm_insn ("\tl.lwz   \t%H0, 4(%1)", xoperands);
859
                  output_asm_insn ("\tl.lwz   \t%0, 0(%1)", xoperands);
860
                  return "";
861
                }
862
              else
863
                {
864
                  output_asm_insn ("\tl.lwz   \t%0, 0(%1)", xoperands);
865
                  output_asm_insn ("\tl.lwz   \t%H0, 4(%1)", xoperands);
866
                  return "";
867
                }
868
            }
869
          else if (GET_CODE (xoperands[1]) == PLUS)
870
            {
871
              if (GET_CODE (xoperands[2] = XEXP (xoperands[1], 1)) == REG)
872
                {
873
                  xoperands[0] = operands[0];
874
                  xoperands[1] = XEXP (xoperands[1], 0);
875
                  if (REGNO (xoperands[0]) == REGNO (xoperands[2]))
876
                    {
877
                      output_asm_insn ("\tl.lwz   \t%H0, %1+4(%2)",
878
                                       xoperands);
879
                      output_asm_insn ("\tl.lwz   \t%0, %1(%2)", xoperands);
880
                      return "";
881
                    }
882
                  else
883
                    {
884
                      output_asm_insn ("\tl.lwz   \t%0, %1(%2)", xoperands);
885
                      output_asm_insn ("\tl.lwz   \t%H0, %1+4(%2)",
886
                                       xoperands);
887
                      return "";
888
                    }
889
                }
890
              else if (GET_CODE (xoperands[2] = XEXP (xoperands[1], 0)) ==
891
                       REG)
892
                {
893
                  xoperands[0] = operands[0];
894
                  xoperands[1] = XEXP (xoperands[1], 1);
895
                  if (REGNO (xoperands[0]) == REGNO (xoperands[2]))
896
                    {
897
                      output_asm_insn ("\tl.lwz   \t%H0, %1+4(%2)",
898
                                       xoperands);
899
                      output_asm_insn ("\tl.lwz   \t%0, %1(%2)", xoperands);
900
                      return "";
901
                    }
902
                  else
903
                    {
904
                      output_asm_insn ("\tl.lwz   \t%0, %1(%2)", xoperands);
905
                      output_asm_insn ("\tl.lwz   \t%H0, %1+4(%2)",
906
                                       xoperands);
907
                      return "";
908
                    }
909
                }
910
              else
911
                abort ();
912
            }
913
          else
914
            abort ();
915
        }
916
      else if (GET_CODE (operands[1]) == CONST_INT)
917
        {
918
          if (INTVAL (operands[1]) < 0)
919
            output_asm_insn ("\tl.addi  \t%0, r0, -1", operands);
920
          else
921
            output_asm_insn ("\tl.or    \t%0, r0, r0", operands);
922
          output_asm_insn ("\tl.movhi \t%H0, hi(%1)", operands);
923
          output_asm_insn ("\tl.ori   \t%H0, %H0, lo(%1)", operands);
924
          return "";
925
        }
926
      else
927
        abort ();
928
    case MEM:
929
      xoperands[0] = XEXP (operands[0], 0);
930
      if (GET_CODE (xoperands[0]) == REG)
931
        {
932
          xoperands[1] = operands[1];
933
          output_asm_insn ("\tl.sw    \t0(%0), %1", xoperands);
934
          output_asm_insn ("\tl.sw    \t4(%0), %H1", xoperands);
935
          return "";
936
        }
937
      else if (GET_CODE (xoperands[0]) == PLUS)
938
        {
939
          if (GET_CODE (xoperands[1] = XEXP (xoperands[0], 1)) == REG)
940
            {
941
              xoperands[0] = XEXP (xoperands[0], 0);
942
              xoperands[2] = operands[1];
943
              output_asm_insn ("\tl.sw    \t%0(%1), %2", xoperands);
944
              output_asm_insn ("\tl.sw    \t%0+4(%1), %H2", xoperands);
945
              return "";
946
            }
947
          else if (GET_CODE (xoperands[1] = XEXP (xoperands[0], 0)) == REG)
948
            {
949
              xoperands[0] = XEXP (xoperands[0], 1);
950
              xoperands[2] = operands[1];
951
              output_asm_insn ("\tl.sw    \t%0(%1), %2", xoperands);
952
              output_asm_insn ("\tl.sw    \t%0+4(%1), %H2", xoperands);
953
              return "";
954
            }
955
          else
956
            abort ();
957
        }
958
      else
959
        {
960
          fprintf (stderr, "  O/p error %s\n",
961
                   GET_RTX_NAME (GET_CODE (xoperands[0])));
962
          return "";
963
          /* abort (); */
964
        }
965
    default:
966
      abort ();
967
    }
968
}       /* or32_output_move_double () */
969
 
970
 
971
/* -------------------------------------------------------------------------- */
972
/*!Expand a conditional branch
973
 
974
   @param[in] operands  Operands to the branch.
975
   @param[in] mode      Mode of the comparison.                               */
976
/* -------------------------------------------------------------------------- */
977
void
978
or32_expand_conditional_branch (rtx               *operands,
979
                                enum machine_mode  mode)
980
{
981
  rtx tmp;
982
  enum rtx_code test_code = GET_CODE(operands[0]);
983
 
984
  switch (mode)
985
    {
986
    case SImode:
987
      tmp = or32_expand_compare (test_code, operands[1], operands[2]);
988
      tmp = gen_rtx_IF_THEN_ELSE (VOIDmode,
989
                                  tmp,
990
                                  gen_rtx_LABEL_REF (VOIDmode, operands[3]),
991
                                  pc_rtx);
992
      emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, tmp));
993
      return;
994
 
995
    case SFmode:
996
      tmp = or32_expand_compare (test_code, operands[1], operands[2]);
997
      tmp = gen_rtx_IF_THEN_ELSE (VOIDmode,
998
                                  tmp,
999
                                  gen_rtx_LABEL_REF (VOIDmode, operands[3]),
1000
                                  pc_rtx);
1001
      emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, tmp));
1002
      return;
1003
 
1004
    default:
1005
      abort ();
1006
    }
1007
 
1008
}       /* or32_expand_conditional_branch () */
1009
 
1010
 
1011
/* -------------------------------------------------------------------------- */
1012
/*!Emit a conditional move
1013
 
1014
   move "true_cond" to "dest" if "op" of the operands of the last comparison
1015
   is nonzero/true, "false_cond" if it is zero/false.
1016
 
1017
   @param[in] dest        RTX for the destination operand.
1018
   @param[in] op          RTX for the comparison operation
1019
   @param[in] true_cond   RTX to move to dest if condition is TRUE.
1020
   @param[in] false_cond  RTX to move to dest if condition is FALSE.
1021
 
1022
   @return  Non-zero (TRUE) if the hardware supports such an operation, zero
1023
            (FALSE) otherwise.                                                */
1024
/* -------------------------------------------------------------------------- */
1025
int
1026
or32_emit_cmove (rtx  dest,
1027
                 rtx  op,
1028
                 rtx  true_cond,
1029
                 rtx  false_cond)
1030
{
1031
  enum machine_mode result_mode = GET_MODE (dest);
1032
 
1033
  if (GET_MODE (true_cond) != result_mode)
1034
    return 0;
1035
 
1036
  if (GET_MODE (false_cond) != result_mode)
1037
    return 0;
1038
 
1039
  /* First, work out if the hardware can do this at all */
1040
  return or32_emit_int_cmove (dest, op, true_cond, false_cond);
1041
 
1042
}       /* or32_emit_cmove () */
1043
 
1044
 
1045
/* -------------------------------------------------------------------------- */
1046
/*!Output the assembler for a branch on flag instruction.
1047
 
1048
   @param[in] operands  Operands to the branch.
1049
 
1050
   @return  The assembler string to use.                                      */
1051
/* -------------------------------------------------------------------------- */
1052
const char *
1053
or32_output_bf (rtx * operands)
1054
{
1055
  enum rtx_code code;
1056
  enum machine_mode mode_calc, mode_got;
1057
 
1058
  code      = GET_CODE (operands[1]);
1059
  mode_calc = SELECT_CC_MODE (code, or32_compare_op0, or32_compare_op1);
1060
  mode_got  = GET_MODE (operands[2]);
1061
 
1062 399 jeremybenn
  if (mode_calc != mode_got)
1063
    return "l.bnf\t%l0%(";
1064 282 jeremybenn
  else
1065 399 jeremybenn
    return "l.bf\t%l0%(";
1066 282 jeremybenn
}       /* or32_output_bf () */
1067
 
1068
 
1069
/* -------------------------------------------------------------------------- */
1070
/*!Output the assembler for a conditional move instruction.
1071
 
1072
   @param[in] operands  Operands to the conditional move.
1073
 
1074
   @return  The assembler string to use.                                      */
1075
/* -------------------------------------------------------------------------- */
1076
const char *
1077
or32_output_cmov (rtx * operands)
1078
{
1079
  enum rtx_code code;
1080
  enum machine_mode mode_calc, mode_got;
1081
 
1082
  code      = GET_CODE (operands[1]);
1083
  mode_calc = SELECT_CC_MODE (code, or32_compare_op0, or32_compare_op1);
1084
  mode_got  = GET_MODE (operands[4]);
1085
 
1086
  if (mode_calc != mode_got)
1087
    return "\tl.cmov\t%0,%3,%2";        /* reversed */
1088
  else
1089
    return "\tl.cmov\t%0,%2,%3";
1090
 
1091
}       /* or32_output_cmov () */
1092
 
1093
 
1094
/* -------------------------------------------------------------------------- */
1095
/*!Expand a sibcall pattern.
1096
 
1097
   For now this is very simple way for sibcall support (i.e tail call
1098
   optimization).
1099
 
1100
   @param[in] result     Not sure. RTX for the result location?
1101
   @param[in] addr       Not sure. RXT for the address to call?
1102
   @param[in] args_size  Not sure. RTX for the size of the args (in bytes?)?  */
1103
/* -------------------------------------------------------------------------- */
1104
void
1105
or32_expand_sibcall (rtx  result ATTRIBUTE_UNUSED,
1106
                     rtx  addr,
1107
                     rtx  args_size)
1108
{
1109
  emit_call_insn (gen_sibcall_internal (addr, args_size));
1110
 
1111
}       /* or32_expand_sibcall () */
1112
 
1113
 
1114
/* -------------------------------------------------------------------------- */
1115
/*!Load a 32-bit constant.
1116
 
1117
   We know it can't be done in one insn when we get here, the movsi expander
1118
   guarantees this.
1119
 
1120
   @param[in] op0  RTX for the destination.
1121
   @param[in] op1  RTX for the (constant) source.                             */
1122
/* -------------------------------------------------------------------------- */
1123
void
1124
or32_emit_set_const32 (rtx  op0,
1125
                       rtx  op1)
1126
{
1127
  enum machine_mode mode = GET_MODE (op0);
1128
  rtx temp;
1129
 
1130
  /* Sanity check that we really can't do it in one instruction. I.e that we
1131
     don't have a 16-bit constant. */
1132
  if (GET_CODE (op1) == CONST_INT)
1133
    {
1134
      HOST_WIDE_INT val = INTVAL (op1) & GET_MODE_MASK (mode);
1135
 
1136
      if ((-32768 <= val) && (val <= 32767))
1137
        {
1138
          abort ();
1139
        }
1140
    }
1141
 
1142
  /* Full 2-insn decomposition is needed.  */
1143
  if (reload_in_progress || reload_completed)
1144
    temp = op0;
1145
  else
1146
    temp = gen_reg_rtx (mode);
1147
 
1148
  if (GET_CODE (op1) == CONST_INT)
1149
    {
1150
      /* Emit them as real moves instead of a HIGH/LO_SUM,
1151
         this way CSE can see everything and reuse intermediate
1152
         values if it wants.  */
1153
      emit_insn (gen_rtx_SET (VOIDmode, temp,
1154
                              GEN_INT (INTVAL (op1)
1155
                                       & ~(HOST_WIDE_INT) 0xffff)));
1156
 
1157
      emit_insn (gen_rtx_SET (VOIDmode,
1158
                              op0,
1159
                              gen_rtx_IOR (mode, temp,
1160
                                           GEN_INT (INTVAL (op1) & 0xffff))));
1161
    }
1162
  else
1163
    {
1164
      /* since or32 bfd can not deal with relocs that are not of type
1165
         OR32_CONSTH_RELOC + OR32_CONST_RELOC (ie move high must be
1166
         followed by exactly one lo_sum)
1167
       */
1168
      emit_insn (gen_movsi_insn_big (op0, op1));
1169
    }
1170
}       /* or32_emit_set_const32 () */
1171
 
1172
 
1173
/* ========================================================================== */
1174
/* Target hook functions.
1175
 
1176
   These are initialized at the end of this file, to avoid having to
1177
   predeclare all the functions. They are only needed here, so are static.    */
1178
 
1179
 
1180
/* -------------------------------------------------------------------------- */
1181
/*!Set up the stack and frame pointer (if desired) for the function.
1182
 
1183
   If defined, a function that outputs the assembler code for entry to a
1184
   function. The prologue is responsible for setting up the stack frame,
1185
   initializing the frame pointer register, saving registers that must be
1186
   saved, and allocating "size" additional bytes of storage for the local
1187
   variables. "size" is an integer. "file" is a stdio stream to which the
1188
   assembler code should be output.
1189
 
1190
   The label for the beginning of the function need not be output by this
1191
   macro. That has already been done when the macro is run.
1192
 
1193
   To determine which registers to save, the macro can refer to the array
1194
   "regs_ever_live": element "r" is nonzero if hard register "r" is used
1195
   anywhere within the function.  This implies the function prologue should
1196
   save register r, provided it is not one of the call-used
1197
   registers. (TARGET_ASM_FUNCTION_EPILOGUE must likewise use
1198
   "regs_ever_live".)
1199
 
1200
   On machines that have "register windows", the function entry code does not
1201
   save on the stack the registers that are in the windows, even if they are
1202
   supposed to be preserved by function calls; instead it takes appropriate
1203
   steps to “push” the register stack, if any non-call-used registers are used
1204
   in the function.
1205
 
1206
   On machines where functions may or may not have frame-pointers, the
1207
   function entry code must vary accordingly; it must set up the frame pointer
1208
   if one is wanted, and not otherwise. To determine whether a frame pointer
1209
   is in wanted, the macro can refer to the variable frame_pointer_needed. The
1210
   variable’s value will be 1 at run time in a function that needs a frame
1211
   pointer. See the section on "Eliminating Frame Pointer and Arg Pointer" in
1212
   the "Target Description Macros and Functions" chapter of the GCC internals
1213
   manual.
1214
 
1215
   The function entry code is responsible for allocating any stack space
1216
   required for the function. This stack space consists of the regions listed
1217
   below. In most cases, these regions are allocated in the order listed, with
1218
   the last listed region closest to the top of the stack (the lowest address
1219
   if STACK_GROWS_DOWNWARD is defined, and the highest address if it is not
1220
   defined). You can use a different order for a machine if doing so is more
1221
   convenient or required for compatibility reasons. Except in cases where
1222
   required by standard or by a debugger, there is no reason why the stack
1223
   layout used by GCC need agree with that used by other compilers for a
1224
   machine.
1225
 
1226
   @param[in] file  File handle for any generated code.
1227
   @param[in] size  Number of bytes of storage needed for local variables.    */
1228
/* -------------------------------------------------------------------------- */
1229
static void
1230
or32_output_function_prologue (FILE          *file,
1231
                               HOST_WIDE_INT  size)
1232
{
1233
  int save_area;
1234
  int gpr_save_area;
1235
  int lr_save_area;
1236
  int fp_save_area;
1237
  int stack_size;
1238
  int regno;
1239
 
1240
  /* If we are doing the prologue using the "prologue" pattern in the machine
1241
     description, do nothing more here.
1242
 
1243
     JPB 30-Aug-10: Surely that is not correct. If this option is set, we
1244
     should never even be called! */
1245 399 jeremybenn
  if (TARGET_SCHED_LOGUE)
1246 282 jeremybenn
    return;
1247
 
1248
  if (size < 0)
1249
    abort ();
1250
 
1251
  /* Work out and log the frame size */
1252
  stack_size = calculate_stack_size (size, &lr_save_area, &fp_save_area,
1253
                                     &gpr_save_area, &save_area);
1254
 
1255
  fprintf (file,
1256
           "\n\t# gpr_save_area %d size %ld crtl->outgoing_args_size %d\n",
1257
           gpr_save_area, size, crtl->outgoing_args_size);
1258
 
1259
  /* Decrement the stack pointer by the total frame size (if we have a
1260
     frame). */
1261
  if (stack_size > 0)
1262
    {
1263
      /* Special code for large stack frames */
1264
      if (stack_size >= 0x8000)
1265
        {
1266
          fprintf (file, "\tl.movhi\tr%d,hi(%d)\n", GP_ARG_RETURN, stack_size);
1267
          fprintf (file, "\tl.ori\tr%d,r%d,lo(%d)\n", GP_ARG_RETURN,
1268
                   GP_ARG_RETURN, stack_size);
1269
          fprintf (file, "\tl.sub\tr%d,r%d,r%d\n", STACK_POINTER_REGNUM,
1270
                   STACK_POINTER_REGNUM, GP_ARG_RETURN);
1271
        }
1272
      else
1273
        {
1274
          fprintf (file, "\tl.addi\tr%d,r%d,%d\n", STACK_POINTER_REGNUM,
1275
                   STACK_POINTER_REGNUM, -stack_size);
1276
        }
1277
 
1278
      /* Update the DWARF2 CFA using the new stack pointer. After this the CFA
1279
         will be the SP + frame size, i.e. the FP (or start of frame if we
1280
         don't actually have a FP). All register refs should relate to this. */
1281
      if (dwarf2out_do_frame ())
1282
        {
1283
          char *l = dwarf2out_cfi_label (false);
1284
 
1285
          dwarf2out_def_cfa (l, STACK_POINTER_REGNUM, stack_size);
1286
        }
1287
    }
1288
 
1289
  /* Update the frame pointer if necessary */
1290
  if (fp_save_area)
1291
    {
1292
      char *l     = dwarf2out_cfi_label (false);
1293
      int  offset = OR32_ALIGN (crtl->outgoing_args_size, 4) + lr_save_area;
1294
 
1295
      fprintf (file, "\tl.sw\t%d(r%d),r%d\n", offset,
1296 399 jeremybenn
               STACK_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM);
1297 282 jeremybenn
 
1298
      if (stack_size >= 0x8000)
1299 399 jeremybenn
        fprintf (file, "\tl.add\tr%d,r%d,r%d\n", HARD_FRAME_POINTER_REGNUM,
1300 282 jeremybenn
                 STACK_POINTER_REGNUM, GP_ARG_RETURN);
1301
      else
1302 399 jeremybenn
        fprintf (file, "\tl.addi\tr%d,r%d,%d\n", HARD_FRAME_POINTER_REGNUM,
1303 282 jeremybenn
                 STACK_POINTER_REGNUM, stack_size);
1304
 
1305
      /* The CFA is already pointing at the start of our frame (i.e. the new
1306
         FP). The old FP has been saved relative to the SP, so we need to use
1307
         stack_size to work out where. */
1308 399 jeremybenn
      dwarf2out_reg_save (l, HARD_FRAME_POINTER_REGNUM, offset - stack_size);
1309 282 jeremybenn
    }
1310
 
1311
  /* Save the return address if necessary */
1312
  if (lr_save_area)
1313
    {
1314
      char *l     = dwarf2out_cfi_label (false);
1315
      int  offset = OR32_ALIGN (crtl->outgoing_args_size, 4);
1316
 
1317
      fprintf (file, "\tl.sw\t%d(r%d),r%d\n", offset, STACK_POINTER_REGNUM,
1318
               LINK_REGNUM);
1319
 
1320
      /* The CFA is already pointing at the start of our frame (i.e. the new
1321
         FP). The LR has been saved relative to the SP, so we need to use
1322
         stack_size to work out where. */
1323 399 jeremybenn
      dwarf2out_reg_save (l, HARD_FRAME_POINTER_REGNUM, offset - stack_size);
1324 282 jeremybenn
    }
1325
 
1326
  save_area = (OR32_ALIGN (crtl->outgoing_args_size, 4)
1327
               + lr_save_area + fp_save_area);
1328
 
1329
  /* Save any callee saved registers */
1330
  for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1331
    {
1332
      if (df_regs_ever_live_p(regno) && !call_used_regs[regno])
1333
        {
1334
          char *l = dwarf2out_cfi_label (false);
1335
 
1336
          fprintf (file, "\tl.sw\t%d(r%d),r%d\n", save_area,
1337
                   STACK_POINTER_REGNUM, regno);
1338
 
1339
          /* The CFA is already pointing at the start of our frame (i.e. the
1340
             new FP). The register has been saved relative to the SP, so we
1341
             need to use stack_size to work out where. */
1342 399 jeremybenn
          dwarf2out_reg_save (l, HARD_FRAME_POINTER_REGNUM,
1343
                              save_area - stack_size);
1344 282 jeremybenn
          save_area += 4;
1345
        }
1346
    }
1347
}       /* or32_output_function_prologue () */
1348
 
1349
 
1350
/* -------------------------------------------------------------------------- */
1351
/*!Do any necessary cleanup after a function to restore stack, frame, and regs.
1352
 
1353
   This is a function that outputs the assembler code for exit from a
1354
   function. The epilogue is responsible for restoring the saved registers and
1355
   stack pointer to their values when the function was called, and returning
1356
   control to the caller. This macro takes the same arguments as the macro
1357
   TARGET_ASM_FUNCTION_PROLOGUE, and the registers to restore are determined
1358
   from regs_ever_live and CALL_USED_REGISTERS in the same way (@see
1359
   or32_output_function_prologue ()) .
1360
 
1361
   On some machines, there is a single instruction that does all the work of
1362
   returning from the function. On these machines, give that instruction the
1363
   name "return" (in the machine definition) and do not define the macro
1364
   TARGET_ASM_FUNCTION_EPILOGUE at all.
1365
 
1366
   Do not define a pattern named "return" if you want the
1367
   TARGET_ASM_FUNCTION_EPILOGUE to be used. If you want the target switches to
1368
   control whether return instructions or epilogues are used, define a
1369
   "return" pattern with a validity condition that tests the target switches
1370
   appropriately. If the "return" pattern’s validity condition is false,
1371
   epilogues will be used.
1372
 
1373
   On machines where functions may or may not have frame-pointers, the
1374
   function exit code must vary accordingly. Sometimes the code for these two
1375
   cases is completely different. To determine whether a frame pointer is
1376
   wanted, the macro can refer to the variable frame_pointer_needed. The
1377
   variable’s value will be 1 when compiling a function that needs a frame
1378
   pointer.
1379
 
1380
   Normally, TARGET_ASM_FUNCTION_PROLOGUE and TARGET_ASM_FUNCTION_EPILOGUE
1381
   must treat leaf functions specially. The C variable
1382
   "current_function_is_leaf" is nonzero for such a function. See "Handling
1383
   Leaf Functions" in the "Target Description Macros and Functions" section of
1384
   the GCC internals manual.
1385
 
1386
   On some machines, some functions pop their arguments on exit while others
1387
   leave that for the caller to do. For example, the 68020 when given "-mrtd"
1388
   pops arguments in functions that take a fixed number of arguments.
1389
 
1390
   Your definition of the macro RETURN_POPS_ARGS decides which functions pop
1391
   their own arguments. TARGET_ASM_FUNCTION_EPILOGUE needs to know what was
1392
   decided.  The number of bytes of the current function’s arguments that this
1393
   function should pop is available in "crtl->args.pops_args". See "How Scalar
1394
   Function Values Are Returned" in the "Target Description Macros and
1395
   Functions" section of the GCC internals manual.
1396
 
1397
   @param[in] file  File handle for any generated code.
1398
   @param[in] size  Number of bytes of storage needed for local variables.    */
1399
/* -------------------------------------------------------------------------- */
1400
static void
1401
or32_output_function_epilogue (FILE * file, HOST_WIDE_INT size)
1402
{
1403
  int save_area;
1404
  int gpr_save_area;
1405
  int lr_save_area;
1406
  int fp_save_area;
1407
  int stack_size;
1408
  int regno;
1409
 
1410
  /* If we are doing the epilogue using the "epilogue" pattern in the machine
1411
     description, do nothing more here.
1412
 
1413
     JPB 30-Aug-10: Surely that is not correct. If this option is set, we
1414
     should never even be called! */
1415 399 jeremybenn
  if (TARGET_SCHED_LOGUE)
1416 282 jeremybenn
    return;
1417
 
1418
  /* Work out the frame size */
1419
  stack_size = calculate_stack_size (size, &lr_save_area, &fp_save_area,
1420
                                     &gpr_save_area, &save_area);
1421
 
1422
  /* Restore the return address if necessary */
1423
  if (lr_save_area)
1424
    {
1425
      fprintf (file, "\tl.lwz\tr%d,%d(r%d)\n", LINK_REGNUM,
1426
               OR32_ALIGN (crtl->outgoing_args_size, 4),
1427
               STACK_POINTER_REGNUM);
1428
    }
1429
 
1430
  /* Restore the frame pointer if necessary */
1431
  if (fp_save_area)
1432
    {
1433 399 jeremybenn
      fprintf (file, "\tl.lwz\tr%d,%d(r%d)\n", HARD_FRAME_POINTER_REGNUM,
1434 282 jeremybenn
               OR32_ALIGN (crtl->outgoing_args_size, 4)
1435
               + lr_save_area, STACK_POINTER_REGNUM);
1436
    }
1437
 
1438
  save_area = (OR32_ALIGN (crtl->outgoing_args_size, 4)
1439
               + lr_save_area + fp_save_area);
1440
 
1441
  /* Restore any callee-saved registers */
1442
  for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1443
    {
1444
      if (df_regs_ever_live_p(regno) && !call_used_regs[regno])
1445
        {
1446
          fprintf (file, "\tl.lwz\tr%d,%d(r%d)\n", regno, save_area,
1447
                   STACK_POINTER_REGNUM);
1448
          save_area += 4;
1449
        }
1450
    }
1451
 
1452
  /* Restore the stack pointer (if necessary) */
1453
  if (stack_size >= 0x8000)
1454
    {
1455
      fprintf (file, "\tl.movhi\tr3,hi(%d)\n", stack_size);
1456
      fprintf (file, "\tl.ori\tr3,r3,lo(%d)\n", stack_size);
1457
 
1458 399 jeremybenn
      fprintf (file, "\tl.jr\tr%d\n", LINK_REGNUM);
1459 282 jeremybenn
 
1460
      fprintf (file, "\tl.add\tr%d,r%d,r3\n", STACK_POINTER_REGNUM,
1461
               STACK_POINTER_REGNUM);
1462
    }
1463
  else if (stack_size > 0)
1464
    {
1465 399 jeremybenn
      fprintf (file, "\tl.jr\tr%d\n", LINK_REGNUM);
1466 282 jeremybenn
 
1467
      fprintf (file, "\tl.addi\tr%d,r%d,%d\n", STACK_POINTER_REGNUM,
1468
               STACK_POINTER_REGNUM, stack_size);
1469
    }
1470
  else
1471
    {
1472 399 jeremybenn
      fprintf (file, "\tl.jr\tr%d\n", LINK_REGNUM);
1473 282 jeremybenn
 
1474
      fprintf (file, "\tl.nop\n");              /* Delay slot */
1475
    }
1476
}       /* or32_output_function_epilogue () */
1477
 
1478
 
1479
/* -------------------------------------------------------------------------- */
1480
/*!Define where a function returns values.
1481
 
1482
   Define this to return an RTX representing the place where a function
1483
   returns or receives a value of data type ret type, a tree node representing
1484
   a data type.  "func" is a tree node representing FUNCTION_DECL or
1485
   FUNCTION_TYPE of a function being called. If "outgoing" is false, the hook
1486
   should compute the register in which the caller will see the return
1487
   value. Otherwise, the hook should return an RTX representing the place
1488
   where a function returns a value.
1489
 
1490
   On many machines, only TYPE_MODE ("ret_type") is relevant. (Actually, on
1491
   most machines, scalar values are returned in the same place regardless of
1492
   mode.) The value of the expression is usually a reg RTX for the hard
1493
   register where the return value is stored. The value can also be a parallel
1494
   RTX, if the return value is in multiple places. See FUNCTION_ARG for an
1495
   explanation of the parallel form. Note that the callee will populate every
1496
   location specified in the parallel, but if the first element of the
1497
   parallel contains the whole return value, callers will use that element as
1498
   the canonical location and ignore the others. The m68k port uses this type
1499
   of parallel to return pointers in both ‘%a0’ (the canonical location) and
1500
   ‘%d0’.
1501
 
1502
   If TARGET_PROMOTE_FUNCTION_RETURN returns true, you must apply the same
1503
   promotion rules specified in PROMOTE_MODE if valtype is a scalar type.
1504
 
1505
   If the precise function being called is known, "func" is a tree node
1506
   (FUNCTION_DECL) for it; otherwise, "func" is a null pointer. This makes it
1507
   possible to use a different value-returning convention for specific
1508
   functions when all their calls are known.
1509
 
1510
   Some target machines have "register windows" so that the register in which
1511
   a function returns its value is not the same as the one in which the caller
1512
   sees the value. For such machines, you should return different RTX
1513
   depending on outgoing.
1514
 
1515
   TARGET_FUNCTION_VALUE is not used for return values with aggregate data
1516
   types, because these are returned in another way. See
1517
   TARGET_STRUCT_VALUE_RTX and related macros.
1518
 
1519
   For the OR32, we can just use the result of LIBCALL_VALUE, since all
1520
   functions return their result in the same place (register rv = r11).
1521
 
1522
   JPB 30-Aug-10: What about 64-bit scalar returns (long long int, double),
1523
                  which also use rvh (=r12)?
1524
 
1525
   @param[in] ret_type  The return type of the function.
1526
   @param[in] func      Tree representing function being called.
1527
   @param[in] outgoing  Non-zero (TRUE) if the result represents where the
1528
                        function places the results, zero (FALSE) if the
1529
                        result represents where the caller sees the result.
1530
 
1531
   @return  A RTX representing where the result can be found.                 */
1532
/* -------------------------------------------------------------------------- */
1533
static rtx
1534
or32_function_value (const_tree  ret_type,
1535
                     const_tree  func ATTRIBUTE_UNUSED,
1536
                     bool        outgoing ATTRIBUTE_UNUSED)
1537
{
1538
  return LIBCALL_VALUE (TYPE_MODE(ret_type));
1539
 
1540
}       /* or32_function_value () */
1541
 
1542
 
1543
/* -------------------------------------------------------------------------- */
1544
/*!Check if a function is suitable for tail call optimization.
1545
 
1546
   True if it is OK to do sibling call optimization for the specified call
1547
   expression "exp". "decl" will be the called function, or NULL if this is an
1548
   indirect call.
1549
 
1550
   It is not uncommon for limitations of calling conventions to prevent tail
1551
   calls to functions outside the current unit of translation, or during PIC
1552
   compilation. The hook is used to enforce these restrictions, as the sibcall
1553
   md pattern can not fail, or fall over to a “normal” call. The criteria for
1554
   successful sibling call optimization may vary greatly between different
1555
   architectures.
1556
 
1557 399 jeremybenn
   For the OR32, we currently allow sibcall optimization whenever
1558
   -foptimize-sibling-calls is enabled.
1559 282 jeremybenn
 
1560
   @param[in] decl  The function for which we may optimize
1561
   @param[in] exp   The call expression which is candidate for optimization.
1562
 
1563
   @return  Non-zero (TRUE) if sibcall optimization is permitted, zero (FALSE)
1564
            otherwise.                                                        */
1565
/* -------------------------------------------------------------------------- */
1566
static bool
1567
or32_function_ok_for_sibcall (tree  decl ATTRIBUTE_UNUSED,
1568
                              tree  exp ATTRIBUTE_UNUSED)
1569
{
1570 414 jeremybenn
  /* Assume up to 31 registers of 4 bytes might be saved.  */
1571
  return or32_redzone >= 31 * 4;
1572 282 jeremybenn
}       /* or32_function_ok_for_sibcall () */
1573
 
1574
 
1575
/* -------------------------------------------------------------------------- */
1576
/*!Should an argument be passed by reference.
1577
 
1578
   This target hook should return true if an argument at the position
1579
   indicated by "cum" should be passed by reference. This predicate is queried
1580
   after target independent reasons for being passed by reference, such as
1581
   TREE_ADDRESSABLE ("type").
1582
 
1583
   If the hook returns TRUE, a copy of that argument is made in memory and a
1584
   pointer to the argument is passed instead of the argument itself. The
1585
   pointer is passed in whatever way is appropriate for passing a pointer to
1586
   that type.
1587
 
1588
   For the OR32, all aggregates and arguments greater than 8 bytes are passed
1589
   this way.
1590
 
1591
   @param[in] cum    Position of argument under consideration.
1592
   @param[in[ mode   Not sure what this relates to.
1593
   @param[in] type   Type of the argument.
1594
   @param[in] named  Not sure what this relates to.
1595
 
1596
   @return  Non-zero (TRUE) if the argument should be passed by reference,
1597
            zero (FALSE) otherwise.                                           */
1598
/* -------------------------------------------------------------------------- */
1599
static bool
1600
or32_pass_by_reference (CUMULATIVE_ARGS   *cum ATTRIBUTE_UNUSED,
1601
                        enum machine_mode  mode ATTRIBUTE_UNUSED,
1602
                        const_tree         type,
1603
                        bool               named ATTRIBUTE_UNUSED)
1604
{
1605
  return (type && (AGGREGATE_TYPE_P (type) || int_size_in_bytes (type) > 8));
1606
 
1607
}       /* or32_pass_by_reference () */
1608
 
1609
 
1610 399 jeremybenn
#if 0
1611 282 jeremybenn
/* -------------------------------------------------------------------------- */
1612
/*!Is a frame pointer required?
1613
 
1614
   This target hook should return TRUE if a function must have and use a frame
1615
   pointer.  This target hook is called in the reload pass. If its return
1616
   value is TRUE the function will have a frame pointer.
1617
 
1618
   This target hook can in principle examine the current function and decide
1619
   according to the facts, but on most machines the constant false or the
1620
   constant true suffices.  Use FALSE when the machine allows code to be
1621
   generated with no frame pointer, and doing so saves some time or space. Use
1622
   TRUE when there is no possible advantage to avoiding a frame pointer.
1623
 
1624
   In certain cases, the compiler does not know how to produce valid code
1625
   without a frame pointer. The compiler recognizes those cases and
1626
   automatically gives the function a frame pointer regardless of what
1627
   TARGET_FRAME_POINTER_REQUIRED returns.  You don’t need to worry about them.
1628
 
1629
   In a function that does not require a frame pointer, the frame pointer
1630
   register can be allocated for ordinary usage, unless you mark it as a fixed
1631
   register. See FIXED_REGISTERS for more information.
1632
 
1633
   Default return value is false.
1634
 
1635
   For the OR32 we do not need the frame pointer, so the default would have
1636
   sufficed.
1637
 
1638
   JPB 30-Aug-10: The version supplied returned TRUE, which is patently the
1639
                  wrong answer. This function really could be eliminated and
1640
                  the default used.
1641
 
1642
   @return  Non-zero (TRUE) if a frame pointer is not required, zero (FALSE)
1643
            otherwise.                                                        */
1644
/* -------------------------------------------------------------------------- */
1645
static bool
1646
or32_frame_pointer_required (void)
1647
{
1648
        return 1;
1649
 
1650
}       /* or32_frame_pointer_required () */
1651 399 jeremybenn
#endif
1652 282 jeremybenn
 
1653 399 jeremybenn
int
1654
or32_initial_elimination_offset(int from, int to)
1655
{
1656
  or32_compute_frame_size (get_frame_size ());
1657 414 jeremybenn
  return ((from == FRAME_POINTER_REGNUM
1658
           ? frame_info.gpr_offset : frame_info.gpr_frame)
1659
          + (to == STACK_POINTER_REGNUM ? frame_info.late_frame : 0));
1660 399 jeremybenn
}
1661 282 jeremybenn
 
1662 399 jeremybenn
 
1663 282 jeremybenn
/* -------------------------------------------------------------------------- */
1664
/*!How many bytes at the beginning of an argument must be put into registers.
1665
 
1666
   This target hook returns the number of bytes at the beginning of an
1667
   argument that must be put in registers. The value must be zero for
1668
   arguments that are passed entirely in registers or that are entirely pushed
1669
   on the stack.
1670
 
1671
   On some machines, certain arguments must be passed partially in registers
1672
   and partially in memory. On these machines, typically the first few words
1673
   of arguments a re passed in registers, and the rest on the stack. If a
1674
   multi-word argument (a double or a structure) crosses that boundary, its
1675
   first few words must be passed in registers and the rest must be
1676
   pushed. This macro tells the compiler when this occurs, and how many bytes
1677
   should go in registers.
1678
 
1679
   FUNCTION_ARG for these arguments should return the first register to be
1680
   used by the caller for this argument; likewise FUNCTION_INCOMING_ARG, for
1681
   the called function.
1682
 
1683
   On the OR32 we never split argumetns between registers and memory.
1684
 
1685
   JPB 30-Aug-10: Is this correct? Surely we should allow this. The ABI spec
1686
                  is incomplete on this point.
1687
 
1688
   @param[in] cum    Position of argument under consideration.
1689
   @param[in[ mode   Not sure what this relates to.
1690
   @param[in] type   Type of the argument.
1691
   @param[in] named  Not sure what this relates to.
1692
 
1693
   @return  The number of bytes of the argument to go into registers          */
1694
/* -------------------------------------------------------------------------- */
1695
static int
1696
or32_arg_partial_bytes (CUMULATIVE_ARGS   *cum ATTRIBUTE_UNUSED,
1697
                        enum machine_mode  mode ATTRIBUTE_UNUSED,
1698
                        tree               type ATTRIBUTE_UNUSED,
1699
                        bool               named ATTRIBUTE_UNUSED)
1700
{
1701
  return 0;
1702
 
1703
}       /* or32_arg_partial_bytes () */
1704
 
1705
 
1706
/* -------------------------------------------------------------------------- */
1707
/*!Promote the mode of a function's arguments/return value.
1708
 
1709
   Like PROMOTE_MODE, but it is applied to outgoing function arguments or
1710
   function return values. The target hook should return the new mode and
1711
   possibly change "*punsignedp" if the promotion should change
1712
   signedness. This function is called only for scalar or pointer types.
1713
 
1714
   "for_return" allows to distinguish the promotion of arguments and return
1715
   values. If it is 1, a return value is being promoted and
1716
   TARGET_FUNCTION_VALUE must perform the same promotions done here. If it is
1717
   2, the returned mode should be that of the register in which an incoming
1718
   parameter is copied, or the outgoing result is computed; then the hook
1719
   should return the same mode as PROMOTE_MODE, though the signedness may be
1720
   different.
1721
 
1722
   The default is to not promote arguments and return values. You can also
1723
   define the hook to "default_promote_function_mode_always_promote" if you
1724
   would like to apply the same rules given by PROMOTE_MODE.
1725
 
1726
   For the OR32, if the size of the mode is integral and less than 4, we
1727
   promote to SImode, otherwise we return the mode we are supplied.
1728
 
1729
   @param[in]  type        Not sure. Type of the argument?
1730
   @param[in]  mode        The mode of argument/return value to consider.
1731
   @param[out] punsignedp  Signedness of the value.
1732
   @param[in]  fntype      Not sure. Type of the function?
1733
   @param[in]  for_return  1 if a return value, 2 if an incoming value.
1734
 
1735
   @return  The new mode.                                                     */
1736
/* -------------------------------------------------------------------------- */
1737
static enum machine_mode
1738
or32_promote_function_mode (const_tree         type ATTRIBUTE_UNUSED,
1739
                            enum machine_mode  mode,
1740
                            int               *punsignedp ATTRIBUTE_UNUSED,
1741
                            const_tree         fntype ATTRIBUTE_UNUSED,
1742
                            int                for_return ATTRIBUTE_UNUSED)
1743
{
1744
  return (   (GET_MODE_CLASS (mode) == MODE_INT)
1745
          && (GET_MODE_SIZE (mode) < 4)) ? SImode : mode;
1746
 
1747
}       /* or32_promote_function_mode () */
1748
 
1749
 
1750
/* -------------------------------------------------------------------------- */
1751
/*!Is this a legitimate address?
1752
 
1753
  A function that returns whether x (an RTX) is a legitimate memory address on
1754
  the target machine for a memory operand of mode mode.
1755
 
1756
  Legitimate addresses are defined in two variants: a strict variant and a
1757
  non-strict one.  The strict parameter chooses which variant is desired by
1758
  the caller.
1759
 
1760
  The strict variant is used in the reload pass. It must be defined so that
1761
  any pseudo- register that has not been allocated a hard register is
1762
  considered a memory reference.  This is because in contexts where some kind
1763
  of register is required, a pseudo-register with no hard register must be
1764
  rejected. For non-hard registers, the strict variant should look up the
1765
  reg_renumber array; it should then proceed using the hard register number in
1766
  the array, or treat the pseudo as a memory reference if the array holds -1.
1767
 
1768
  The non-strict variant is used in other passes. It must be defined to accept
1769
  all pseudo-registers in every context where some kind of register is
1770
  required.
1771
 
1772
  Normally, constant addresses which are the sum of a symbol_ref and an
1773
  integer are stored inside a const RTX to mark them as constant. Therefore,
1774
  there is no need to recognize such sums specifically as legitimate
1775
  addresses. Normally you would simply recognize any const as legitimate.
1776
 
1777
  Usually PRINT_OPERAND_ADDRESS is not prepared to handle constant sums that
1778
  are not marked with const. It assumes that a naked plus indicates
1779
  indexing. If so, then you must reject such naked constant sums as
1780
  illegitimate addresses, so that none of them will be given to
1781
  PRINT_OPERAND_ADDRESS.
1782
 
1783
  On some machines, whether a symbolic address is legitimate depends on the
1784
  section that the address refers to. On these machines, define the target
1785
  hook TARGET_ENCODE_ SECTION_INFO to store the information into the
1786
  symbol_ref, and then check for it here. When you see a const, you will have
1787
  to look inside it to find the symbol_ref in order to determine the
1788
  section. See the internals manual section on "Assembler Format" for more
1789
  info.
1790
 
1791
  Some ports are still using a deprecated legacy substitute for this hook, the
1792
  GO_IF_LEGITIMATE_ADDRESS macro. This macro has this syntax:
1793
 
1794
    #define GO_IF_LEGITIMATE_ADDRESS (mode, x, label )
1795
 
1796
  and should goto label if the address x is a valid address on the target
1797
  machine for a memory operand of mode mode. Whether the strict or non-strict
1798
  variants are desired is defined by the REG_OK_STRICT macro introduced
1799
  earlier in this section. Using the hook is usually simpler because it limits
1800
  the number of files that are recompiled when changes are made.
1801
 
1802
   The OR32 only has a single addressing mode, which is a base register with
1803
   16-bit displacement. We can accept just 16-bit constants as addresses (they
1804
   can use r0 as base address, and we can accept plain registers as addresses
1805
   (they can use a displacement of zero).
1806
 
1807
   @param[in] mode    The mode of the address
1808
   @param[in] x       The address (RTX)
1809
   @param[in] strict  Non-zero (TRUE) if we are in "strict" mode, zero (FALSE)
1810
                      otherwise.
1811
 
1812
   @return  Non-zero (TRUE) if this is a legitimate address, zero (FALSE)
1813
            otherwise.                                                        */
1814
/* -------------------------------------------------------------------------- */
1815
static bool
1816 378 julius
or32_legitimate_address_p (enum machine_mode  mode ATTRIBUTE_UNUSED,
1817 282 jeremybenn
                           rtx                x,
1818
                           bool               strict)
1819
{
1820
  /* You might think 16-bit constants are suitable. They can be built into
1821
     addresses using r0 as the base. However this seems to lead to defective
1822
     code. So for now this is a placeholder, and this code is not used.
1823
 
1824
     if (or32_legitimate_displacement_p (mode, x))
1825
       {
1826
         return  1;
1827
       }
1828
  */
1829
 
1830
  /* Addresses consisting of a register and 16-bit displacement are also
1831
     suitable. We need the mode, since for double words, we had better be
1832
     able to address the full 8 bytes. */
1833
  if (GET_CODE(x) == PLUS)
1834
    {
1835
      rtx reg = XEXP(x,0);
1836
 
1837
      /* If valid register... */
1838
      if ((GET_CODE(reg) == REG)
1839 377 julius
          && or32_regnum_ok_for_base_p (REGNO (reg), strict))
1840 282 jeremybenn
        {
1841
          rtx offset = XEXP(x,1);
1842
 
1843
          /* ...and valid offset */
1844
          if (or32_legitimate_displacement_p (mode, offset))
1845
            {
1846
              return 1;
1847
            }
1848
        }
1849
    }
1850
 
1851
  /* Addresses consisting of just a register are OK. They can be built into
1852
     addresses using an offset of zero (and an offset of four if double
1853
     word). */
1854 378 julius
  if (GET_CODE(x) == REG
1855
    && or32_regnum_ok_for_base_p(REGNO(x),strict)) {
1856 282 jeremybenn
      return 1;
1857 378 julius
  }
1858 282 jeremybenn
 
1859
  return 0;
1860 378 julius
}
1861 282 jeremybenn
 
1862
/* -------------------------------------------------------------------------- */
1863 332 jeremybenn
/*!Initialize a trampoline for nested functions.
1864
 
1865
   A nested function is defined by *two* pieces of information, the address of
1866
   the function (like any other function) and a pointer to the frame of the
1867
   enclosing function. The latter is required to allow the nested function to
1868
   access local variables in the enclosing function's frame.
1869
 
1870
   This represents a problem, since a function in C is represented as an
1871
   address that can be held in a single variable as a pointer. Requiring two
1872
   pointers will not fit.
1873
 
1874
   The solution is documented in "Lexical Closures for C++" by Thomas
1875
   M. Breuel (USENIX C++ Conference Proceedings, October 17-21, 1988). The
1876
   nested function is represented by a small block of code and data on the
1877
   enclosing function's stack frame, which sets up a pointer to the enclosing
1878
   function's stack frame (the static chain pointer) in a register defined by
1879
   the ABI, and then jumps to the code of the function proper.
1880
 
1881
   The function can be represented as a single pointer to this block of code,
1882
   known as a trampoline, which when called generates both pointers
1883
   needed. The nested function (which knows it is a nested function at compile
1884
   time) can then generate code to access the enclosing frame via the static
1885
   chain register.
1886
 
1887
   There is a catch that the trampoline is set up as data, but executed as
1888
   instructions. The former will be via the data cache, the latter via the
1889
   instruction cache. There is a risk that a later trampoline will not be seen
1890
   by the instruction cache, so the wrong code will be executed. So the
1891
   instruction cache should be flushed for the trampoline address range.
1892
 
1893
   This hook is called to initialize a trampoline. "m_tramp" is an RTX for the
1894
   memory block for the trampoline; "fndecl" is the FUNCTION_DECL for the
1895
   nested function; "static_chain" is an RTX for the static chain value that
1896
   should be passed to the function when it is called.
1897
 
1898
   If the target defines TARGET_ASM_TRAMPOLINE_TEMPLATE, then the first thing
1899
   this hook should do is emit a block move into "m_tramp" from the memory
1900
   block returned by assemble_trampoline_template. Note that the block move
1901
   need only cover the constant parts of the trampoline. If the target
1902
   isolates the variable parts of the trampoline to the end, not all
1903
   TRAMPOLINE_SIZE bytes need be copied.
1904
 
1905
   If the target requires any other actions, such as flushing caches or
1906
   enabling stack execution, these actions should be performed after
1907
   initializing the trampoline proper.
1908
 
1909
   For the OR32, no static chain register is used. We choose to use the return
1910 399 jeremybenn
   value (rv) register. The code is based on that for MIPS.
1911
   The trampoline code is:
1912 332 jeremybenn
 
1913 399 jeremybenn
              l.movhi r11,hi(end_addr)
1914
              l.ori   r11,lo(end_addr)
1915
              l.lwz   r13,4(r11)
1916 332 jeremybenn
              l.jr    r13
1917 399 jeremybenn
              l.lwz   r11,0(r11)
1918 332 jeremybenn
      end_addr:
1919
              .word   <static chain>
1920
              .word   <nested_function>
1921
 
1922
   @note For the OR32 we need to flush the instruction cache, which is a
1923
         privileged operation. Needs fixing.
1924
 
1925
   @param[in] m_tramp      The lowest address of the trampoline on the stack.
1926
   @param[in] fndecl       Declaration of the enclosing function.
1927
   @param[in] chain_value  Static chain pointer to pass to the nested
1928
                           function.                                          */
1929
/* -------------------------------------------------------------------------- */
1930
static void
1931
or32_trampoline_init (rtx   m_tramp,
1932
                      tree  fndecl,
1933
                      rtx   chain_value)
1934
{
1935
  rtx  addr;                            /* Start address of the trampoline */
1936
  rtx  end_addr;                        /* End address of the code block */
1937
 
1938
  rtx  high;                            /* RTX for the high part of end_addr */
1939
  rtx  low;                             /* RTX for the low part of end_addr */
1940
  rtx  opcode;                          /* RTX for generated opcodes */
1941
  rtx  mem;                             /* RTX for trampoline memory */
1942
 
1943
  rtx trampoline[5];                    /* The trampoline code */
1944
 
1945
  unsigned int  i;                      /* Index into trampoline */
1946
  unsigned int  j;                      /* General counter */
1947
 
1948
  HOST_WIDE_INT  end_addr_offset;         /* Offset to end of code */
1949
  HOST_WIDE_INT  static_chain_offset;     /* Offset to stack chain word */
1950
  HOST_WIDE_INT  target_function_offset;  /* Offset to func address word */
1951
 
1952
  /* Work out the offsets of the pointers from the start of the trampoline
1953
     code.  */
1954
  end_addr_offset        = or32_trampoline_code_size ();
1955
  static_chain_offset    = end_addr_offset;
1956
  target_function_offset = static_chain_offset + GET_MODE_SIZE (ptr_mode);
1957
 
1958
  /* Get pointers in registers to the beginning and end of the code block.  */
1959
  addr     = force_reg (Pmode, XEXP (m_tramp, 0));
1960
  end_addr = or32_force_binary (Pmode, PLUS, addr, GEN_INT (end_addr_offset));
1961
 
1962
  /* Build up the code in TRAMPOLINE.
1963
 
1964 399 jeremybenn
              l.movhi r11,hi(end_addr)
1965
              l.ori   r11,lo(end_addr)
1966
              l.lwz   r13,4(r11)
1967 332 jeremybenn
              l.jr    r13
1968 399 jeremybenn
              l.lwz   r11,0(r11)
1969 332 jeremybenn
       end_addr:
1970
  */
1971
 
1972
  i = 0;
1973
 
1974
  /* Break out the high and low parts of the end_addr */
1975
  high = expand_simple_binop (SImode, LSHIFTRT, end_addr, GEN_INT (16),
1976
                              NULL, false, OPTAB_WIDEN);
1977
  low  = convert_to_mode (SImode, gen_lowpart (HImode, end_addr), true);
1978
 
1979
  /* Emit the l.movhi, adding an operation to OR in the high bits from the
1980
     RTX. */
1981 399 jeremybenn
  opcode = gen_int_mode (OR32_MOVHI (11, 0), SImode);
1982 332 jeremybenn
  trampoline[i++] = expand_simple_binop (SImode, IOR, opcode, high, NULL,
1983
                                         false, OPTAB_WIDEN);
1984
 
1985
  /* Emit the l.ori, adding an operations to OR in the low bits from the
1986
     RTX. */
1987 399 jeremybenn
  opcode = gen_int_mode (OR32_ORI (11, 11, 0), SImode);
1988 332 jeremybenn
  trampoline[i++] = expand_simple_binop (SImode, IOR, opcode, low, NULL,
1989
                                         false, OPTAB_WIDEN);
1990
 
1991
  /* Emit the l.lwz of the function address. No bits to OR in here, so we can
1992
     do the opcode directly. */
1993
  trampoline[i++] =
1994 399 jeremybenn
    gen_int_mode (OR32_LWZ (13, 11, target_function_offset - end_addr_offset),
1995 332 jeremybenn
                  SImode);
1996
 
1997
  /* Emit the l.jr of the function. No bits to OR in here, so we can do the
1998
     opcode directly. */
1999
  trampoline[i++] = gen_int_mode (OR32_JR (13), SImode);
2000
 
2001
  /* Emit the l.lwz of the static chain. No bits to OR in here, so we can
2002
     do the opcode directly. */
2003
  trampoline[i++] =
2004 399 jeremybenn
    gen_int_mode (OR32_LWZ (STATIC_CHAIN_REGNUM, 11,
2005 332 jeremybenn
                            static_chain_offset - end_addr_offset), SImode);
2006
 
2007
  /* Copy the trampoline code.  Leave any padding uninitialized.  */
2008
  for (j = 0; j < i; j++)
2009
    {
2010
      mem = adjust_address (m_tramp, SImode, j * GET_MODE_SIZE (SImode));
2011
      or32_emit_move (mem, trampoline[j]);
2012
    }
2013
 
2014
  /* Set up the static chain pointer field.  */
2015
  mem = adjust_address (m_tramp, ptr_mode, static_chain_offset);
2016
  or32_emit_move (mem, chain_value);
2017
 
2018
  /* Set up the target function field.  */
2019
  mem = adjust_address (m_tramp, ptr_mode, target_function_offset);
2020
  or32_emit_move (mem, XEXP (DECL_RTL (fndecl), 0));
2021
 
2022
  /* Flushing the trampoline from the instruction cache needs to be done
2023
     here. */
2024
 
2025
}       /* or32_trampoline_init () */
2026
 
2027
 
2028
/* -------------------------------------------------------------------------- */
2029 282 jeremybenn
/*!Provide support for DW_AT_calling_convention
2030
 
2031
   Define this to enable the dwarf attribute DW_AT_calling_convention to be
2032
   emitted for each function. Instead of an integer return the enum value for
2033
   the DW_CC_ tag.
2034
 
2035
   To support optional call frame debugging information, you must also define
2036
   INCOMING_RETURN_ADDR_RTX and either set RTX_FRAME_RELATED_P on the prologue
2037
   insns if you use RTL for the prologue, or call "dwarf2out_def_cfa" and
2038
   "dwarf2out_reg_save" as appropriate from TARGET_ASM_FUNCTION_PROLOGUE if
2039
   you don’t.
2040
 
2041
   For the OR32, it should be sufficient to return DW_CC_normal in all cases.
2042
 
2043
   @param[in] function  The function requiring debug information
2044
 
2045
   @return  The enum of the DW_CC tag.                                        */
2046
/* -------------------------------------------------------------------------- */
2047
static int
2048
or32_dwarf_calling_convention (const_tree  function ATTRIBUTE_UNUSED)
2049
{
2050
  return  DW_CC_normal;
2051
 
2052
}       /* or32_dwarf_calling_convention () */
2053
 
2054 399 jeremybenn
/* If DELTA doesn't fit into a 16 bit signed number, emit instructions to
2055
   add the highpart to DST; return the signed-16-bit lowpart of DELTA.
2056
   TMP_REGNO is a register that may be used to load a constant.  */
2057
static HOST_WIDE_INT
2058
or32_output_highadd (FILE *file,
2059
                     const char *dst, int tmp_regno, HOST_WIDE_INT delta)
2060
{
2061
  if (delta < -32768 || delta > 32767)
2062
    {
2063
      if (delta >= -65536 && delta < 65534)
2064
        {
2065
          asm_fprintf (file, "\tl.addi\t%s,%s,%d\n",
2066
                       dst, dst, (int) (delta + 1) >> 1);
2067
          delta >>= 1;
2068
        }
2069
      else
2070
        {
2071
          const char *tmp = reg_names[tmp_regno];
2072
          HOST_WIDE_INT high = (delta + 0x8000) >> 16;
2073 282 jeremybenn
 
2074 399 jeremybenn
          gcc_assert (call_used_regs[tmp_regno]);
2075
          asm_fprintf (file, "\tl.movhi\t%s,%d\n" "\tl.add\t%s,%s,%s\n",
2076
                 tmp, (int) high,
2077
                 dst, dst, tmp);
2078
          delta -= high << 16;
2079
        }
2080
    }
2081
  return delta;
2082
}
2083
 
2084
/* Output a tailcall to FUNCTION.  The caller will fill in the delay slot.  */
2085 402 jeremybenn
static void
2086 399 jeremybenn
or32_output_tailcall (FILE *file, tree function)
2087
{
2088
  /* We'll need to add more code if we want to fully support PIC.  */
2089
  gcc_assert (!flag_pic || (*targetm.binds_local_p) (function));
2090
 
2091
  fputs ("\tl.j\t", file);
2092
  assemble_name (file, XSTR (XEXP (DECL_RTL (function), 0), 0));
2093
  fputc ('\n', file);
2094
}
2095
 
2096
static void
2097
or32_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED,
2098
                      HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,
2099
                      tree function)
2100
{
2101
  int this_regno
2102
    = aggregate_value_p (TREE_TYPE (TREE_TYPE (function)), function) ? 4 : 3;
2103
  const char *this_name = reg_names[this_regno];
2104
 
2105
 
2106
  delta = or32_output_highadd (file, this_name, PROLOGUE_TMP, delta);
2107
  if (!vcall_offset)
2108
    or32_output_tailcall (file, function);
2109
  if (delta || !vcall_offset)
2110
    asm_fprintf (file, "\tl.addi\t%s,%s,%d\n",
2111
                 this_name, this_name, (int) delta);
2112
 
2113
  /* If needed, add *(*THIS + VCALL_OFFSET) to THIS.  */
2114
  if (vcall_offset != 0)
2115
    {
2116
      const char *tmp_name = reg_names[PROLOGUE_TMP];
2117
 
2118
      /* l.lwz tmp,0(this)           --> tmp = *this
2119
         l.lwz tmp,vcall_offset(tmp) --> tmp = *(*this + vcall_offset)
2120
         add this,this,tmp           --> this += *(*this + vcall_offset) */
2121
 
2122
      asm_fprintf (file, "\tl.lwz\t%s,0(%s)\n",
2123
                   tmp_name, this_name);
2124
      vcall_offset = or32_output_highadd (file, tmp_name,
2125
                                          STATIC_CHAIN_REGNUM, vcall_offset);
2126
      asm_fprintf (file, "\tl.lwz\t%s,%d(%s)\n",
2127
                   tmp_name, (int) vcall_offset, tmp_name);
2128
      or32_output_tailcall (file, function);
2129
      asm_fprintf (file, "\tl.add\t%s,%s,%s\n", this_name, this_name, tmp_name);
2130
    }
2131
}
2132
 
2133
 
2134 282 jeremybenn
/* ========================================================================== */
2135
/* Target hook initialization.
2136
 
2137
   In most cases these use the static functions declared above. They have
2138
   defaults, so must be undefined first, before being redefined.
2139
 
2140 333 jeremybenn
   The description of what they do is found with the function above, unless it
2141
   is a standard function or a constant, in which case it is defined here (as
2142
   with TARGET_ASM_NAMED_SECTION).
2143 282 jeremybenn
 
2144
   The final declaration is of the global "targetm" structure. */
2145
 
2146
 
2147 333 jeremybenn
/* Default target_flags if no switches specified. */
2148
#undef  TARGET_DEFAULT_TARGET_FLAGS
2149 399 jeremybenn
#define TARGET_DEFAULT_TARGET_FLAGS (MASK_HARD_MUL | MASK_SCHED_LOGUE)
2150 333 jeremybenn
 
2151 282 jeremybenn
/* Output assembly directives to switch to section name. The section should
2152
   have attributes as specified by flags, which is a bit mask of the SECTION_*
2153
   flags defined in ‘output.h’. If decl is non-NULL, it is the VAR_DECL or
2154
   FUNCTION_DECL with which this section is associated.
2155
 
2156
   For OR32, we use the default ELF sectioning. */
2157 332 jeremybenn
#undef  TARGET_ASM_NAMED_SECTION
2158 282 jeremybenn
#define TARGET_ASM_NAMED_SECTION  default_elf_asm_named_section
2159
 
2160 332 jeremybenn
#undef  TARGET_ASM_FUNCTION_PROLOGUE
2161 282 jeremybenn
#define TARGET_ASM_FUNCTION_PROLOGUE or32_output_function_prologue
2162
 
2163 332 jeremybenn
#undef  TARGET_ASM_FUNCTION_EPILOGUE
2164 282 jeremybenn
#define TARGET_ASM_FUNCTION_EPILOGUE or32_output_function_epilogue
2165
 
2166 332 jeremybenn
#undef  TARGET_FUNCTION_VALUE
2167 282 jeremybenn
#define TARGET_FUNCTION_VALUE or32_function_value
2168
 
2169 332 jeremybenn
#undef  TARGET_FUNCTION_OK_FOR_SIBCALL
2170 282 jeremybenn
#define TARGET_FUNCTION_OK_FOR_SIBCALL or32_function_ok_for_sibcall
2171
 
2172 332 jeremybenn
#undef  TARGET_PASS_BY_REFERENCE
2173 282 jeremybenn
#define TARGET_PASS_BY_REFERENCE or32_pass_by_reference
2174
 
2175 332 jeremybenn
#undef  TARGET_ARG_PARTIAL_BYTES
2176 282 jeremybenn
#define TARGET_ARG_PARTIAL_BYTES or32_arg_partial_bytes
2177
 
2178
/* This target hook returns TRUE if an argument declared in a prototype as an
2179
   integral type smaller than int should actually be passed as an int. In
2180
   addition to avoiding errors in certain cases of mismatch, it also makes for
2181
   better code on certain machines.
2182
 
2183
   The default is to not promote prototypes.
2184
 
2185
   For the OR32 we do require this, so use a utility hook, which always
2186
   returns TRUE. */
2187 332 jeremybenn
#undef  TARGET_PROMOTE_PROTOTYPES
2188 282 jeremybenn
#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true
2189
 
2190 332 jeremybenn
#undef  TARGET_PROMOTE_FUNCTION_MODE
2191 282 jeremybenn
#define TARGET_PROMOTE_FUNCTION_MODE or32_promote_function_mode
2192
 
2193 332 jeremybenn
#undef  TARGET_LEGITIMATE_ADDRESS_P
2194 282 jeremybenn
#define TARGET_LEGITIMATE_ADDRESS_P  or32_legitimate_address_p
2195
 
2196 332 jeremybenn
#undef  TARGET_TRAMPOLINE_INIT
2197
#define TARGET_TRAMPOLINE_INIT  or32_trampoline_init
2198
 
2199 282 jeremybenn
#undef TARGET_DWARF_CALLING_CONVENTION
2200
#define TARGET_DWARF_CALLING_CONVENTION  or32_dwarf_calling_convention
2201
 
2202 399 jeremybenn
#undef TARGET_ASM_OUTPUT_MI_THUNK
2203
#define TARGET_ASM_OUTPUT_MI_THUNK or32_output_mi_thunk
2204
 
2205
#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
2206
#define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_const_tree_hwi_hwi_const_tree_true
2207
 
2208 444 jeremybenn
/* uClibc has some instances where (non-coforming to ISO C) a non-varargs
2209
   prototype is in scope when calling that function which is implemented
2210
   as varargs.  We want this to work at least where none of the anonymous
2211
   arguments are used.  I.e. we want the last named argument to be known
2212
   as named so it can be passed in a register, varars funtion or not.  */
2213
#undef TARGET_STRICT_ARGUMENT_NAMING
2214
#define TARGET_STRICT_ARGUMENT_NAMING hook_bool_CUMULATIVE_ARGS_true
2215
 
2216 282 jeremybenn
/* Trampoline stubs are yet to be written. */
2217
/* #define TARGET_ASM_TRAMPOLINE_TEMPLATE */
2218
/* #define TARGET_TRAMPOLINE_INIT */
2219
 
2220
/* Initialize the GCC target structure.  */
2221
struct gcc_target targetm = TARGET_INITIALIZER;
2222 399 jeremybenn
 
2223
/* Lay out structs with increased alignment so that they can be accessed
2224
   more efficiently.  But don't increase the size of one or two byte
2225
   structs.  */
2226
int
2227
or32_struct_alignment (tree t)
2228
{
2229
  unsigned HOST_WIDE_INT total = 0;
2230 402 jeremybenn
  int default_align_fields = 0;
2231
  int special_align_fields = 0;
2232 399 jeremybenn
  tree field;
2233
  unsigned max_align
2234
    = maximum_field_alignment ? maximum_field_alignment : BIGGEST_ALIGNMENT;
2235
  bool struct_p;
2236
 
2237
  switch (TREE_CODE (t))
2238
    {
2239
    case RECORD_TYPE:
2240
      struct_p = true; break;
2241
    case UNION_TYPE: case QUAL_UNION_TYPE:
2242
      struct_p = false; break;
2243
    default: gcc_unreachable ();
2244
    }
2245
  /* Skip all non field decls */
2246
  for (field = TYPE_FIELDS (t); field; field = TREE_CHAIN (field))
2247
    {
2248
      unsigned HOST_WIDE_INT field_size;
2249
 
2250
      if (TREE_CODE (field) != FIELD_DECL)
2251
        continue;
2252 402 jeremybenn
      /* If this is a field in a non-qualified union, or the sole field in
2253
         a struct, and the alignment was set by the user, don't change the
2254
         alignment.
2255
         If the field is a struct/union in a non-qualified union, we already
2256
         had sufficient opportunity to pad it - if we didn't, that'd be
2257
         because the alignment was set as above.
2258
         Likewise if the field is a struct/union and the sole field in a
2259
         struct.  */
2260
      if (DECL_USER_ALIGN (field)
2261
          || TYPE_USER_ALIGN (TREE_TYPE (field))
2262
          || TREE_CODE (TREE_TYPE (field)) == UNION_TYPE
2263
          || TREE_CODE (TREE_TYPE (field)) == QUAL_UNION_TYPE
2264
          || TREE_CODE (TREE_TYPE (field)) == RECORD_TYPE)
2265
        {
2266
          if (TREE_CODE (t) == UNION_TYPE)
2267
            return 0;
2268
          special_align_fields++;
2269
        }
2270
      else if (DECL_PACKED (field))
2271
        special_align_fields++;
2272
      else
2273
        default_align_fields++;
2274 399 jeremybenn
      if (!host_integerp (DECL_SIZE (field), 1))
2275 402 jeremybenn
        field_size = max_align;
2276
      else
2277
        field_size = tree_low_cst (DECL_SIZE (field), 1);
2278 399 jeremybenn
      if (field_size >= BIGGEST_ALIGNMENT)
2279 402 jeremybenn
        total = max_align;
2280 399 jeremybenn
      if (struct_p)
2281
        total += field_size;
2282
      else
2283
        total = MAX (total, field_size);
2284
    }
2285
 
2286 402 jeremybenn
  if (!default_align_fields
2287
      && (TREE_CODE (t) != RECORD_TYPE || special_align_fields <= 1))
2288
    return 0;
2289 399 jeremybenn
  return total < max_align ? (1U << ceil_log2 (total)) : max_align;
2290
}
2291
 
2292
/* Increase the alignment of objects so that they are easier to copy.
2293
   Note that this can cause more struct copies to be inlined, so code
2294
   size might increase, but so should perfromance.  */
2295
int
2296
or32_data_alignment (tree t, int align)
2297
{
2298
  if (align < FASTEST_ALIGNMENT && TREE_CODE (t) == ARRAY_TYPE)
2299
    {
2300
      int size = int_size_in_bytes (t);
2301
 
2302
      return (size > 0 && size < FASTEST_ALIGNMENT / BITS_PER_UNIT
2303
              ? (1 << floor_log2 (size)) * BITS_PER_UNIT
2304
              : FASTEST_ALIGNMENT);
2305
    }
2306
  return align;
2307
}

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