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jeremybenn |
/* Definitions of target machine for GNU compiler, for the HP Spectrum.
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Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001,
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2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
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Free Software Foundation, Inc.
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Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support
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and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for
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Software Science at the University of Utah.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GCC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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/* For long call handling. */
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extern unsigned long total_code_bytes;
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/* Which processor to schedule for. */
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enum processor_type
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{
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PROCESSOR_700,
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PROCESSOR_7100,
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PROCESSOR_7100LC,
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PROCESSOR_7200,
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PROCESSOR_7300,
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PROCESSOR_8000
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};
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/* For -mschedule= option. */
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extern enum processor_type pa_cpu;
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/* For -munix= option. */
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extern int flag_pa_unix;
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#define pa_cpu_attr ((enum attr_cpu)pa_cpu)
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/* Print subsidiary information on the compiler version in use. */
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#define TARGET_VERSION fputs (" (hppa)", stderr);
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#define TARGET_PA_10 (!TARGET_PA_11 && !TARGET_PA_20)
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/* Generate code for the HPPA 2.0 architecture in 64bit mode. */
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#ifndef TARGET_64BIT
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#define TARGET_64BIT 0
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#endif
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/* Generate code for ELF32 ABI. */
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#ifndef TARGET_ELF32
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#define TARGET_ELF32 0
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#endif
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/* Generate code for SOM 32bit ABI. */
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#ifndef TARGET_SOM
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#define TARGET_SOM 0
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#endif
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/* HP-UX UNIX features. */
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#ifndef TARGET_HPUX
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#define TARGET_HPUX 0
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#endif
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/* HP-UX 10.10 UNIX 95 features. */
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#ifndef TARGET_HPUX_10_10
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#define TARGET_HPUX_10_10 0
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#endif
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/* HP-UX 11.* features (11.00, 11.11, 11.23, etc.) */
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#ifndef TARGET_HPUX_11
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#define TARGET_HPUX_11 0
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#endif
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/* HP-UX 11i multibyte and UNIX 98 extensions. */
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#ifndef TARGET_HPUX_11_11
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#define TARGET_HPUX_11_11 0
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#endif
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/* The following three defines are potential target switches. The current
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defines are optimal given the current capabilities of GAS and GNU ld. */
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/* Define to a C expression evaluating to true to use long absolute calls.
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Currently, only the HP assembler and SOM linker support long absolute
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calls. They are used only in non-pic code. */
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#define TARGET_LONG_ABS_CALL (TARGET_SOM && !TARGET_GAS)
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/* Define to a C expression evaluating to true to use long PIC symbol
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difference calls. Long PIC symbol difference calls are only used with
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the HP assembler and linker. The HP assembler detects this instruction
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sequence and treats it as long pc-relative call. Currently, GAS only
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allows a difference of two symbols in the same subspace, and it doesn't
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detect the sequence as a pc-relative call. */
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#define TARGET_LONG_PIC_SDIFF_CALL (!TARGET_GAS && TARGET_HPUX)
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/* Define to a C expression evaluating to true to use long PIC
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pc-relative calls. Long PIC pc-relative calls are only used with
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GAS. Currently, they are usable for calls which bind local to a
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module but not for external calls. */
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#define TARGET_LONG_PIC_PCREL_CALL 0
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/* Define to a C expression evaluating to true to use SOM secondary
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definition symbols for weak support. Linker support for secondary
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definition symbols is buggy prior to HP-UX 11.X. */
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#define TARGET_SOM_SDEF 0
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/* Define to a C expression evaluating to true to save the entry value
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of SP in the current frame marker. This is normally unnecessary.
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However, the HP-UX unwind library looks at the SAVE_SP callinfo flag.
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HP compilers don't use this flag but it is supported by the assembler.
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We set this flag to indicate that register %r3 has been saved at the
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start of the frame. Thus, when the HP unwind library is used, we
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need to generate additional code to save SP into the frame marker. */
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#define TARGET_HPUX_UNWIND_LIBRARY 0
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#ifndef TARGET_DEFAULT
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#define TARGET_DEFAULT (MASK_GAS | MASK_JUMP_IN_DELAY | MASK_BIG_SWITCH)
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#endif
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#ifndef TARGET_CPU_DEFAULT
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#define TARGET_CPU_DEFAULT 0
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#endif
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#ifndef TARGET_SCHED_DEFAULT
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#define TARGET_SCHED_DEFAULT PROCESSOR_8000
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#endif
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/* Support for a compile-time default CPU, et cetera. The rules are:
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--with-schedule is ignored if -mschedule is specified.
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--with-arch is ignored if -march is specified. */
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#define OPTION_DEFAULT_SPECS \
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{"arch", "%{!march=*:-march=%(VALUE)}" }, \
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{"schedule", "%{!mschedule=*:-mschedule=%(VALUE)}" }
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/* Specify the dialect of assembler to use. New mnemonics is dialect one
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and the old mnemonics are dialect zero. */
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#define ASSEMBLER_DIALECT (TARGET_PA_20 ? 1 : 0)
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#define OVERRIDE_OPTIONS override_options ()
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/* Override some settings from dbxelf.h. */
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/* We do not have to be compatible with dbx, so we enable gdb extensions
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by default. */
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#define DEFAULT_GDB_EXTENSIONS 1
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/* This used to be zero (no max length), but big enums and such can
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cause huge strings which killed gas.
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We also have to avoid lossage in dbxout.c -- it does not compute the
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string size accurately, so we are real conservative here. */
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#undef DBX_CONTIN_LENGTH
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#define DBX_CONTIN_LENGTH 3000
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/* GDB always assumes the current function's frame begins at the value
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of the stack pointer upon entry to the current function. Accessing
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local variables and parameters passed on the stack is done using the
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base of the frame + an offset provided by GCC.
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For functions which have frame pointers this method works fine;
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the (frame pointer) == (stack pointer at function entry) and GCC provides
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an offset relative to the frame pointer.
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This loses for functions without a frame pointer; GCC provides an offset
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which is relative to the stack pointer after adjusting for the function's
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frame size. GDB would prefer the offset to be relative to the value of
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the stack pointer at the function's entry. Yuk! */
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#define DEBUGGER_AUTO_OFFSET(X) \
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((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
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+ (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
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#define DEBUGGER_ARG_OFFSET(OFFSET, X) \
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((GET_CODE (X) == PLUS ? OFFSET : 0) \
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+ (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
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#define TARGET_CPU_CPP_BUILTINS() \
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do { \
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builtin_assert("cpu=hppa"); \
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builtin_assert("machine=hppa"); \
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builtin_define("__hppa"); \
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builtin_define("__hppa__"); \
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if (TARGET_PA_20) \
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builtin_define("_PA_RISC2_0"); \
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else if (TARGET_PA_11) \
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builtin_define("_PA_RISC1_1"); \
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else \
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builtin_define("_PA_RISC1_0"); \
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} while (0)
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/* An old set of OS defines for various BSD-like systems. */
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#define TARGET_OS_CPP_BUILTINS() \
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do \
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{ \
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builtin_define_std ("REVARGV"); \
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builtin_define_std ("hp800"); \
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builtin_define_std ("hp9000"); \
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builtin_define_std ("hp9k8"); \
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if (!c_dialect_cxx () && !flag_iso) \
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builtin_define ("hppa"); \
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builtin_define_std ("spectrum"); \
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builtin_define_std ("unix"); \
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builtin_assert ("system=bsd"); \
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builtin_assert ("system=unix"); \
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} \
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while (0)
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#define CC1_SPEC "%{pg:} %{p:}"
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#define LINK_SPEC "%{mlinker-opt:-O} %{!shared:-u main} %{shared:-b}"
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/* We don't want -lg. */
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#ifndef LIB_SPEC
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#define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
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#endif
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/* This macro defines command-line switches that modify the default
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target name.
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The definition is be an initializer for an array of structures. Each
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array element has have three elements: the switch name, one of the
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enumeration codes ADD or DELETE to indicate whether the string should be
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inserted or deleted, and the string to be inserted or deleted. */
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#define MODIFY_TARGET_NAME {{"-32", DELETE, "64"}, {"-64", ADD, "64"}}
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/* Make gcc agree with <machine/ansi.h> */
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#define SIZE_TYPE "unsigned int"
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#define PTRDIFF_TYPE "int"
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#define WCHAR_TYPE "unsigned int"
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#define WCHAR_TYPE_SIZE 32
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/* Show we can debug even without a frame pointer. */
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#define CAN_DEBUG_WITHOUT_FP
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/* target machine storage layout */
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typedef struct GTY(()) machine_function
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{
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/* Flag indicating that a .NSUBSPA directive has been output for
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this function. */
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int in_nsubspa;
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} machine_function;
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| 252 |
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/* Define this macro if it is advisable to hold scalars in registers
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in a wider mode than that declared by the program. In such cases,
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the value is constrained to be within the bounds of the declared
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type, but kept valid in the wider mode. The signedness of the
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extension may differ from that of the type. */
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#define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
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if (GET_MODE_CLASS (MODE) == MODE_INT \
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&& GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
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(MODE) = word_mode;
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/* Define this if most significant bit is lowest numbered
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| 264 |
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in instructions that operate on numbered bit-fields. */
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| 265 |
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#define BITS_BIG_ENDIAN 1
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/* Define this if most significant byte of a word is the lowest numbered. */
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/* That is true on the HP-PA. */
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#define BYTES_BIG_ENDIAN 1
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/* Define this if most significant word of a multiword number is lowest
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| 272 |
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numbered. */
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#define WORDS_BIG_ENDIAN 1
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| 275 |
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#define MAX_BITS_PER_WORD 64
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| 277 |
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/* Width of a word, in units (bytes). */
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| 278 |
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#define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
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| 279 |
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| 280 |
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/* Minimum number of units in a word. If this is undefined, the default
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| 281 |
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is UNITS_PER_WORD. Otherwise, it is the constant value that is the
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| 282 |
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smallest value that UNITS_PER_WORD can have at run-time.
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| 283 |
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| 284 |
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FIXME: This needs to be 4 when TARGET_64BIT is true to suppress the
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| 285 |
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building of various TImode routines in libgcc. The HP runtime
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| 286 |
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specification doesn't provide the alignment requirements and calling
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| 287 |
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conventions for TImode variables. */
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| 288 |
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#define MIN_UNITS_PER_WORD 4
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| 289 |
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| 290 |
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/* The widest floating point format supported by the hardware. Note that
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setting this influences some Ada floating point type sizes, currently
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| 292 |
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required for GNAT to operate properly. */
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| 293 |
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#define WIDEST_HARDWARE_FP_SIZE 64
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| 294 |
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| 295 |
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/* Allocation boundary (in *bits*) for storing arguments in argument list. */
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| 296 |
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#define PARM_BOUNDARY BITS_PER_WORD
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| 297 |
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| 298 |
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/* Largest alignment required for any stack parameter, in bits.
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| 299 |
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Don't define this if it is equal to PARM_BOUNDARY */
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| 300 |
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#define MAX_PARM_BOUNDARY BIGGEST_ALIGNMENT
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| 301 |
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| 302 |
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/* Boundary (in *bits*) on which stack pointer is always aligned;
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| 303 |
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certain optimizations in combine depend on this.
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| 304 |
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| 305 |
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The HP-UX runtime documents mandate 64-byte and 16-byte alignment for
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| 306 |
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the stack on the 32 and 64-bit ports, respectively. However, we
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| 307 |
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are only guaranteed that the stack is aligned to BIGGEST_ALIGNMENT
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| 308 |
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in main. Thus, we treat the former as the preferred alignment. */
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| 309 |
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#define STACK_BOUNDARY BIGGEST_ALIGNMENT
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| 310 |
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#define PREFERRED_STACK_BOUNDARY (TARGET_64BIT ? 128 : 512)
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| 311 |
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| 312 |
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/* Allocation boundary (in *bits*) for the code of a function. */
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| 313 |
|
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#define FUNCTION_BOUNDARY BITS_PER_WORD
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| 314 |
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| 315 |
|
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/* Alignment of field after `int : 0' in a structure. */
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| 316 |
|
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#define EMPTY_FIELD_BOUNDARY 32
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| 317 |
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| 318 |
|
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/* Every structure's size must be a multiple of this. */
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| 319 |
|
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#define STRUCTURE_SIZE_BOUNDARY 8
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| 320 |
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| 321 |
|
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/* A bit-field declared as `int' forces `int' alignment for the struct. */
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| 322 |
|
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#define PCC_BITFIELD_TYPE_MATTERS 1
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| 323 |
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| 324 |
|
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/* No data type wants to be aligned rounder than this. */
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| 325 |
|
|
#define BIGGEST_ALIGNMENT (2 * BITS_PER_WORD)
|
| 326 |
|
|
|
| 327 |
|
|
/* Get around hp-ux assembler bug, and make strcpy of constants fast. */
|
| 328 |
|
|
#define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
|
| 329 |
|
|
((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
|
| 330 |
|
|
|
| 331 |
|
|
/* Make arrays of chars word-aligned for the same reasons. */
|
| 332 |
|
|
#define DATA_ALIGNMENT(TYPE, ALIGN) \
|
| 333 |
|
|
(TREE_CODE (TYPE) == ARRAY_TYPE \
|
| 334 |
|
|
&& TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
|
| 335 |
|
|
&& (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
|
| 336 |
|
|
|
| 337 |
|
|
/* Set this nonzero if move instructions will actually fail to work
|
| 338 |
|
|
when given unaligned data. */
|
| 339 |
|
|
#define STRICT_ALIGNMENT 1
|
| 340 |
|
|
|
| 341 |
|
|
/* Value is 1 if it is a good idea to tie two pseudo registers
|
| 342 |
|
|
when one has mode MODE1 and one has mode MODE2.
|
| 343 |
|
|
If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
|
| 344 |
|
|
for any hard reg, then this must be 0 for correct output. */
|
| 345 |
|
|
#define MODES_TIEABLE_P(MODE1, MODE2) \
|
| 346 |
|
|
pa_modes_tieable_p (MODE1, MODE2)
|
| 347 |
|
|
|
| 348 |
|
|
/* Specify the registers used for certain standard purposes.
|
| 349 |
|
|
The values of these macros are register numbers. */
|
| 350 |
|
|
|
| 351 |
|
|
/* The HP-PA pc isn't overloaded on a register that the compiler knows about. */
|
| 352 |
|
|
/* #define PC_REGNUM */
|
| 353 |
|
|
|
| 354 |
|
|
/* Register to use for pushing function arguments. */
|
| 355 |
|
|
#define STACK_POINTER_REGNUM 30
|
| 356 |
|
|
|
| 357 |
|
|
/* Base register for access to local variables of the function. */
|
| 358 |
|
|
#define FRAME_POINTER_REGNUM 3
|
| 359 |
|
|
|
| 360 |
|
|
/* Don't allow hard registers to be renamed into r2 unless r2
|
| 361 |
|
|
is already live or already being saved (due to eh). */
|
| 362 |
|
|
|
| 363 |
|
|
#define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
|
| 364 |
|
|
((NEW_REG) != 2 || df_regs_ever_live_p (2) || crtl->calls_eh_return)
|
| 365 |
|
|
|
| 366 |
|
|
/* C statement to store the difference between the frame pointer
|
| 367 |
|
|
and the stack pointer values immediately after the function prologue.
|
| 368 |
|
|
|
| 369 |
|
|
Note, we always pretend that this is a leaf function because if
|
| 370 |
|
|
it's not, there's no point in trying to eliminate the
|
| 371 |
|
|
frame pointer. If it is a leaf function, we guessed right! */
|
| 372 |
|
|
#define INITIAL_FRAME_POINTER_OFFSET(VAR) \
|
| 373 |
|
|
do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
|
| 374 |
|
|
|
| 375 |
|
|
/* Base register for access to arguments of the function. */
|
| 376 |
|
|
#define ARG_POINTER_REGNUM (TARGET_64BIT ? 29 : 3)
|
| 377 |
|
|
|
| 378 |
|
|
/* Register in which static-chain is passed to a function. */
|
| 379 |
|
|
#define STATIC_CHAIN_REGNUM (TARGET_64BIT ? 31 : 29)
|
| 380 |
|
|
|
| 381 |
|
|
/* Register used to address the offset table for position-independent
|
| 382 |
|
|
data references. */
|
| 383 |
|
|
#define PIC_OFFSET_TABLE_REGNUM \
|
| 384 |
|
|
(flag_pic ? (TARGET_64BIT ? 27 : 19) : INVALID_REGNUM)
|
| 385 |
|
|
|
| 386 |
|
|
#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1
|
| 387 |
|
|
|
| 388 |
|
|
/* Function to return the rtx used to save the pic offset table register
|
| 389 |
|
|
across function calls. */
|
| 390 |
|
|
extern struct rtx_def *hppa_pic_save_rtx (void);
|
| 391 |
|
|
|
| 392 |
|
|
#define DEFAULT_PCC_STRUCT_RETURN 0
|
| 393 |
|
|
|
| 394 |
|
|
/* Register in which address to store a structure value
|
| 395 |
|
|
is passed to a function. */
|
| 396 |
|
|
#define PA_STRUCT_VALUE_REGNUM 28
|
| 397 |
|
|
|
| 398 |
|
|
/* Describe how we implement __builtin_eh_return. */
|
| 399 |
|
|
#define EH_RETURN_DATA_REGNO(N) \
|
| 400 |
|
|
((N) < 3 ? (N) + 20 : (N) == 3 ? 31 : INVALID_REGNUM)
|
| 401 |
|
|
#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 29)
|
| 402 |
|
|
#define EH_RETURN_HANDLER_RTX pa_eh_return_handler_rtx ()
|
| 403 |
|
|
|
| 404 |
|
|
/* Offset from the frame pointer register value to the top of stack. */
|
| 405 |
|
|
#define FRAME_POINTER_CFA_OFFSET(FNDECL) 0
|
| 406 |
|
|
|
| 407 |
|
|
/* A C expression whose value is RTL representing the location of the
|
| 408 |
|
|
incoming return address at the beginning of any function, before the
|
| 409 |
|
|
prologue. You only need to define this macro if you want to support
|
| 410 |
|
|
call frame debugging information like that provided by DWARF 2. */
|
| 411 |
|
|
#define INCOMING_RETURN_ADDR_RTX (gen_rtx_REG (word_mode, 2))
|
| 412 |
|
|
#define DWARF_FRAME_RETURN_COLUMN (DWARF_FRAME_REGNUM (2))
|
| 413 |
|
|
|
| 414 |
|
|
/* A C expression whose value is an integer giving a DWARF 2 column
|
| 415 |
|
|
number that may be used as an alternate return column. This should
|
| 416 |
|
|
be defined only if DWARF_FRAME_RETURN_COLUMN is set to a general
|
| 417 |
|
|
register, but an alternate column needs to be used for signal frames.
|
| 418 |
|
|
|
| 419 |
|
|
Column 0 is not used but unfortunately its register size is set to
|
| 420 |
|
|
4 bytes (sizeof CCmode) so it can't be used on 64-bit targets. */
|
| 421 |
|
|
#define DWARF_ALT_FRAME_RETURN_COLUMN FIRST_PSEUDO_REGISTER
|
| 422 |
|
|
|
| 423 |
|
|
/* This macro chooses the encoding of pointers embedded in the exception
|
| 424 |
|
|
handling sections. If at all possible, this should be defined such
|
| 425 |
|
|
that the exception handling section will not require dynamic relocations,
|
| 426 |
|
|
and so may be read-only.
|
| 427 |
|
|
|
| 428 |
|
|
Because the HP assembler auto aligns, it is necessary to use
|
| 429 |
|
|
DW_EH_PE_aligned. It's not possible to make the data read-only
|
| 430 |
|
|
on the HP-UX SOM port since the linker requires fixups for label
|
| 431 |
|
|
differences in different sections to be word aligned. However,
|
| 432 |
|
|
the SOM linker can do unaligned fixups for absolute pointers.
|
| 433 |
|
|
We also need aligned pointers for global and function pointers.
|
| 434 |
|
|
|
| 435 |
|
|
Although the HP-UX 64-bit ELF linker can handle unaligned pc-relative
|
| 436 |
|
|
fixups, the runtime doesn't have a consistent relationship between
|
| 437 |
|
|
text and data for dynamically loaded objects. Thus, it's not possible
|
| 438 |
|
|
to use pc-relative encoding for pointers on this target. It may be
|
| 439 |
|
|
possible to use segment relative encodings but GAS doesn't currently
|
| 440 |
|
|
have a mechanism to generate these encodings. For other targets, we
|
| 441 |
|
|
use pc-relative encoding for pointers. If the pointer might require
|
| 442 |
|
|
dynamic relocation, we make it indirect. */
|
| 443 |
|
|
#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \
|
| 444 |
|
|
(TARGET_GAS && !TARGET_HPUX \
|
| 445 |
|
|
? (DW_EH_PE_pcrel \
|
| 446 |
|
|
| ((GLOBAL) || (CODE) == 2 ? DW_EH_PE_indirect : 0) \
|
| 447 |
|
|
| (TARGET_64BIT ? DW_EH_PE_sdata8 : DW_EH_PE_sdata4)) \
|
| 448 |
|
|
: (!TARGET_GAS || (GLOBAL) || (CODE) == 2 \
|
| 449 |
|
|
? DW_EH_PE_aligned : DW_EH_PE_absptr))
|
| 450 |
|
|
|
| 451 |
|
|
/* Handle special EH pointer encodings. Absolute, pc-relative, and
|
| 452 |
|
|
indirect are handled automatically. We output pc-relative, and
|
| 453 |
|
|
indirect pc-relative ourself since we need some special magic to
|
| 454 |
|
|
generate pc-relative relocations, and to handle indirect function
|
| 455 |
|
|
pointers. */
|
| 456 |
|
|
#define ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX(FILE, ENCODING, SIZE, ADDR, DONE) \
|
| 457 |
|
|
do { \
|
| 458 |
|
|
if (((ENCODING) & 0x70) == DW_EH_PE_pcrel) \
|
| 459 |
|
|
{ \
|
| 460 |
|
|
fputs (integer_asm_op (SIZE, FALSE), FILE); \
|
| 461 |
|
|
if ((ENCODING) & DW_EH_PE_indirect) \
|
| 462 |
|
|
output_addr_const (FILE, get_deferred_plabel (ADDR)); \
|
| 463 |
|
|
else \
|
| 464 |
|
|
assemble_name (FILE, XSTR ((ADDR), 0)); \
|
| 465 |
|
|
fputs ("+8-$PIC_pcrel$0", FILE); \
|
| 466 |
|
|
goto DONE; \
|
| 467 |
|
|
} \
|
| 468 |
|
|
} while (0)
|
| 469 |
|
|
|
| 470 |
|
|
|
| 471 |
|
|
/* The class value for index registers, and the one for base regs. */
|
| 472 |
|
|
#define INDEX_REG_CLASS GENERAL_REGS
|
| 473 |
|
|
#define BASE_REG_CLASS GENERAL_REGS
|
| 474 |
|
|
|
| 475 |
|
|
#define FP_REG_CLASS_P(CLASS) \
|
| 476 |
|
|
((CLASS) == FP_REGS || (CLASS) == FPUPPER_REGS)
|
| 477 |
|
|
|
| 478 |
|
|
/* True if register is floating-point. */
|
| 479 |
|
|
#define FP_REGNO_P(N) ((N) >= FP_REG_FIRST && (N) <= FP_REG_LAST)
|
| 480 |
|
|
|
| 481 |
|
|
/* Given an rtx X being reloaded into a reg required to be
|
| 482 |
|
|
in class CLASS, return the class of reg to actually use.
|
| 483 |
|
|
In general this is just CLASS; but on some machines
|
| 484 |
|
|
in some cases it is preferable to use a more restrictive class. */
|
| 485 |
|
|
#define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
|
| 486 |
|
|
|
| 487 |
|
|
#define MAYBE_FP_REG_CLASS_P(CLASS) \
|
| 488 |
|
|
reg_classes_intersect_p ((CLASS), FP_REGS)
|
| 489 |
|
|
|
| 490 |
|
|
|
| 491 |
|
|
/* Stack layout; function entry, exit and calling. */
|
| 492 |
|
|
|
| 493 |
|
|
/* Define this if pushing a word on the stack
|
| 494 |
|
|
makes the stack pointer a smaller address. */
|
| 495 |
|
|
/* #define STACK_GROWS_DOWNWARD */
|
| 496 |
|
|
|
| 497 |
|
|
/* Believe it or not. */
|
| 498 |
|
|
#define ARGS_GROW_DOWNWARD
|
| 499 |
|
|
|
| 500 |
|
|
/* Define this to nonzero if the nominal address of the stack frame
|
| 501 |
|
|
is at the high-address end of the local variables;
|
| 502 |
|
|
that is, each additional local variable allocated
|
| 503 |
|
|
goes at a more negative offset in the frame. */
|
| 504 |
|
|
#define FRAME_GROWS_DOWNWARD 0
|
| 505 |
|
|
|
| 506 |
|
|
/* Offset within stack frame to start allocating local variables at.
|
| 507 |
|
|
If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
|
| 508 |
|
|
first local allocated. Otherwise, it is the offset to the BEGINNING
|
| 509 |
|
|
of the first local allocated.
|
| 510 |
|
|
|
| 511 |
|
|
On the 32-bit ports, we reserve one slot for the previous frame
|
| 512 |
|
|
pointer and one fill slot. The fill slot is for compatibility
|
| 513 |
|
|
with HP compiled programs. On the 64-bit ports, we reserve one
|
| 514 |
|
|
slot for the previous frame pointer. */
|
| 515 |
|
|
#define STARTING_FRAME_OFFSET 8
|
| 516 |
|
|
|
| 517 |
|
|
/* Define STACK_ALIGNMENT_NEEDED to zero to disable final alignment
|
| 518 |
|
|
of the stack. The default is to align it to STACK_BOUNDARY. */
|
| 519 |
|
|
#define STACK_ALIGNMENT_NEEDED 0
|
| 520 |
|
|
|
| 521 |
|
|
/* If we generate an insn to push BYTES bytes,
|
| 522 |
|
|
this says how many the stack pointer really advances by.
|
| 523 |
|
|
On the HP-PA, don't define this because there are no push insns. */
|
| 524 |
|
|
/* #define PUSH_ROUNDING(BYTES) */
|
| 525 |
|
|
|
| 526 |
|
|
/* Offset of first parameter from the argument pointer register value.
|
| 527 |
|
|
This value will be negated because the arguments grow down.
|
| 528 |
|
|
Also note that on STACK_GROWS_UPWARD machines (such as this one)
|
| 529 |
|
|
this is the distance from the frame pointer to the end of the first
|
| 530 |
|
|
argument, not it's beginning. To get the real offset of the first
|
| 531 |
|
|
argument, the size of the argument must be added. */
|
| 532 |
|
|
|
| 533 |
|
|
#define FIRST_PARM_OFFSET(FNDECL) (TARGET_64BIT ? -64 : -32)
|
| 534 |
|
|
|
| 535 |
|
|
/* When a parameter is passed in a register, stack space is still
|
| 536 |
|
|
allocated for it. */
|
| 537 |
|
|
#define REG_PARM_STACK_SPACE(DECL) (TARGET_64BIT ? 64 : 16)
|
| 538 |
|
|
|
| 539 |
|
|
/* Define this if the above stack space is to be considered part of the
|
| 540 |
|
|
space allocated by the caller. */
|
| 541 |
|
|
#define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
|
| 542 |
|
|
|
| 543 |
|
|
/* Keep the stack pointer constant throughout the function.
|
| 544 |
|
|
This is both an optimization and a necessity: longjmp
|
| 545 |
|
|
doesn't behave itself when the stack pointer moves within
|
| 546 |
|
|
the function! */
|
| 547 |
|
|
#define ACCUMULATE_OUTGOING_ARGS 1
|
| 548 |
|
|
|
| 549 |
|
|
/* The weird HPPA calling conventions require a minimum of 48 bytes on
|
| 550 |
|
|
the stack: 16 bytes for register saves, and 32 bytes for magic.
|
| 551 |
|
|
This is the difference between the logical top of stack and the
|
| 552 |
|
|
actual sp.
|
| 553 |
|
|
|
| 554 |
|
|
On the 64-bit port, the HP C compiler allocates a 48-byte frame
|
| 555 |
|
|
marker, although the runtime documentation only describes a 16
|
| 556 |
|
|
byte marker. For compatibility, we allocate 48 bytes. */
|
| 557 |
|
|
#define STACK_POINTER_OFFSET \
|
| 558 |
|
|
(TARGET_64BIT ? -(crtl->outgoing_args_size + 48): -32)
|
| 559 |
|
|
|
| 560 |
|
|
#define STACK_DYNAMIC_OFFSET(FNDECL) \
|
| 561 |
|
|
(TARGET_64BIT \
|
| 562 |
|
|
? (STACK_POINTER_OFFSET) \
|
| 563 |
|
|
: ((STACK_POINTER_OFFSET) - crtl->outgoing_args_size))
|
| 564 |
|
|
|
| 565 |
|
|
/* Value is 1 if returning from a function call automatically
|
| 566 |
|
|
pops the arguments described by the number-of-args field in the call.
|
| 567 |
|
|
FUNDECL is the declaration node of the function (as a tree),
|
| 568 |
|
|
FUNTYPE is the data type of the function (as a tree),
|
| 569 |
|
|
or for a library call it is an identifier node for the subroutine name. */
|
| 570 |
|
|
|
| 571 |
|
|
#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
|
| 572 |
|
|
|
| 573 |
|
|
/* Define how to find the value returned by a library function
|
| 574 |
|
|
assuming the value has mode MODE. */
|
| 575 |
|
|
|
| 576 |
|
|
#define LIBCALL_VALUE(MODE) \
|
| 577 |
|
|
gen_rtx_REG (MODE, \
|
| 578 |
|
|
(! TARGET_SOFT_FLOAT \
|
| 579 |
|
|
&& ((MODE) == SFmode || (MODE) == DFmode) ? 32 : 28))
|
| 580 |
|
|
|
| 581 |
|
|
/* 1 if N is a possible register number for a function value
|
| 582 |
|
|
as seen by the caller. */
|
| 583 |
|
|
|
| 584 |
|
|
#define FUNCTION_VALUE_REGNO_P(N) \
|
| 585 |
|
|
((N) == 28 || (! TARGET_SOFT_FLOAT && (N) == 32))
|
| 586 |
|
|
|
| 587 |
|
|
|
| 588 |
|
|
/* Define a data type for recording info about an argument list
|
| 589 |
|
|
during the scan of that argument list. This data type should
|
| 590 |
|
|
hold all necessary information about the function itself
|
| 591 |
|
|
and about the args processed so far, enough to enable macros
|
| 592 |
|
|
such as FUNCTION_ARG to determine where the next arg should go.
|
| 593 |
|
|
|
| 594 |
|
|
On the HP-PA, the WORDS field holds the number of words
|
| 595 |
|
|
of arguments scanned so far (including the invisible argument,
|
| 596 |
|
|
if any, which holds the structure-value-address). Thus, 4 or
|
| 597 |
|
|
more means all following args should go on the stack.
|
| 598 |
|
|
|
| 599 |
|
|
The INCOMING field tracks whether this is an "incoming" or
|
| 600 |
|
|
"outgoing" argument.
|
| 601 |
|
|
|
| 602 |
|
|
The INDIRECT field indicates whether this is is an indirect
|
| 603 |
|
|
call or not.
|
| 604 |
|
|
|
| 605 |
|
|
The NARGS_PROTOTYPE field indicates that an argument does not
|
| 606 |
|
|
have a prototype when it less than or equal to 0. */
|
| 607 |
|
|
|
| 608 |
|
|
struct hppa_args {int words, nargs_prototype, incoming, indirect; };
|
| 609 |
|
|
|
| 610 |
|
|
#define CUMULATIVE_ARGS struct hppa_args
|
| 611 |
|
|
|
| 612 |
|
|
/* Initialize a variable CUM of type CUMULATIVE_ARGS
|
| 613 |
|
|
for a call to a function whose data type is FNTYPE.
|
| 614 |
|
|
For a library call, FNTYPE is 0. */
|
| 615 |
|
|
|
| 616 |
|
|
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
|
| 617 |
|
|
(CUM).words = 0, \
|
| 618 |
|
|
(CUM).incoming = 0, \
|
| 619 |
|
|
(CUM).indirect = (FNTYPE) && !(FNDECL), \
|
| 620 |
|
|
(CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \
|
| 621 |
|
|
? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
|
| 622 |
|
|
+ (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
|
| 623 |
|
|
|| pa_return_in_memory (TREE_TYPE (FNTYPE), 0))) \
|
| 624 |
|
|
: 0)
|
| 625 |
|
|
|
| 626 |
|
|
|
| 627 |
|
|
|
| 628 |
|
|
/* Similar, but when scanning the definition of a procedure. We always
|
| 629 |
|
|
set NARGS_PROTOTYPE large so we never return a PARALLEL. */
|
| 630 |
|
|
|
| 631 |
|
|
#define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
|
| 632 |
|
|
(CUM).words = 0, \
|
| 633 |
|
|
(CUM).incoming = 1, \
|
| 634 |
|
|
(CUM).indirect = 0, \
|
| 635 |
|
|
(CUM).nargs_prototype = 1000
|
| 636 |
|
|
|
| 637 |
|
|
/* Figure out the size in words of the function argument. The size
|
| 638 |
|
|
returned by this macro should always be greater than zero because
|
| 639 |
|
|
we pass variable and zero sized objects by reference. */
|
| 640 |
|
|
|
| 641 |
|
|
#define FUNCTION_ARG_SIZE(MODE, TYPE) \
|
| 642 |
|
|
((((MODE) != BLKmode \
|
| 643 |
|
|
? (HOST_WIDE_INT) GET_MODE_SIZE (MODE) \
|
| 644 |
|
|
: int_size_in_bytes (TYPE)) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
|
| 645 |
|
|
|
| 646 |
|
|
/* Update the data in CUM to advance over an argument
|
| 647 |
|
|
of mode MODE and data type TYPE.
|
| 648 |
|
|
(TYPE is null for libcalls where that information may not be available.) */
|
| 649 |
|
|
|
| 650 |
|
|
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
|
| 651 |
|
|
{ (CUM).nargs_prototype--; \
|
| 652 |
|
|
(CUM).words += FUNCTION_ARG_SIZE(MODE, TYPE) \
|
| 653 |
|
|
+ (((CUM).words & 01) && (TYPE) != 0 \
|
| 654 |
|
|
&& FUNCTION_ARG_SIZE(MODE, TYPE) > 1); \
|
| 655 |
|
|
}
|
| 656 |
|
|
|
| 657 |
|
|
/* Determine where to put an argument to a function.
|
| 658 |
|
|
Value is zero to push the argument on the stack,
|
| 659 |
|
|
or a hard register in which to store the argument.
|
| 660 |
|
|
|
| 661 |
|
|
MODE is the argument's machine mode.
|
| 662 |
|
|
TYPE is the data type of the argument (as a tree).
|
| 663 |
|
|
This is null for libcalls where that information may
|
| 664 |
|
|
not be available.
|
| 665 |
|
|
CUM is a variable of type CUMULATIVE_ARGS which gives info about
|
| 666 |
|
|
the preceding args and about the function being called.
|
| 667 |
|
|
NAMED is nonzero if this argument is a named parameter
|
| 668 |
|
|
(otherwise it is an extra parameter matching an ellipsis).
|
| 669 |
|
|
|
| 670 |
|
|
On the HP-PA the first four words of args are normally in registers
|
| 671 |
|
|
and the rest are pushed. But any arg that won't entirely fit in regs
|
| 672 |
|
|
is pushed.
|
| 673 |
|
|
|
| 674 |
|
|
Arguments passed in registers are either 1 or 2 words long.
|
| 675 |
|
|
|
| 676 |
|
|
The caller must make a distinction between calls to explicitly named
|
| 677 |
|
|
functions and calls through pointers to functions -- the conventions
|
| 678 |
|
|
are different! Calls through pointers to functions only use general
|
| 679 |
|
|
registers for the first four argument words.
|
| 680 |
|
|
|
| 681 |
|
|
Of course all this is different for the portable runtime model
|
| 682 |
|
|
HP wants everyone to use for ELF. Ugh. Here's a quick description
|
| 683 |
|
|
of how it's supposed to work.
|
| 684 |
|
|
|
| 685 |
|
|
1) callee side remains unchanged. It expects integer args to be
|
| 686 |
|
|
in the integer registers, float args in the float registers and
|
| 687 |
|
|
unnamed args in integer registers.
|
| 688 |
|
|
|
| 689 |
|
|
2) caller side now depends on if the function being called has
|
| 690 |
|
|
a prototype in scope (rather than if it's being called indirectly).
|
| 691 |
|
|
|
| 692 |
|
|
2a) If there is a prototype in scope, then arguments are passed
|
| 693 |
|
|
according to their type (ints in integer registers, floats in float
|
| 694 |
|
|
registers, unnamed args in integer registers.
|
| 695 |
|
|
|
| 696 |
|
|
2b) If there is no prototype in scope, then floating point arguments
|
| 697 |
|
|
are passed in both integer and float registers. egad.
|
| 698 |
|
|
|
| 699 |
|
|
FYI: The portable parameter passing conventions are almost exactly like
|
| 700 |
|
|
the standard parameter passing conventions on the RS6000. That's why
|
| 701 |
|
|
you'll see lots of similar code in rs6000.h. */
|
| 702 |
|
|
|
| 703 |
|
|
/* If defined, a C expression which determines whether, and in which
|
| 704 |
|
|
direction, to pad out an argument with extra space. */
|
| 705 |
|
|
#define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
|
| 706 |
|
|
|
| 707 |
|
|
/* Specify padding for the last element of a block move between registers
|
| 708 |
|
|
and memory.
|
| 709 |
|
|
|
| 710 |
|
|
The 64-bit runtime specifies that objects need to be left justified
|
| 711 |
|
|
(i.e., the normal justification for a big endian target). The 32-bit
|
| 712 |
|
|
runtime specifies right justification for objects smaller than 64 bits.
|
| 713 |
|
|
We use a DImode register in the parallel for 5 to 7 byte structures
|
| 714 |
|
|
so that there is only one element. This allows the object to be
|
| 715 |
|
|
correctly padded. */
|
| 716 |
|
|
#define BLOCK_REG_PADDING(MODE, TYPE, FIRST) \
|
| 717 |
|
|
function_arg_padding ((MODE), (TYPE))
|
| 718 |
|
|
|
| 719 |
|
|
/* Do not expect to understand this without reading it several times. I'm
|
| 720 |
|
|
tempted to try and simply it, but I worry about breaking something. */
|
| 721 |
|
|
|
| 722 |
|
|
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
|
| 723 |
|
|
function_arg (&CUM, MODE, TYPE, NAMED)
|
| 724 |
|
|
|
| 725 |
|
|
/* If defined, a C expression that gives the alignment boundary, in
|
| 726 |
|
|
bits, of an argument with the specified mode and type. If it is
|
| 727 |
|
|
not defined, `PARM_BOUNDARY' is used for all arguments. */
|
| 728 |
|
|
|
| 729 |
|
|
/* Arguments larger than one word are double word aligned. */
|
| 730 |
|
|
|
| 731 |
|
|
#define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
|
| 732 |
|
|
(((TYPE) \
|
| 733 |
|
|
? (integer_zerop (TYPE_SIZE (TYPE)) \
|
| 734 |
|
|
|| !TREE_CONSTANT (TYPE_SIZE (TYPE)) \
|
| 735 |
|
|
|| int_size_in_bytes (TYPE) <= UNITS_PER_WORD) \
|
| 736 |
|
|
: GET_MODE_SIZE(MODE) <= UNITS_PER_WORD) \
|
| 737 |
|
|
? PARM_BOUNDARY : MAX_PARM_BOUNDARY)
|
| 738 |
|
|
|
| 739 |
|
|
|
| 740 |
|
|
/* On HPPA, we emit profiling code as rtl via PROFILE_HOOK rather than
|
| 741 |
|
|
as assembly via FUNCTION_PROFILER. Just output a local label.
|
| 742 |
|
|
We can't use the function label because the GAS SOM target can't
|
| 743 |
|
|
handle the difference of a global symbol and a local symbol. */
|
| 744 |
|
|
|
| 745 |
|
|
#ifndef FUNC_BEGIN_PROLOG_LABEL
|
| 746 |
|
|
#define FUNC_BEGIN_PROLOG_LABEL "LFBP"
|
| 747 |
|
|
#endif
|
| 748 |
|
|
|
| 749 |
|
|
#define FUNCTION_PROFILER(FILE, LABEL) \
|
| 750 |
|
|
(*targetm.asm_out.internal_label) (FILE, FUNC_BEGIN_PROLOG_LABEL, LABEL)
|
| 751 |
|
|
|
| 752 |
|
|
#define PROFILE_HOOK(label_no) hppa_profile_hook (label_no)
|
| 753 |
|
|
void hppa_profile_hook (int label_no);
|
| 754 |
|
|
|
| 755 |
|
|
/* The profile counter if emitted must come before the prologue. */
|
| 756 |
|
|
#define PROFILE_BEFORE_PROLOGUE 1
|
| 757 |
|
|
|
| 758 |
|
|
/* We never want final.c to emit profile counters. When profile
|
| 759 |
|
|
counters are required, we have to defer emitting them to the end
|
| 760 |
|
|
of the current file. */
|
| 761 |
|
|
#define NO_PROFILE_COUNTERS 1
|
| 762 |
|
|
|
| 763 |
|
|
/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
|
| 764 |
|
|
the stack pointer does not matter. The value is tested only in
|
| 765 |
|
|
functions that have frame pointers.
|
| 766 |
|
|
No definition is equivalent to always zero. */
|
| 767 |
|
|
|
| 768 |
|
|
extern int may_call_alloca;
|
| 769 |
|
|
|
| 770 |
|
|
#define EXIT_IGNORE_STACK \
|
| 771 |
|
|
(get_frame_size () != 0 \
|
| 772 |
|
|
|| cfun->calls_alloca || crtl->outgoing_args_size)
|
| 773 |
|
|
|
| 774 |
|
|
/* Length in units of the trampoline for entering a nested function. */
|
| 775 |
|
|
|
| 776 |
|
|
#define TRAMPOLINE_SIZE (TARGET_64BIT ? 72 : 52)
|
| 777 |
|
|
|
| 778 |
|
|
/* Alignment required by the trampoline. */
|
| 779 |
|
|
|
| 780 |
|
|
#define TRAMPOLINE_ALIGNMENT BITS_PER_WORD
|
| 781 |
|
|
|
| 782 |
|
|
/* Minimum length of a cache line. A length of 16 will work on all
|
| 783 |
|
|
PA-RISC processors. All PA 1.1 processors have a cache line of
|
| 784 |
|
|
32 bytes. Most but not all PA 2.0 processors have a cache line
|
| 785 |
|
|
of 64 bytes. As cache flushes are expensive and we don't support
|
| 786 |
|
|
PA 1.0, we use a minimum length of 32. */
|
| 787 |
|
|
|
| 788 |
|
|
#define MIN_CACHELINE_SIZE 32
|
| 789 |
|
|
|
| 790 |
|
|
|
| 791 |
|
|
/* Addressing modes, and classification of registers for them.
|
| 792 |
|
|
|
| 793 |
|
|
Using autoincrement addressing modes on PA8000 class machines is
|
| 794 |
|
|
not profitable. */
|
| 795 |
|
|
|
| 796 |
|
|
#define HAVE_POST_INCREMENT (pa_cpu < PROCESSOR_8000)
|
| 797 |
|
|
#define HAVE_POST_DECREMENT (pa_cpu < PROCESSOR_8000)
|
| 798 |
|
|
|
| 799 |
|
|
#define HAVE_PRE_DECREMENT (pa_cpu < PROCESSOR_8000)
|
| 800 |
|
|
#define HAVE_PRE_INCREMENT (pa_cpu < PROCESSOR_8000)
|
| 801 |
|
|
|
| 802 |
|
|
/* Macros to check register numbers against specific register classes. */
|
| 803 |
|
|
|
| 804 |
|
|
/* The following macros assume that X is a hard or pseudo reg number.
|
| 805 |
|
|
They give nonzero only if X is a hard reg of the suitable class
|
| 806 |
|
|
or a pseudo reg currently allocated to a suitable hard reg.
|
| 807 |
|
|
Since they use reg_renumber, they are safe only once reg_renumber
|
| 808 |
|
|
has been allocated, which happens in local-alloc.c. */
|
| 809 |
|
|
|
| 810 |
|
|
#define REGNO_OK_FOR_INDEX_P(X) \
|
| 811 |
|
|
((X) && ((X) < 32 \
|
| 812 |
|
|
|| (X >= FIRST_PSEUDO_REGISTER \
|
| 813 |
|
|
&& reg_renumber \
|
| 814 |
|
|
&& (unsigned) reg_renumber[X] < 32)))
|
| 815 |
|
|
#define REGNO_OK_FOR_BASE_P(X) \
|
| 816 |
|
|
((X) && ((X) < 32 \
|
| 817 |
|
|
|| (X >= FIRST_PSEUDO_REGISTER \
|
| 818 |
|
|
&& reg_renumber \
|
| 819 |
|
|
&& (unsigned) reg_renumber[X] < 32)))
|
| 820 |
|
|
#define REGNO_OK_FOR_FP_P(X) \
|
| 821 |
|
|
(FP_REGNO_P (X) \
|
| 822 |
|
|
|| (X >= FIRST_PSEUDO_REGISTER \
|
| 823 |
|
|
&& reg_renumber \
|
| 824 |
|
|
&& FP_REGNO_P (reg_renumber[X])))
|
| 825 |
|
|
|
| 826 |
|
|
/* Now macros that check whether X is a register and also,
|
| 827 |
|
|
strictly, whether it is in a specified class.
|
| 828 |
|
|
|
| 829 |
|
|
These macros are specific to the HP-PA, and may be used only
|
| 830 |
|
|
in code for printing assembler insns and in conditions for
|
| 831 |
|
|
define_optimization. */
|
| 832 |
|
|
|
| 833 |
|
|
/* 1 if X is an fp register. */
|
| 834 |
|
|
|
| 835 |
|
|
#define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
|
| 836 |
|
|
|
| 837 |
|
|
/* Maximum number of registers that can appear in a valid memory address. */
|
| 838 |
|
|
|
| 839 |
|
|
#define MAX_REGS_PER_ADDRESS 2
|
| 840 |
|
|
|
| 841 |
|
|
/* Non-TLS symbolic references. */
|
| 842 |
|
|
#define PA_SYMBOL_REF_TLS_P(RTX) \
|
| 843 |
|
|
(GET_CODE (RTX) == SYMBOL_REF && SYMBOL_REF_TLS_MODEL (RTX) != 0)
|
| 844 |
|
|
|
| 845 |
|
|
/* Recognize any constant value that is a valid address except
|
| 846 |
|
|
for symbolic addresses. We get better CSE by rejecting them
|
| 847 |
|
|
here and allowing hppa_legitimize_address to break them up. We
|
| 848 |
|
|
use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */
|
| 849 |
|
|
|
| 850 |
|
|
#define CONSTANT_ADDRESS_P(X) \
|
| 851 |
|
|
((GET_CODE (X) == LABEL_REF \
|
| 852 |
|
|
|| (GET_CODE (X) == SYMBOL_REF && !SYMBOL_REF_TLS_MODEL (X)) \
|
| 853 |
|
|
|| GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
|
| 854 |
|
|
|| GET_CODE (X) == HIGH) \
|
| 855 |
|
|
&& (reload_in_progress || reload_completed || ! symbolic_expression_p (X)))
|
| 856 |
|
|
|
| 857 |
|
|
/* A C expression that is nonzero if we are using the new HP assembler. */
|
| 858 |
|
|
|
| 859 |
|
|
#ifndef NEW_HP_ASSEMBLER
|
| 860 |
|
|
#define NEW_HP_ASSEMBLER 0
|
| 861 |
|
|
#endif
|
| 862 |
|
|
|
| 863 |
|
|
/* The macros below define the immediate range for CONST_INTS on
|
| 864 |
|
|
the 64-bit port. Constants in this range can be loaded in three
|
| 865 |
|
|
instructions using a ldil/ldo/depdi sequence. Constants outside
|
| 866 |
|
|
this range are forced to the constant pool prior to reload. */
|
| 867 |
|
|
|
| 868 |
|
|
#define MAX_LEGIT_64BIT_CONST_INT ((HOST_WIDE_INT) 32 << 31)
|
| 869 |
|
|
#define MIN_LEGIT_64BIT_CONST_INT ((HOST_WIDE_INT) -32 << 31)
|
| 870 |
|
|
#define LEGITIMATE_64BIT_CONST_INT_P(X) \
|
| 871 |
|
|
((X) >= MIN_LEGIT_64BIT_CONST_INT && (X) < MAX_LEGIT_64BIT_CONST_INT)
|
| 872 |
|
|
|
| 873 |
|
|
/* A C expression that is nonzero if X is a legitimate constant for an
|
| 874 |
|
|
immediate operand.
|
| 875 |
|
|
|
| 876 |
|
|
We include all constant integers and constant doubles, but not
|
| 877 |
|
|
floating-point, except for floating-point zero. We reject LABEL_REFs
|
| 878 |
|
|
if we're not using gas or the new HP assembler.
|
| 879 |
|
|
|
| 880 |
|
|
In 64-bit mode, we reject CONST_DOUBLES. We also reject CONST_INTS
|
| 881 |
|
|
that need more than three instructions to load prior to reload. This
|
| 882 |
|
|
limit is somewhat arbitrary. It takes three instructions to load a
|
| 883 |
|
|
CONST_INT from memory but two are memory accesses. It may be better
|
| 884 |
|
|
to increase the allowed range for CONST_INTS. We may also be able
|
| 885 |
|
|
to handle CONST_DOUBLES. */
|
| 886 |
|
|
|
| 887 |
|
|
#define LEGITIMATE_CONSTANT_P(X) \
|
| 888 |
|
|
((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
|
| 889 |
|
|
|| (X) == CONST0_RTX (GET_MODE (X))) \
|
| 890 |
|
|
&& (NEW_HP_ASSEMBLER \
|
| 891 |
|
|
|| TARGET_GAS \
|
| 892 |
|
|
|| GET_CODE (X) != LABEL_REF) \
|
| 893 |
|
|
&& (!TARGET_64BIT \
|
| 894 |
|
|
|| GET_CODE (X) != CONST_DOUBLE) \
|
| 895 |
|
|
&& (!TARGET_64BIT \
|
| 896 |
|
|
|| HOST_BITS_PER_WIDE_INT <= 32 \
|
| 897 |
|
|
|| GET_CODE (X) != CONST_INT \
|
| 898 |
|
|
|| reload_in_progress \
|
| 899 |
|
|
|| reload_completed \
|
| 900 |
|
|
|| LEGITIMATE_64BIT_CONST_INT_P (INTVAL (X)) \
|
| 901 |
|
|
|| cint_ok_for_move (INTVAL (X))) \
|
| 902 |
|
|
&& !function_label_operand (X, VOIDmode))
|
| 903 |
|
|
|
| 904 |
|
|
/* Target flags set on a symbol_ref. */
|
| 905 |
|
|
|
| 906 |
|
|
/* Set by ASM_OUTPUT_SYMBOL_REF when a symbol_ref is output. */
|
| 907 |
|
|
#define SYMBOL_FLAG_REFERENCED (1 << SYMBOL_FLAG_MACH_DEP_SHIFT)
|
| 908 |
|
|
#define SYMBOL_REF_REFERENCED_P(RTX) \
|
| 909 |
|
|
((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_REFERENCED) != 0)
|
| 910 |
|
|
|
| 911 |
|
|
/* Defines for constraints.md. */
|
| 912 |
|
|
|
| 913 |
|
|
/* Return 1 iff OP is a scaled or unscaled index address. */
|
| 914 |
|
|
#define IS_INDEX_ADDR_P(OP) \
|
| 915 |
|
|
(GET_CODE (OP) == PLUS \
|
| 916 |
|
|
&& GET_MODE (OP) == Pmode \
|
| 917 |
|
|
&& (GET_CODE (XEXP (OP, 0)) == MULT \
|
| 918 |
|
|
|| GET_CODE (XEXP (OP, 1)) == MULT \
|
| 919 |
|
|
|| (REG_P (XEXP (OP, 0)) \
|
| 920 |
|
|
&& REG_P (XEXP (OP, 1)))))
|
| 921 |
|
|
|
| 922 |
|
|
/* Return 1 iff OP is a LO_SUM DLT address. */
|
| 923 |
|
|
#define IS_LO_SUM_DLT_ADDR_P(OP) \
|
| 924 |
|
|
(GET_CODE (OP) == LO_SUM \
|
| 925 |
|
|
&& GET_MODE (OP) == Pmode \
|
| 926 |
|
|
&& REG_P (XEXP (OP, 0)) \
|
| 927 |
|
|
&& REG_OK_FOR_BASE_P (XEXP (OP, 0)) \
|
| 928 |
|
|
&& GET_CODE (XEXP (OP, 1)) == UNSPEC)
|
| 929 |
|
|
|
| 930 |
|
|
/* Nonzero if 14-bit offsets can be used for all loads and stores.
|
| 931 |
|
|
This is not possible when generating PA 1.x code as floating point
|
| 932 |
|
|
loads and stores only support 5-bit offsets. Note that we do not
|
| 933 |
|
|
forbid the use of 14-bit offsets in GO_IF_LEGITIMATE_ADDRESS.
|
| 934 |
|
|
Instead, we use pa_secondary_reload() to reload integer mode
|
| 935 |
|
|
REG+D memory addresses used in floating point loads and stores.
|
| 936 |
|
|
|
| 937 |
|
|
FIXME: the ELF32 linker clobbers the LSB of the FP register number
|
| 938 |
|
|
in PA 2.0 floating-point insns with long displacements. This is
|
| 939 |
|
|
because R_PARISC_DPREL14WR and other relocations like it are not
|
| 940 |
|
|
yet supported by GNU ld. For now, we reject long displacements
|
| 941 |
|
|
on this target. */
|
| 942 |
|
|
|
| 943 |
|
|
#define INT14_OK_STRICT \
|
| 944 |
|
|
(TARGET_SOFT_FLOAT \
|
| 945 |
|
|
|| TARGET_DISABLE_FPREGS \
|
| 946 |
|
|
|| (TARGET_PA_20 && !TARGET_ELF32))
|
| 947 |
|
|
|
| 948 |
|
|
/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
|
| 949 |
|
|
and check its validity for a certain class.
|
| 950 |
|
|
We have two alternate definitions for each of them.
|
| 951 |
|
|
The usual definition accepts all pseudo regs; the other rejects
|
| 952 |
|
|
them unless they have been allocated suitable hard regs.
|
| 953 |
|
|
The symbol REG_OK_STRICT causes the latter definition to be used.
|
| 954 |
|
|
|
| 955 |
|
|
Most source files want to accept pseudo regs in the hope that
|
| 956 |
|
|
they will get allocated to the class that the insn wants them to be in.
|
| 957 |
|
|
Source files for reload pass need to be strict.
|
| 958 |
|
|
After reload, it makes no difference, since pseudo regs have
|
| 959 |
|
|
been eliminated by then. */
|
| 960 |
|
|
|
| 961 |
|
|
#ifndef REG_OK_STRICT
|
| 962 |
|
|
|
| 963 |
|
|
/* Nonzero if X is a hard reg that can be used as an index
|
| 964 |
|
|
or if it is a pseudo reg. */
|
| 965 |
|
|
#define REG_OK_FOR_INDEX_P(X) \
|
| 966 |
|
|
(REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
|
| 967 |
|
|
|
| 968 |
|
|
/* Nonzero if X is a hard reg that can be used as a base reg
|
| 969 |
|
|
or if it is a pseudo reg. */
|
| 970 |
|
|
#define REG_OK_FOR_BASE_P(X) \
|
| 971 |
|
|
(REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
|
| 972 |
|
|
|
| 973 |
|
|
#else
|
| 974 |
|
|
|
| 975 |
|
|
/* Nonzero if X is a hard reg that can be used as an index. */
|
| 976 |
|
|
#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
|
| 977 |
|
|
|
| 978 |
|
|
/* Nonzero if X is a hard reg that can be used as a base reg. */
|
| 979 |
|
|
#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
|
| 980 |
|
|
|
| 981 |
|
|
#endif
|
| 982 |
|
|
|
| 983 |
|
|
/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
|
| 984 |
|
|
valid memory address for an instruction. The MODE argument is the
|
| 985 |
|
|
machine mode for the MEM expression that wants to use this address.
|
| 986 |
|
|
|
| 987 |
|
|
On HP PA-RISC, the legitimate address forms are REG+SMALLINT,
|
| 988 |
|
|
REG+REG, and REG+(REG*SCALE). The indexed address forms are only
|
| 989 |
|
|
available with floating point loads and stores, and integer loads.
|
| 990 |
|
|
We get better code by allowing indexed addresses in the initial
|
| 991 |
|
|
RTL generation.
|
| 992 |
|
|
|
| 993 |
|
|
The acceptance of indexed addresses as legitimate implies that we
|
| 994 |
|
|
must provide patterns for doing indexed integer stores, or the move
|
| 995 |
|
|
expanders must force the address of an indexed store to a register.
|
| 996 |
|
|
We have adopted the latter approach.
|
| 997 |
|
|
|
| 998 |
|
|
Another function of GO_IF_LEGITIMATE_ADDRESS is to ensure that
|
| 999 |
|
|
the base register is a valid pointer for indexed instructions.
|
| 1000 |
|
|
On targets that have non-equivalent space registers, we have to
|
| 1001 |
|
|
know at the time of assembler output which register in a REG+REG
|
| 1002 |
|
|
pair is the base register. The REG_POINTER flag is sometimes lost
|
| 1003 |
|
|
in reload and the following passes, so it can't be relied on during
|
| 1004 |
|
|
code generation. Thus, we either have to canonicalize the order
|
| 1005 |
|
|
of the registers in REG+REG indexed addresses, or treat REG+REG
|
| 1006 |
|
|
addresses separately and provide patterns for both permutations.
|
| 1007 |
|
|
|
| 1008 |
|
|
The latter approach requires several hundred additional lines of
|
| 1009 |
|
|
code in pa.md. The downside to canonicalizing is that a PLUS
|
| 1010 |
|
|
in the wrong order can't combine to form to make a scaled indexed
|
| 1011 |
|
|
memory operand. As we won't need to canonicalize the operands if
|
| 1012 |
|
|
the REG_POINTER lossage can be fixed, it seems better canonicalize.
|
| 1013 |
|
|
|
| 1014 |
|
|
We initially break out scaled indexed addresses in canonical order
|
| 1015 |
|
|
in emit_move_sequence. LEGITIMIZE_ADDRESS also canonicalizes
|
| 1016 |
|
|
scaled indexed addresses during RTL generation. However, fold_rtx
|
| 1017 |
|
|
has its own opinion on how the operands of a PLUS should be ordered.
|
| 1018 |
|
|
If one of the operands is equivalent to a constant, it will make
|
| 1019 |
|
|
that operand the second operand. As the base register is likely to
|
| 1020 |
|
|
be equivalent to a SYMBOL_REF, we have made it the second operand.
|
| 1021 |
|
|
|
| 1022 |
|
|
GO_IF_LEGITIMATE_ADDRESS accepts REG+REG as legitimate when the
|
| 1023 |
|
|
operands are in the order INDEX+BASE on targets with non-equivalent
|
| 1024 |
|
|
space registers, and in any order on targets with equivalent space
|
| 1025 |
|
|
registers. It accepts both MULT+BASE and BASE+MULT for scaled indexing.
|
| 1026 |
|
|
|
| 1027 |
|
|
We treat a SYMBOL_REF as legitimate if it is part of the current
|
| 1028 |
|
|
function's constant-pool, because such addresses can actually be
|
| 1029 |
|
|
output as REG+SMALLINT. */
|
| 1030 |
|
|
|
| 1031 |
|
|
#define VAL_5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x10 < 0x20)
|
| 1032 |
|
|
#define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
|
| 1033 |
|
|
|
| 1034 |
|
|
#define VAL_U5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) < 0x20)
|
| 1035 |
|
|
#define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
|
| 1036 |
|
|
|
| 1037 |
|
|
#define VAL_11_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x400 < 0x800)
|
| 1038 |
|
|
#define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
|
| 1039 |
|
|
|
| 1040 |
|
|
#define VAL_14_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x2000 < 0x4000)
|
| 1041 |
|
|
#define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
|
| 1042 |
|
|
|
| 1043 |
|
|
#if HOST_BITS_PER_WIDE_INT > 32
|
| 1044 |
|
|
#define VAL_32_BITS_P(X) \
|
| 1045 |
|
|
((unsigned HOST_WIDE_INT)(X) + ((unsigned HOST_WIDE_INT) 1 << 31) \
|
| 1046 |
|
|
< (unsigned HOST_WIDE_INT) 2 << 31)
|
| 1047 |
|
|
#else
|
| 1048 |
|
|
#define VAL_32_BITS_P(X) 1
|
| 1049 |
|
|
#endif
|
| 1050 |
|
|
#define INT_32_BITS(X) VAL_32_BITS_P (INTVAL (X))
|
| 1051 |
|
|
|
| 1052 |
|
|
/* These are the modes that we allow for scaled indexing. */
|
| 1053 |
|
|
#define MODE_OK_FOR_SCALED_INDEXING_P(MODE) \
|
| 1054 |
|
|
((TARGET_64BIT && (MODE) == DImode) \
|
| 1055 |
|
|
|| (MODE) == SImode \
|
| 1056 |
|
|
|| (MODE) == HImode \
|
| 1057 |
|
|
|| (MODE) == SFmode \
|
| 1058 |
|
|
|| (MODE) == DFmode)
|
| 1059 |
|
|
|
| 1060 |
|
|
/* These are the modes that we allow for unscaled indexing. */
|
| 1061 |
|
|
#define MODE_OK_FOR_UNSCALED_INDEXING_P(MODE) \
|
| 1062 |
|
|
((TARGET_64BIT && (MODE) == DImode) \
|
| 1063 |
|
|
|| (MODE) == SImode \
|
| 1064 |
|
|
|| (MODE) == HImode \
|
| 1065 |
|
|
|| (MODE) == QImode \
|
| 1066 |
|
|
|| (MODE) == SFmode \
|
| 1067 |
|
|
|| (MODE) == DFmode)
|
| 1068 |
|
|
|
| 1069 |
|
|
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
|
| 1070 |
|
|
{ \
|
| 1071 |
|
|
if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
|
| 1072 |
|
|
|| ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
|
| 1073 |
|
|
|| GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
|
| 1074 |
|
|
&& REG_P (XEXP (X, 0)) \
|
| 1075 |
|
|
&& REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
|
| 1076 |
|
|
goto ADDR; \
|
| 1077 |
|
|
else if (GET_CODE (X) == PLUS) \
|
| 1078 |
|
|
{ \
|
| 1079 |
|
|
rtx base = 0, index = 0; \
|
| 1080 |
|
|
if (REG_P (XEXP (X, 1)) \
|
| 1081 |
|
|
&& REG_OK_FOR_BASE_P (XEXP (X, 1))) \
|
| 1082 |
|
|
base = XEXP (X, 1), index = XEXP (X, 0); \
|
| 1083 |
|
|
else if (REG_P (XEXP (X, 0)) \
|
| 1084 |
|
|
&& REG_OK_FOR_BASE_P (XEXP (X, 0))) \
|
| 1085 |
|
|
base = XEXP (X, 0), index = XEXP (X, 1); \
|
| 1086 |
|
|
if (base \
|
| 1087 |
|
|
&& GET_CODE (index) == CONST_INT \
|
| 1088 |
|
|
&& ((INT_14_BITS (index) \
|
| 1089 |
|
|
&& (((MODE) != DImode \
|
| 1090 |
|
|
&& (MODE) != SFmode \
|
| 1091 |
|
|
&& (MODE) != DFmode) \
|
| 1092 |
|
|
/* The base register for DImode loads and stores \
|
| 1093 |
|
|
with long displacements must be aligned because \
|
| 1094 |
|
|
the lower three bits in the displacement are \
|
| 1095 |
|
|
assumed to be zero. */ \
|
| 1096 |
|
|
|| ((MODE) == DImode \
|
| 1097 |
|
|
&& (!TARGET_64BIT \
|
| 1098 |
|
|
|| (INTVAL (index) % 8) == 0)) \
|
| 1099 |
|
|
/* Similarly, the base register for SFmode/DFmode \
|
| 1100 |
|
|
loads and stores with long displacements must \
|
| 1101 |
|
|
be aligned. */ \
|
| 1102 |
|
|
|| (((MODE) == SFmode || (MODE) == DFmode) \
|
| 1103 |
|
|
&& INT14_OK_STRICT \
|
| 1104 |
|
|
&& (INTVAL (index) % GET_MODE_SIZE (MODE)) == 0))) \
|
| 1105 |
|
|
|| INT_5_BITS (index))) \
|
| 1106 |
|
|
goto ADDR; \
|
| 1107 |
|
|
if (!TARGET_DISABLE_INDEXING \
|
| 1108 |
|
|
/* Only accept the "canonical" INDEX+BASE operand order \
|
| 1109 |
|
|
on targets with non-equivalent space registers. */ \
|
| 1110 |
|
|
&& (TARGET_NO_SPACE_REGS \
|
| 1111 |
|
|
? (base && REG_P (index)) \
|
| 1112 |
|
|
: (base == XEXP (X, 1) && REG_P (index) \
|
| 1113 |
|
|
&& (reload_completed \
|
| 1114 |
|
|
|| (reload_in_progress && HARD_REGISTER_P (base)) \
|
| 1115 |
|
|
|| REG_POINTER (base)) \
|
| 1116 |
|
|
&& (reload_completed \
|
| 1117 |
|
|
|| (reload_in_progress && HARD_REGISTER_P (index)) \
|
| 1118 |
|
|
|| !REG_POINTER (index)))) \
|
| 1119 |
|
|
&& MODE_OK_FOR_UNSCALED_INDEXING_P (MODE) \
|
| 1120 |
|
|
&& REG_OK_FOR_INDEX_P (index) \
|
| 1121 |
|
|
&& borx_reg_operand (base, Pmode) \
|
| 1122 |
|
|
&& borx_reg_operand (index, Pmode)) \
|
| 1123 |
|
|
goto ADDR; \
|
| 1124 |
|
|
if (!TARGET_DISABLE_INDEXING \
|
| 1125 |
|
|
&& base \
|
| 1126 |
|
|
&& GET_CODE (index) == MULT \
|
| 1127 |
|
|
&& MODE_OK_FOR_SCALED_INDEXING_P (MODE) \
|
| 1128 |
|
|
&& REG_P (XEXP (index, 0)) \
|
| 1129 |
|
|
&& GET_MODE (XEXP (index, 0)) == Pmode \
|
| 1130 |
|
|
&& REG_OK_FOR_INDEX_P (XEXP (index, 0)) \
|
| 1131 |
|
|
&& GET_CODE (XEXP (index, 1)) == CONST_INT \
|
| 1132 |
|
|
&& INTVAL (XEXP (index, 1)) \
|
| 1133 |
|
|
== (HOST_WIDE_INT) GET_MODE_SIZE (MODE) \
|
| 1134 |
|
|
&& borx_reg_operand (base, Pmode)) \
|
| 1135 |
|
|
goto ADDR; \
|
| 1136 |
|
|
} \
|
| 1137 |
|
|
else if (GET_CODE (X) == LO_SUM \
|
| 1138 |
|
|
&& GET_CODE (XEXP (X, 0)) == REG \
|
| 1139 |
|
|
&& REG_OK_FOR_BASE_P (XEXP (X, 0)) \
|
| 1140 |
|
|
&& CONSTANT_P (XEXP (X, 1)) \
|
| 1141 |
|
|
&& (TARGET_SOFT_FLOAT \
|
| 1142 |
|
|
/* We can allow symbolic LO_SUM addresses for PA2.0. */ \
|
| 1143 |
|
|
|| (TARGET_PA_20 \
|
| 1144 |
|
|
&& !TARGET_ELF32 \
|
| 1145 |
|
|
&& GET_CODE (XEXP (X, 1)) != CONST_INT) \
|
| 1146 |
|
|
|| ((MODE) != SFmode \
|
| 1147 |
|
|
&& (MODE) != DFmode))) \
|
| 1148 |
|
|
goto ADDR; \
|
| 1149 |
|
|
else if (GET_CODE (X) == LO_SUM \
|
| 1150 |
|
|
&& GET_CODE (XEXP (X, 0)) == SUBREG \
|
| 1151 |
|
|
&& GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG \
|
| 1152 |
|
|
&& REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0))) \
|
| 1153 |
|
|
&& CONSTANT_P (XEXP (X, 1)) \
|
| 1154 |
|
|
&& (TARGET_SOFT_FLOAT \
|
| 1155 |
|
|
/* We can allow symbolic LO_SUM addresses for PA2.0. */ \
|
| 1156 |
|
|
|| (TARGET_PA_20 \
|
| 1157 |
|
|
&& !TARGET_ELF32 \
|
| 1158 |
|
|
&& GET_CODE (XEXP (X, 1)) != CONST_INT) \
|
| 1159 |
|
|
|| ((MODE) != SFmode \
|
| 1160 |
|
|
&& (MODE) != DFmode))) \
|
| 1161 |
|
|
goto ADDR; \
|
| 1162 |
|
|
else if (GET_CODE (X) == CONST_INT && INT_5_BITS (X)) \
|
| 1163 |
|
|
goto ADDR; \
|
| 1164 |
|
|
/* Needed for -fPIC */ \
|
| 1165 |
|
|
else if (GET_CODE (X) == LO_SUM \
|
| 1166 |
|
|
&& GET_CODE (XEXP (X, 0)) == REG \
|
| 1167 |
|
|
&& REG_OK_FOR_BASE_P (XEXP (X, 0)) \
|
| 1168 |
|
|
&& GET_CODE (XEXP (X, 1)) == UNSPEC \
|
| 1169 |
|
|
&& (TARGET_SOFT_FLOAT \
|
| 1170 |
|
|
|| (TARGET_PA_20 && !TARGET_ELF32) \
|
| 1171 |
|
|
|| ((MODE) != SFmode \
|
| 1172 |
|
|
&& (MODE) != DFmode))) \
|
| 1173 |
|
|
goto ADDR; \
|
| 1174 |
|
|
}
|
| 1175 |
|
|
|
| 1176 |
|
|
/* Look for machine dependent ways to make the invalid address AD a
|
| 1177 |
|
|
valid address.
|
| 1178 |
|
|
|
| 1179 |
|
|
For the PA, transform:
|
| 1180 |
|
|
|
| 1181 |
|
|
memory(X + <large int>)
|
| 1182 |
|
|
|
| 1183 |
|
|
into:
|
| 1184 |
|
|
|
| 1185 |
|
|
if (<large int> & mask) >= 16
|
| 1186 |
|
|
Y = (<large int> & ~mask) + mask + 1 Round up.
|
| 1187 |
|
|
else
|
| 1188 |
|
|
Y = (<large int> & ~mask) Round down.
|
| 1189 |
|
|
Z = X + Y
|
| 1190 |
|
|
memory (Z + (<large int> - Y));
|
| 1191 |
|
|
|
| 1192 |
|
|
This makes reload inheritance and reload_cse work better since Z
|
| 1193 |
|
|
can be reused.
|
| 1194 |
|
|
|
| 1195 |
|
|
There may be more opportunities to improve code with this hook. */
|
| 1196 |
|
|
#define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) \
|
| 1197 |
|
|
do { \
|
| 1198 |
|
|
long offset, newoffset, mask; \
|
| 1199 |
|
|
rtx new_rtx, temp = NULL_RTX; \
|
| 1200 |
|
|
\
|
| 1201 |
|
|
mask = (GET_MODE_CLASS (MODE) == MODE_FLOAT \
|
| 1202 |
|
|
? (INT14_OK_STRICT ? 0x3fff : 0x1f) : 0x3fff); \
|
| 1203 |
|
|
\
|
| 1204 |
|
|
if (optimize && GET_CODE (AD) == PLUS) \
|
| 1205 |
|
|
temp = simplify_binary_operation (PLUS, Pmode, \
|
| 1206 |
|
|
XEXP (AD, 0), XEXP (AD, 1)); \
|
| 1207 |
|
|
\
|
| 1208 |
|
|
new_rtx = temp ? temp : AD; \
|
| 1209 |
|
|
\
|
| 1210 |
|
|
if (optimize \
|
| 1211 |
|
|
&& GET_CODE (new_rtx) == PLUS \
|
| 1212 |
|
|
&& GET_CODE (XEXP (new_rtx, 0)) == REG \
|
| 1213 |
|
|
&& GET_CODE (XEXP (new_rtx, 1)) == CONST_INT) \
|
| 1214 |
|
|
{ \
|
| 1215 |
|
|
offset = INTVAL (XEXP ((new_rtx), 1)); \
|
| 1216 |
|
|
\
|
| 1217 |
|
|
/* Choose rounding direction. Round up if we are >= halfway. */ \
|
| 1218 |
|
|
if ((offset & mask) >= ((mask + 1) / 2)) \
|
| 1219 |
|
|
newoffset = (offset & ~mask) + mask + 1; \
|
| 1220 |
|
|
else \
|
| 1221 |
|
|
newoffset = offset & ~mask; \
|
| 1222 |
|
|
\
|
| 1223 |
|
|
/* Ensure that long displacements are aligned. */ \
|
| 1224 |
|
|
if (mask == 0x3fff \
|
| 1225 |
|
|
&& (GET_MODE_CLASS (MODE) == MODE_FLOAT \
|
| 1226 |
|
|
|| (TARGET_64BIT && (MODE) == DImode))) \
|
| 1227 |
|
|
newoffset &= ~(GET_MODE_SIZE (MODE) - 1); \
|
| 1228 |
|
|
\
|
| 1229 |
|
|
if (newoffset != 0 && VAL_14_BITS_P (newoffset)) \
|
| 1230 |
|
|
{ \
|
| 1231 |
|
|
temp = gen_rtx_PLUS (Pmode, XEXP (new_rtx, 0), \
|
| 1232 |
|
|
GEN_INT (newoffset)); \
|
| 1233 |
|
|
AD = gen_rtx_PLUS (Pmode, temp, GEN_INT (offset - newoffset));\
|
| 1234 |
|
|
push_reload (XEXP (AD, 0), 0, &XEXP (AD, 0), 0, \
|
| 1235 |
|
|
BASE_REG_CLASS, Pmode, VOIDmode, 0, 0, \
|
| 1236 |
|
|
(OPNUM), (TYPE)); \
|
| 1237 |
|
|
goto WIN; \
|
| 1238 |
|
|
} \
|
| 1239 |
|
|
} \
|
| 1240 |
|
|
} while (0)
|
| 1241 |
|
|
|
| 1242 |
|
|
|
| 1243 |
|
|
|
| 1244 |
|
|
#define TARGET_ASM_SELECT_SECTION pa_select_section
|
| 1245 |
|
|
|
| 1246 |
|
|
/* Return a nonzero value if DECL has a section attribute. */
|
| 1247 |
|
|
#define IN_NAMED_SECTION_P(DECL) \
|
| 1248 |
|
|
((TREE_CODE (DECL) == FUNCTION_DECL || TREE_CODE (DECL) == VAR_DECL) \
|
| 1249 |
|
|
&& DECL_SECTION_NAME (DECL) != NULL_TREE)
|
| 1250 |
|
|
|
| 1251 |
|
|
/* Define this macro if references to a symbol must be treated
|
| 1252 |
|
|
differently depending on something about the variable or
|
| 1253 |
|
|
function named by the symbol (such as what section it is in).
|
| 1254 |
|
|
|
| 1255 |
|
|
The macro definition, if any, is executed immediately after the
|
| 1256 |
|
|
rtl for DECL or other node is created.
|
| 1257 |
|
|
The value of the rtl will be a `mem' whose address is a
|
| 1258 |
|
|
`symbol_ref'.
|
| 1259 |
|
|
|
| 1260 |
|
|
The usual thing for this macro to do is to a flag in the
|
| 1261 |
|
|
`symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
|
| 1262 |
|
|
name string in the `symbol_ref' (if one bit is not enough
|
| 1263 |
|
|
information).
|
| 1264 |
|
|
|
| 1265 |
|
|
On the HP-PA we use this to indicate if a symbol is in text or
|
| 1266 |
|
|
data space. Also, function labels need special treatment. */
|
| 1267 |
|
|
|
| 1268 |
|
|
#define TEXT_SPACE_P(DECL)\
|
| 1269 |
|
|
(TREE_CODE (DECL) == FUNCTION_DECL \
|
| 1270 |
|
|
|| (TREE_CODE (DECL) == VAR_DECL \
|
| 1271 |
|
|
&& TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
|
| 1272 |
|
|
&& (! DECL_INITIAL (DECL) || ! reloc_needed (DECL_INITIAL (DECL))) \
|
| 1273 |
|
|
&& !flag_pic) \
|
| 1274 |
|
|
|| CONSTANT_CLASS_P (DECL))
|
| 1275 |
|
|
|
| 1276 |
|
|
#define FUNCTION_NAME_P(NAME) (*(NAME) == '@')
|
| 1277 |
|
|
|
| 1278 |
|
|
/* Specify the machine mode that this machine uses for the index in the
|
| 1279 |
|
|
tablejump instruction. For small tables, an element consists of a
|
| 1280 |
|
|
ia-relative branch and its delay slot. When -mbig-switch is specified,
|
| 1281 |
|
|
we use a 32-bit absolute address for non-pic code, and a 32-bit offset
|
| 1282 |
|
|
for both 32 and 64-bit pic code. */
|
| 1283 |
|
|
#define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? SImode : DImode)
|
| 1284 |
|
|
|
| 1285 |
|
|
/* Jump tables must be 32-bit aligned, no matter the size of the element. */
|
| 1286 |
|
|
#define ADDR_VEC_ALIGN(ADDR_VEC) 2
|
| 1287 |
|
|
|
| 1288 |
|
|
/* Define this as 1 if `char' should by default be signed; else as 0. */
|
| 1289 |
|
|
#define DEFAULT_SIGNED_CHAR 1
|
| 1290 |
|
|
|
| 1291 |
|
|
/* Max number of bytes we can move from memory to memory
|
| 1292 |
|
|
in one reasonably fast instruction. */
|
| 1293 |
|
|
#define MOVE_MAX 8
|
| 1294 |
|
|
|
| 1295 |
|
|
/* Higher than the default as we prefer to use simple move insns
|
| 1296 |
|
|
(better scheduling and delay slot filling) and because our
|
| 1297 |
|
|
built-in block move is really a 2X unrolled loop.
|
| 1298 |
|
|
|
| 1299 |
|
|
Believe it or not, this has to be big enough to allow for copying all
|
| 1300 |
|
|
arguments passed in registers to avoid infinite recursion during argument
|
| 1301 |
|
|
setup for a function call. Why? Consider how we copy the stack slots
|
| 1302 |
|
|
reserved for parameters when they may be trashed by a call. */
|
| 1303 |
|
|
#define MOVE_RATIO(speed) (TARGET_64BIT ? 8 : 4)
|
| 1304 |
|
|
|
| 1305 |
|
|
/* Define if operations between registers always perform the operation
|
| 1306 |
|
|
on the full register even if a narrower mode is specified. */
|
| 1307 |
|
|
#define WORD_REGISTER_OPERATIONS
|
| 1308 |
|
|
|
| 1309 |
|
|
/* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
|
| 1310 |
|
|
will either zero-extend or sign-extend. The value of this macro should
|
| 1311 |
|
|
be the code that says which one of the two operations is implicitly
|
| 1312 |
|
|
done, UNKNOWN if none. */
|
| 1313 |
|
|
#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
|
| 1314 |
|
|
|
| 1315 |
|
|
/* Nonzero if access to memory by bytes is slow and undesirable. */
|
| 1316 |
|
|
#define SLOW_BYTE_ACCESS 1
|
| 1317 |
|
|
|
| 1318 |
|
|
/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
|
| 1319 |
|
|
is done just by pretending it is already truncated. */
|
| 1320 |
|
|
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
|
| 1321 |
|
|
|
| 1322 |
|
|
/* Specify the machine mode that pointers have.
|
| 1323 |
|
|
After generation of rtl, the compiler makes no further distinction
|
| 1324 |
|
|
between pointers and any other objects of this machine mode. */
|
| 1325 |
|
|
#define Pmode word_mode
|
| 1326 |
|
|
|
| 1327 |
|
|
/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
|
| 1328 |
|
|
return the mode to be used for the comparison. For floating-point, CCFPmode
|
| 1329 |
|
|
should be used. CC_NOOVmode should be used when the first operand is a
|
| 1330 |
|
|
PLUS, MINUS, or NEG. CCmode should be used when no special processing is
|
| 1331 |
|
|
needed. */
|
| 1332 |
|
|
#define SELECT_CC_MODE(OP,X,Y) \
|
| 1333 |
|
|
(GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
|
| 1334 |
|
|
|
| 1335 |
|
|
/* A function address in a call instruction
|
| 1336 |
|
|
is a byte address (for indexing purposes)
|
| 1337 |
|
|
so give the MEM rtx a byte's mode. */
|
| 1338 |
|
|
#define FUNCTION_MODE SImode
|
| 1339 |
|
|
|
| 1340 |
|
|
/* Define this if addresses of constant functions
|
| 1341 |
|
|
shouldn't be put through pseudo regs where they can be cse'd.
|
| 1342 |
|
|
Desirable on machines where ordinary constants are expensive
|
| 1343 |
|
|
but a CALL with constant address is cheap. */
|
| 1344 |
|
|
#define NO_FUNCTION_CSE
|
| 1345 |
|
|
|
| 1346 |
|
|
/* Define this to be nonzero if shift instructions ignore all but the low-order
|
| 1347 |
|
|
few bits. */
|
| 1348 |
|
|
#define SHIFT_COUNT_TRUNCATED 1
|
| 1349 |
|
|
|
| 1350 |
|
|
/* Compute extra cost of moving data between one register class
|
| 1351 |
|
|
and another.
|
| 1352 |
|
|
|
| 1353 |
|
|
Make moves from SAR so expensive they should never happen. We used to
|
| 1354 |
|
|
have 0xffff here, but that generates overflow in rare cases.
|
| 1355 |
|
|
|
| 1356 |
|
|
Copies involving a FP register and a non-FP register are relatively
|
| 1357 |
|
|
expensive because they must go through memory.
|
| 1358 |
|
|
|
| 1359 |
|
|
Other copies are reasonably cheap. */
|
| 1360 |
|
|
#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
|
| 1361 |
|
|
(CLASS1 == SHIFT_REGS ? 0x100 \
|
| 1362 |
|
|
: FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \
|
| 1363 |
|
|
: FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \
|
| 1364 |
|
|
: 2)
|
| 1365 |
|
|
|
| 1366 |
|
|
/* Adjust the cost of branches. */
|
| 1367 |
|
|
#define BRANCH_COST(speed_p, predictable_p) (pa_cpu == PROCESSOR_8000 ? 2 : 1)
|
| 1368 |
|
|
|
| 1369 |
|
|
/* Handling the special cases is going to get too complicated for a macro,
|
| 1370 |
|
|
just call `pa_adjust_insn_length' to do the real work. */
|
| 1371 |
|
|
#define ADJUST_INSN_LENGTH(INSN, LENGTH) \
|
| 1372 |
|
|
LENGTH += pa_adjust_insn_length (INSN, LENGTH);
|
| 1373 |
|
|
|
| 1374 |
|
|
/* Millicode insns are actually function calls with some special
|
| 1375 |
|
|
constraints on arguments and register usage.
|
| 1376 |
|
|
|
| 1377 |
|
|
Millicode calls always expect their arguments in the integer argument
|
| 1378 |
|
|
registers, and always return their result in %r29 (ret1). They
|
| 1379 |
|
|
are expected to clobber their arguments, %r1, %r29, and the return
|
| 1380 |
|
|
pointer which is %r31 on 32-bit and %r2 on 64-bit, and nothing else.
|
| 1381 |
|
|
|
| 1382 |
|
|
This macro tells reorg that the references to arguments and
|
| 1383 |
|
|
millicode calls do not appear to happen until after the millicode call.
|
| 1384 |
|
|
This allows reorg to put insns which set the argument registers into the
|
| 1385 |
|
|
delay slot of the millicode call -- thus they act more like traditional
|
| 1386 |
|
|
CALL_INSNs.
|
| 1387 |
|
|
|
| 1388 |
|
|
Note we cannot consider side effects of the insn to be delayed because
|
| 1389 |
|
|
the branch and link insn will clobber the return pointer. If we happened
|
| 1390 |
|
|
to use the return pointer in the delay slot of the call, then we lose.
|
| 1391 |
|
|
|
| 1392 |
|
|
get_attr_type will try to recognize the given insn, so make sure to
|
| 1393 |
|
|
filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
|
| 1394 |
|
|
in particular. */
|
| 1395 |
|
|
#define INSN_REFERENCES_ARE_DELAYED(X) (insn_refs_are_delayed (X))
|
| 1396 |
|
|
|
| 1397 |
|
|
|
| 1398 |
|
|
/* Control the assembler format that we output. */
|
| 1399 |
|
|
|
| 1400 |
|
|
/* A C string constant describing how to begin a comment in the target
|
| 1401 |
|
|
assembler language. The compiler assumes that the comment will end at
|
| 1402 |
|
|
the end of the line. */
|
| 1403 |
|
|
|
| 1404 |
|
|
#define ASM_COMMENT_START ";"
|
| 1405 |
|
|
|
| 1406 |
|
|
/* Output to assembler file text saying following lines
|
| 1407 |
|
|
may contain character constants, extra white space, comments, etc. */
|
| 1408 |
|
|
|
| 1409 |
|
|
#define ASM_APP_ON ""
|
| 1410 |
|
|
|
| 1411 |
|
|
/* Output to assembler file text saying following lines
|
| 1412 |
|
|
no longer contain unusual constructs. */
|
| 1413 |
|
|
|
| 1414 |
|
|
#define ASM_APP_OFF ""
|
| 1415 |
|
|
|
| 1416 |
|
|
/* This is how to output the definition of a user-level label named NAME,
|
| 1417 |
|
|
such as the label on a static function or variable NAME. */
|
| 1418 |
|
|
|
| 1419 |
|
|
#define ASM_OUTPUT_LABEL(FILE,NAME) \
|
| 1420 |
|
|
do { \
|
| 1421 |
|
|
assemble_name ((FILE), (NAME)); \
|
| 1422 |
|
|
if (TARGET_GAS) \
|
| 1423 |
|
|
fputs (":\n", (FILE)); \
|
| 1424 |
|
|
else \
|
| 1425 |
|
|
fputc ('\n', (FILE)); \
|
| 1426 |
|
|
} while (0)
|
| 1427 |
|
|
|
| 1428 |
|
|
/* This is how to output a reference to a user-level label named NAME.
|
| 1429 |
|
|
`assemble_name' uses this. */
|
| 1430 |
|
|
|
| 1431 |
|
|
#define ASM_OUTPUT_LABELREF(FILE,NAME) \
|
| 1432 |
|
|
do { \
|
| 1433 |
|
|
const char *xname = (NAME); \
|
| 1434 |
|
|
if (FUNCTION_NAME_P (NAME)) \
|
| 1435 |
|
|
xname += 1; \
|
| 1436 |
|
|
if (xname[0] == '*') \
|
| 1437 |
|
|
xname += 1; \
|
| 1438 |
|
|
else \
|
| 1439 |
|
|
fputs (user_label_prefix, FILE); \
|
| 1440 |
|
|
fputs (xname, FILE); \
|
| 1441 |
|
|
} while (0)
|
| 1442 |
|
|
|
| 1443 |
|
|
/* This how we output the symbol_ref X. */
|
| 1444 |
|
|
|
| 1445 |
|
|
#define ASM_OUTPUT_SYMBOL_REF(FILE,X) \
|
| 1446 |
|
|
do { \
|
| 1447 |
|
|
SYMBOL_REF_FLAGS (X) |= SYMBOL_FLAG_REFERENCED; \
|
| 1448 |
|
|
assemble_name (FILE, XSTR (X, 0)); \
|
| 1449 |
|
|
} while (0)
|
| 1450 |
|
|
|
| 1451 |
|
|
/* This is how to store into the string LABEL
|
| 1452 |
|
|
the symbol_ref name of an internal numbered label where
|
| 1453 |
|
|
PREFIX is the class of label and NUM is the number within the class.
|
| 1454 |
|
|
This is suitable for output with `assemble_name'. */
|
| 1455 |
|
|
|
| 1456 |
|
|
#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
|
| 1457 |
|
|
sprintf (LABEL, "*%c$%s%04ld", (PREFIX)[0], (PREFIX) + 1, (long)(NUM))
|
| 1458 |
|
|
|
| 1459 |
|
|
/* Output the definition of a compiler-generated label named NAME. */
|
| 1460 |
|
|
|
| 1461 |
|
|
#define ASM_OUTPUT_INTERNAL_LABEL(FILE,NAME) \
|
| 1462 |
|
|
do { \
|
| 1463 |
|
|
assemble_name_raw ((FILE), (NAME)); \
|
| 1464 |
|
|
if (TARGET_GAS) \
|
| 1465 |
|
|
fputs (":\n", (FILE)); \
|
| 1466 |
|
|
else \
|
| 1467 |
|
|
fputc ('\n', (FILE)); \
|
| 1468 |
|
|
} while (0)
|
| 1469 |
|
|
|
| 1470 |
|
|
#define TARGET_ASM_GLOBALIZE_LABEL pa_globalize_label
|
| 1471 |
|
|
|
| 1472 |
|
|
#define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
|
| 1473 |
|
|
output_ascii ((FILE), (P), (SIZE))
|
| 1474 |
|
|
|
| 1475 |
|
|
/* Jump tables are always placed in the text section. Technically, it
|
| 1476 |
|
|
is possible to put them in the readonly data section when -mbig-switch
|
| 1477 |
|
|
is specified. This has the benefit of getting the table out of .text
|
| 1478 |
|
|
and reducing branch lengths as a result. The downside is that an
|
| 1479 |
|
|
additional insn (addil) is needed to access the table when generating
|
| 1480 |
|
|
PIC code. The address difference table also has to use 32-bit
|
| 1481 |
|
|
pc-relative relocations. Currently, GAS does not support these
|
| 1482 |
|
|
relocations, although it is easily modified to do this operation.
|
| 1483 |
|
|
The table entries need to look like "$L1+(.+8-$L0)-$PIC_pcrel$0"
|
| 1484 |
|
|
when using ELF GAS. A simple difference can be used when using
|
| 1485 |
|
|
SOM GAS or the HP assembler. The final downside is GDB complains
|
| 1486 |
|
|
about the nesting of the label for the table when debugging. */
|
| 1487 |
|
|
|
| 1488 |
|
|
#define JUMP_TABLES_IN_TEXT_SECTION 1
|
| 1489 |
|
|
|
| 1490 |
|
|
/* This is how to output an element of a case-vector that is absolute. */
|
| 1491 |
|
|
|
| 1492 |
|
|
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
|
| 1493 |
|
|
if (TARGET_BIG_SWITCH) \
|
| 1494 |
|
|
fprintf (FILE, "\t.word L$%04d\n", VALUE); \
|
| 1495 |
|
|
else \
|
| 1496 |
|
|
fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
|
| 1497 |
|
|
|
| 1498 |
|
|
/* This is how to output an element of a case-vector that is relative.
|
| 1499 |
|
|
Since we always place jump tables in the text section, the difference
|
| 1500 |
|
|
is absolute and requires no relocation. */
|
| 1501 |
|
|
|
| 1502 |
|
|
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
|
| 1503 |
|
|
if (TARGET_BIG_SWITCH) \
|
| 1504 |
|
|
fprintf (FILE, "\t.word L$%04d-L$%04d\n", VALUE, REL); \
|
| 1505 |
|
|
else \
|
| 1506 |
|
|
fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
|
| 1507 |
|
|
|
| 1508 |
|
|
/* This is how to output an assembler line that says to advance the
|
| 1509 |
|
|
location counter to a multiple of 2**LOG bytes. */
|
| 1510 |
|
|
|
| 1511 |
|
|
#define ASM_OUTPUT_ALIGN(FILE,LOG) \
|
| 1512 |
|
|
fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
|
| 1513 |
|
|
|
| 1514 |
|
|
#define ASM_OUTPUT_SKIP(FILE,SIZE) \
|
| 1515 |
|
|
fprintf (FILE, "\t.blockz "HOST_WIDE_INT_PRINT_UNSIGNED"\n", \
|
| 1516 |
|
|
(unsigned HOST_WIDE_INT)(SIZE))
|
| 1517 |
|
|
|
| 1518 |
|
|
/* This says how to output an assembler line to define an uninitialized
|
| 1519 |
|
|
global variable with size SIZE (in bytes) and alignment ALIGN (in bits).
|
| 1520 |
|
|
This macro exists to properly support languages like C++ which do not
|
| 1521 |
|
|
have common data. */
|
| 1522 |
|
|
|
| 1523 |
|
|
#define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
|
| 1524 |
|
|
pa_asm_output_aligned_bss (FILE, NAME, SIZE, ALIGN)
|
| 1525 |
|
|
|
| 1526 |
|
|
/* This says how to output an assembler line to define a global common symbol
|
| 1527 |
|
|
with size SIZE (in bytes) and alignment ALIGN (in bits). */
|
| 1528 |
|
|
|
| 1529 |
|
|
#define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
|
| 1530 |
|
|
pa_asm_output_aligned_common (FILE, NAME, SIZE, ALIGN)
|
| 1531 |
|
|
|
| 1532 |
|
|
/* This says how to output an assembler line to define a local common symbol
|
| 1533 |
|
|
with size SIZE (in bytes) and alignment ALIGN (in bits). This macro
|
| 1534 |
|
|
controls how the assembler definitions of uninitialized static variables
|
| 1535 |
|
|
are output. */
|
| 1536 |
|
|
|
| 1537 |
|
|
#define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \
|
| 1538 |
|
|
pa_asm_output_aligned_local (FILE, NAME, SIZE, ALIGN)
|
| 1539 |
|
|
|
| 1540 |
|
|
/* All HP assemblers use "!" to separate logical lines. */
|
| 1541 |
|
|
#define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '!')
|
| 1542 |
|
|
|
| 1543 |
|
|
#define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
|
| 1544 |
|
|
((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
|
| 1545 |
|
|
|
| 1546 |
|
|
/* Print operand X (an rtx) in assembler syntax to file FILE.
|
| 1547 |
|
|
CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
|
| 1548 |
|
|
For `%' followed by punctuation, CODE is the punctuation and X is null.
|
| 1549 |
|
|
|
| 1550 |
|
|
On the HP-PA, the CODE can be `r', meaning this is a register-only operand
|
| 1551 |
|
|
and an immediate zero should be represented as `r0'.
|
| 1552 |
|
|
|
| 1553 |
|
|
Several % codes are defined:
|
| 1554 |
|
|
O an operation
|
| 1555 |
|
|
C compare conditions
|
| 1556 |
|
|
N extract conditions
|
| 1557 |
|
|
M modifier to handle preincrement addressing for memory refs.
|
| 1558 |
|
|
F modifier to handle preincrement addressing for fp memory refs */
|
| 1559 |
|
|
|
| 1560 |
|
|
#define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
|
| 1561 |
|
|
|
| 1562 |
|
|
|
| 1563 |
|
|
/* Print a memory address as an operand to reference that memory location. */
|
| 1564 |
|
|
|
| 1565 |
|
|
#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
|
| 1566 |
|
|
{ rtx addr = ADDR; \
|
| 1567 |
|
|
switch (GET_CODE (addr)) \
|
| 1568 |
|
|
{ \
|
| 1569 |
|
|
case REG: \
|
| 1570 |
|
|
fprintf (FILE, "0(%s)", reg_names [REGNO (addr)]); \
|
| 1571 |
|
|
break; \
|
| 1572 |
|
|
case PLUS: \
|
| 1573 |
|
|
gcc_assert (GET_CODE (XEXP (addr, 1)) == CONST_INT); \
|
| 1574 |
|
|
fprintf (FILE, "%d(%s)", (int)INTVAL (XEXP (addr, 1)), \
|
| 1575 |
|
|
reg_names [REGNO (XEXP (addr, 0))]); \
|
| 1576 |
|
|
break; \
|
| 1577 |
|
|
case LO_SUM: \
|
| 1578 |
|
|
if (!symbolic_operand (XEXP (addr, 1), VOIDmode)) \
|
| 1579 |
|
|
fputs ("R'", FILE); \
|
| 1580 |
|
|
else if (flag_pic == 0) \
|
| 1581 |
|
|
fputs ("RR'", FILE); \
|
| 1582 |
|
|
else \
|
| 1583 |
|
|
fputs ("RT'", FILE); \
|
| 1584 |
|
|
output_global_address (FILE, XEXP (addr, 1), 0); \
|
| 1585 |
|
|
fputs ("(", FILE); \
|
| 1586 |
|
|
output_operand (XEXP (addr, 0), 0); \
|
| 1587 |
|
|
fputs (")", FILE); \
|
| 1588 |
|
|
break; \
|
| 1589 |
|
|
case CONST_INT: \
|
| 1590 |
|
|
fprintf (FILE, HOST_WIDE_INT_PRINT_DEC "(%%r0)", INTVAL (addr)); \
|
| 1591 |
|
|
break; \
|
| 1592 |
|
|
default: \
|
| 1593 |
|
|
output_addr_const (FILE, addr); \
|
| 1594 |
|
|
}}
|
| 1595 |
|
|
|
| 1596 |
|
|
|
| 1597 |
|
|
/* Find the return address associated with the frame given by
|
| 1598 |
|
|
FRAMEADDR. */
|
| 1599 |
|
|
#define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
|
| 1600 |
|
|
(return_addr_rtx (COUNT, FRAMEADDR))
|
| 1601 |
|
|
|
| 1602 |
|
|
/* Used to mask out junk bits from the return address, such as
|
| 1603 |
|
|
processor state, interrupt status, condition codes and the like. */
|
| 1604 |
|
|
#define MASK_RETURN_ADDR \
|
| 1605 |
|
|
/* The privilege level is in the two low order bits, mask em out \
|
| 1606 |
|
|
of the return address. */ \
|
| 1607 |
|
|
(GEN_INT (-4))
|
| 1608 |
|
|
|
| 1609 |
|
|
/* The number of Pmode words for the setjmp buffer. */
|
| 1610 |
|
|
#define JMP_BUF_SIZE 50
|
| 1611 |
|
|
|
| 1612 |
|
|
/* We need a libcall to canonicalize function pointers on TARGET_ELF32. */
|
| 1613 |
|
|
#define CANONICALIZE_FUNCPTR_FOR_COMPARE_LIBCALL \
|
| 1614 |
|
|
"__canonicalize_funcptr_for_compare"
|
| 1615 |
|
|
|
| 1616 |
|
|
#ifdef HAVE_AS_TLS
|
| 1617 |
|
|
#undef TARGET_HAVE_TLS
|
| 1618 |
|
|
#define TARGET_HAVE_TLS true
|
| 1619 |
|
|
#endif
|