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jeremybenn |
;; Predicate definitions for Sunplus S+CORE.
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;; Copyright (C) 2005, 2007 Free Software Foundation, Inc.
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;;
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;; This file is part of GCC.
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;;
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;; GCC is free software; you can redistribute it and/or modify
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;; it under the terms of the GNU General Public License as published by
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;; the Free Software Foundation; either version 3, or (at your option)
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;; any later version.
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;;
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;; GCC is distributed in the hope that it will be useful,
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;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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;; GNU General Public License for more details.
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;;
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;; You should have received a copy of the GNU General Public License
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;; along with GCC; see the file COPYING3. If not see
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;; .
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(define_predicate "const_uimm5"
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(match_code "const_int")
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{
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return IMM_IN_RANGE (INTVAL (op), 5, 0);
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})
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(define_predicate "const_simm12"
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(match_code "const_int")
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{
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return IMM_IN_RANGE (INTVAL (op), 12, 1);
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})
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(define_predicate "const_simm15"
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(match_code "const_int")
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{
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return IMM_IN_RANGE (INTVAL (op), 15, 1);
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})
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(define_predicate "arith_operand"
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(ior (match_code "const_int")
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(match_operand 0 "register_operand")))
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(define_predicate "score_register_operand"
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(match_code "reg,subreg")
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{
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if (GET_CODE (op) == SUBREG)
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op = SUBREG_REG (op);
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return (GET_CODE (op) == REG)
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&& (REGNO (op) != CC_REGNUM);
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})
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(define_predicate "const_call_insn_operand"
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(match_code "const,symbol_ref,label_ref")
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{
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enum score_symbol_type symbol_type;
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return (score_symbolic_constant_p (op, &symbol_type)
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&& (symbol_type == SYMBOL_GENERAL));
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})
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(define_predicate "call_insn_operand"
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(ior (match_operand 0 "const_call_insn_operand")
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(match_operand 0 "register_operand")))
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(define_predicate "hireg_operand"
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(and (match_code "reg")
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(match_test "REGNO (op) == HI_REGNUM")))
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(define_predicate "loreg_operand"
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(and (match_code "reg")
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(match_test "REGNO (op) == LO_REGNUM")))
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(define_predicate "sr0_operand"
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(and (match_code "reg")
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(match_test "REGNO (op) == CN_REGNUM")))
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(define_predicate "g32reg_operand"
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(and (match_code "reg")
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(match_test "GP_REG_P (REGNO (op))")))
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(define_predicate "branch_n_operator"
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(match_code "lt,ge"))
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(define_predicate "branch_nz_operator"
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(match_code "eq,ne,lt,ge"))
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(define_predicate "score_load_multiple_operation"
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(match_code "parallel")
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{
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int count = XVECLEN (op, 0);
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int dest_regno;
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rtx src_addr;
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int i;
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/* Perform a quick check so we don't blow up below. */
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if (count <= 1
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|| GET_CODE (XVECEXP (op, 0, 0)) != SET
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|| GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
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|| GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
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return 0;
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dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
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src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
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for (i = 1; i < count; i++)
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{
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rtx elt = XVECEXP (op, 0, i);
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if (GET_CODE (elt) != SET
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|| GET_CODE (SET_DEST (elt)) != REG
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|| GET_MODE (SET_DEST (elt)) != SImode
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|| REGNO (SET_DEST (elt)) != (unsigned) (dest_regno + i)
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|| GET_CODE (SET_SRC (elt)) != MEM
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|| GET_MODE (SET_SRC (elt)) != SImode
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|| GET_CODE (XEXP (SET_SRC (elt), 0)) != POST_INC)
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return 0;
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}
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return 1;
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})
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(define_predicate "score_store_multiple_operation"
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(match_code "parallel")
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{
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int count = XVECLEN (op, 0);
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int src_regno;
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rtx dest_addr;
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int i;
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/* Perform a quick check so we don't blow up below. */
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if (count <= 1
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|| GET_CODE (XVECEXP (op, 0, 0)) != SET
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|| GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
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|| GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
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return 0;
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src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
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dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
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for (i = 1; i < count; i++)
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{
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rtx elt = XVECEXP (op, 0, i);
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if (GET_CODE (elt) != SET
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|| GET_CODE (SET_SRC (elt)) != REG
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|| GET_MODE (SET_SRC (elt)) != SImode
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|| REGNO (SET_SRC (elt)) != (unsigned) (src_regno + i)
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|| GET_CODE (SET_DEST (elt)) != MEM
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|| GET_MODE (SET_DEST (elt)) != SImode
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|| GET_CODE (XEXP (SET_DEST (elt), 0)) != PRE_DEC)
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return 0;
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}
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return 1;
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})
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