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[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [config/] [spu/] [predicates.md] - Blame information for rev 333

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1 282 jeremybenn
;; Predicate definitions for CELL SPU
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;; Copyright (C) 2006, 2007 Free Software Foundation, Inc.
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;;
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;; This file is free software; you can redistribute it and/or modify it under
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;; the terms of the GNU General Public License as published by the Free
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;; Software Foundation; either version 3 of the License, or (at your option)
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;; any later version.
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;; This file is distributed in the hope that it will be useful, but WITHOUT
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;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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;; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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;; for more details.
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;; You should have received a copy of the GNU General Public License
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;; along with GCC; see the file COPYING3.  If not see
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;; .
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;; Return 1 if operand is constant zero of its mode
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(define_predicate "const_zero_operand"
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  (and (match_code "const_int,const,const_double,const_vector")
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       (match_test "op == CONST0_RTX (mode)")))
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(define_predicate "const_one_operand"
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  (and (match_code "const_int,const,const_double,const_vector")
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       (match_test "op == CONST1_RTX (mode)")))
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(define_predicate "spu_reg_operand"
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  (and (match_operand 0 "register_operand")
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       (ior (not (match_code "subreg"))
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            (match_test "valid_subreg (op)"))))
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(define_predicate "spu_nonimm_operand"
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  (and (match_operand 0 "nonimmediate_operand")
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       (ior (not (match_code "subreg"))
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            (match_test "valid_subreg (op)"))))
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(define_predicate "spu_nonmem_operand"
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  (and (match_operand 0 "nonmemory_operand")
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       (ior (not (match_code "subreg"))
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            (match_test "valid_subreg (op)"))))
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(define_predicate "spu_mov_operand"
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  (ior (match_operand 0 "memory_operand")
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       (match_operand 0 "spu_nonmem_operand")))
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(define_predicate "spu_dest_operand"
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  (ior (match_operand 0 "memory_operand")
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       (match_operand 0 "spu_reg_operand")))
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(define_predicate "call_operand"
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  (and (match_code "mem")
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       (match_test "(!TARGET_LARGE_MEM && satisfies_constraint_S (op))
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                    || (satisfies_constraint_R (op)
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                        && REGNO (XEXP (op, 0)) != FRAME_POINTER_REGNUM
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                        && REGNO (XEXP (op, 0)) != ARG_POINTER_REGNUM
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                        && (REGNO (XEXP (op, 0)) < FIRST_PSEUDO_REGISTER
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                            || REGNO (XEXP (op, 0)) > LAST_VIRTUAL_REGISTER))")))
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(define_predicate "vec_imm_operand"
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  (and (match_code "const_int,const_double,const_vector")
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       (match_test "spu_legitimate_constant_p (op)")))
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(define_predicate "spu_arith_operand"
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  (match_code "reg,subreg,const_int,const_vector")
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  {
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    if (spu_reg_operand (op, mode))
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      return 1;
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    if (GET_CODE (op) == CONST_INT || GET_CODE (op) == CONST_VECTOR)
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      return arith_immediate_p (op, mode, -0x200, 0x1ff);
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    return 0;
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  })
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(define_predicate "spu_logical_operand"
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  (match_code "reg,subreg,const_int,const_double,const_vector")
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  {
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    if (spu_reg_operand (op, mode))
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      return 1;
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    if (GET_CODE (op) == CONST_INT || GET_CODE (op) == CONST_DOUBLE
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        || GET_CODE (op) == CONST_VECTOR)
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      return logical_immediate_p (op, mode);
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    return 0;
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  })
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(define_predicate "spu_ior_operand"
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  (match_code "reg,subreg,const_int,const_double,const_vector")
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  {
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    if (spu_reg_operand (op, mode))
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      return 1;
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    if (GET_CODE (op) == CONST_INT || GET_CODE (op) == CONST_DOUBLE
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        || GET_CODE (op) == CONST_VECTOR)
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      return logical_immediate_p (op, mode)
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             || iohl_immediate_p (op, mode);
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    return 0;
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  })
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(define_predicate "imm_K_operand"
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  (and (match_code "const_int")
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       (match_test "arith_immediate_p (op, mode, -0x200, 0x1ff)")))
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;; Return 1 if OP is a comparison operation that is valid for a branch insn.
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;; We only check the opcode against the mode of the register value here.
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(define_predicate "branch_comparison_operator"
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  (and (match_code "eq,ne")
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       (ior (match_test "GET_MODE (XEXP (op, 0)) == HImode")
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            (match_test "GET_MODE (XEXP (op, 0)) == SImode"))))
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(define_predicate "spu_inv_exp2_operand"
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  (and (match_code "const_double,const_vector")
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       (and (match_operand 0 "immediate_operand")
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            (match_test "exp2_immediate_p (op, mode, -126, 0)"))))
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(define_predicate "spu_exp2_operand"
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  (and (match_code "const_double,const_vector")
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       (and (match_operand 0 "immediate_operand")
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            (match_test "exp2_immediate_p (op, mode, 0, 127)"))))
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(define_predicate "shiftrt_operator"
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  (match_code "lshiftrt,ashiftrt"))
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(define_predicate "extend_operator"
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  (match_code "sign_extend,zero_extend"))
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