OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.c-torture/] [execute/] [simd-2.c] - Blame information for rev 297

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 297 jeremybenn
/*
2
   Purpose: Test generic SIMD support, V8HImode.  This test should work
3
   regardless of if the target has SIMD instructions.
4
*/
5
 
6
typedef short __attribute__((vector_size (16))) vecint;
7
 
8
vecint i = { 150, 100, 150, 200, 0, 0, 0, 0 };
9
vecint j = { 10, 13, 20, 30, 1, 1, 1, 1 };
10
vecint k;
11
 
12
union {
13
  vecint v;
14
  short i[8];
15
} res;
16
 
17
/* This should go away once we can use == and != on vector types.  */
18
void
19
verify (int a1, int a2, int a3, int a4,
20
        int b1, int b2, int b3, int b4)
21
{
22
  if (a1 != b1
23
      || a2 != b2
24
      || a3 != b3
25
      || a4 != b4)
26
    abort ();
27
}
28
 
29
int
30
main ()
31
{
32
  k = i + j;
33
  res.v = k;
34
 
35
  verify (res.i[0], res.i[1], res.i[2], res.i[3], 160, 113, 170, 230);
36
 
37
  k = i * j;
38
  res.v = k;
39
 
40
  verify (res.i[0], res.i[1], res.i[2], res.i[3], 1500, 1300, 3000, 6000);
41
 
42
  k = i / j;
43
  res.v = k;
44
 
45
  verify (res.i[0], res.i[1], res.i[2], res.i[3], 15, 7, 7, 6);
46
 
47
  k = i & j;
48
  res.v = k;
49
 
50
  verify (res.i[0], res.i[1], res.i[2], res.i[3], 2, 4, 20, 8);
51
 
52
  k = i | j;
53
  res.v = k;
54
 
55
  verify (res.i[0], res.i[1], res.i[2], res.i[3], 158, 109, 150, 222);
56
 
57
  k = i ^ j;
58
  res.v = k;
59
 
60
  verify (res.i[0], res.i[1], res.i[2], res.i[3], 156, 105, 130, 214);
61
 
62
  k = -i;
63
  res.v = k;
64
  verify (res.i[0], res.i[1], res.i[2], res.i[3],
65
          -150, -100, -150, -200);
66
 
67
  k = ~i;
68
  res.v = k;
69
  verify (res.i[0], res.i[1], res.i[2], res.i[3], -151, -101, -151, -201);
70
 
71
  exit (0);
72
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.