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Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.dg/] [sync-3.c] - Blame information for rev 404

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Line No. Rev Author Line
1 298 jeremybenn 
/* { dg-do run } */
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/* { dg-require-effective-target sync_char_short } */
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/* { dg-options "-ansi" } */
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/* { dg-options "-march=i486" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
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/* { dg-options "-mcpu=v9" { target sparc*-*-* } } */
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/* Test functionality of the intrinsics for 'short' and 'char'.  */
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extern void abort (void);
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extern void *memcpy (void *, const void *, __SIZE_TYPE__);
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static char AI[18] __attribute__((__aligned__ (4)));
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static char init_qi[18] = { 3,5,7,9,0,0,0 ,0  ,-1,0,0,-1,0,0  ,-1,0,0,-1 };
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static char test_qi[18] = { 3,5,7,9,1,4,22,-12,7 ,8,9,~7,1,-12,7 ,8,9,~7 };
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static void
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do_qi (void)
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{
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  if (__sync_fetch_and_add(AI+4, 1) != 0)
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    abort ();
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  if (__sync_fetch_and_add(AI+5, 4) != 0)
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    abort ();
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  if (__sync_fetch_and_add(AI+6, 22) != 0)
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    abort ();
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  if (__sync_fetch_and_sub(AI+7, 12) != 0)
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    abort ();
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  if (__sync_fetch_and_and(AI+8, 7) != (char)-1)
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    abort ();
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  if (__sync_fetch_and_or(AI+9, 8) != 0)
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    abort ();
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  if (__sync_fetch_and_xor(AI+10, 9) != 0)
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    abort ();
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  if (__sync_fetch_and_nand(AI+11, 7) != (char)-1) /* { dg-message "note: '__sync_fetch_and_nand' changed semantics in GCC 4.4" "" } */
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    abort ();
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  if (__sync_add_and_fetch(AI+12, 1) != 1)
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    abort ();
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  if (__sync_sub_and_fetch(AI+13, 12) != (char)-12)
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    abort ();
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  if (__sync_and_and_fetch(AI+14, 7) != 7)
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    abort ();
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  if (__sync_or_and_fetch(AI+15, 8) != 8)
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    abort ();
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  if (__sync_xor_and_fetch(AI+16, 9) != 9)
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    abort ();
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  if (__sync_nand_and_fetch(AI+17, 7) != (char)~7) /* { dg-message "note: '__sync_nand_and_fetch' changed semantics in GCC 4.4" "" } */
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    abort ();
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}
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static short AL[18];
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static short init_hi[18] = { 3,5,7,9,0,0,0 ,0  ,-1,0,0,-1,0,0  ,-1,0,0,-1 };
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static short test_hi[18] = { 3,5,7,9,1,4,22,-12,7 ,8,9,~7,1,-12,7 ,8,9,~7 };
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static void
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do_hi (void)
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{
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  if (__sync_fetch_and_add(AL+4, 1) != 0)
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    abort ();
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  if (__sync_fetch_and_add(AL+5, 4) != 0)
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    abort ();
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  if (__sync_fetch_and_add(AL+6, 22) != 0)
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    abort ();
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  if (__sync_fetch_and_sub(AL+7, 12) != 0)
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    abort ();
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  if (__sync_fetch_and_and(AL+8, 7) != -1)
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    abort ();
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  if (__sync_fetch_and_or(AL+9, 8) != 0)
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    abort ();
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  if (__sync_fetch_and_xor(AL+10, 9) != 0)
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    abort ();
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  if (__sync_fetch_and_nand(AL+11, 7) != -1)
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    abort ();
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  if (__sync_add_and_fetch(AL+12, 1) != 1)
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    abort ();
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  if (__sync_sub_and_fetch(AL+13, 12) != -12)
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    abort ();
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  if (__sync_and_and_fetch(AL+14, 7) != 7)
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    abort ();
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  if (__sync_or_and_fetch(AL+15, 8) != 8)
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    abort ();
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  if (__sync_xor_and_fetch(AL+16, 9) != 9)
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    abort ();
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  if (__sync_nand_and_fetch(AL+17, 7) != ~7)
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    abort ();
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}
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int main()
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{
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  memcpy(AI, init_qi, sizeof(init_qi));
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  memcpy(AL, init_hi, sizeof(init_hi));
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  do_qi ();
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  do_hi ();
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  if (memcmp (AI, test_qi, sizeof(test_qi)))
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    abort ();
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  if (memcmp (AL, test_hi, sizeof(test_hi)))
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    abort ();
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  return 0;
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}

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