URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.dg/] [torture/] [pr20314-1.c] - Blame information for rev 298

Line No.	Rev	Author	Line
1	298	jeremybenn	`/* PR inline-asm/20314 */`
2			`/* { dg-do compile { target i?86-- x86_64-- powerpc--* ia64-- } } */`
3
4			`int`
5			`f1 (void)`
6			`{`
7			`int x = 4, y;`
8			`__asm__ volatile ("" : "+r,r" (x), "=r,r" (y)`
9			`: "%r,r" (x), "m,r" (8), "r,r" (2));`
10			`return x;`
11			`}`
12
13			`int`
14			`f2 (void)`
15			`{`
16			`int x = 4, y;`
17			`__asm__ volatile ("" : "=r,r" (x), "=r,r" (y)`
18			`: "%0,0" (x), "m,r" (8), "r,r" (2));`
19			`return x;`
20			`}`
21
22			`int`
23			`f3 (void)`
24			`{`
25			`int x = 4, y;`
26			`__asm__ volatile ("" : "+r,r" (x), "=r,r" (y)`
27			`: "%m,r" (8), "r,r" (2));`
28			`return x;`
29			`}`
30
31			`int`
32			`f4 (void)`
33			`{`
34			`int x = 4, y;`
35			`__asm__ volatile ("" : "+r" (x), "=r" (y)`
36			`: "r" (x), "r" (8), "r" (2));`
37			`return x;`
38			`}`
39
40			`int`
41			`f5 (void)`
42			`{`
43			`int x = 4, y;`
44			`__asm__ volatile ("" : "=r" (x), "=r" (y)`
45			`: "0" (x), "r" (8), "r" (2));`
46			`return x;`
47			`}`
48
49			`int`
50			`f6 (void)`
51			`{`
52			`int x = 4, y;`
53			`__asm__ volatile ("" : "+r" (x), "=r" (y)`
54			`: "r" (8), "r" (2));`
55			`return x;`
56			`}`