OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.dg/] [tree-ssa/] [pr36881.c] - Blame information for rev 298

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 298 jeremybenn
/* PR tree-optimization/36881 */
2
/* { dg-do compile { target fpic } } */
3
/* { dg-options "-O2 -fpic -fdump-tree-switchconv-all" } */
4
 
5
const char *foo (int i)
6
{
7
  const char *p;
8
  switch (i)
9
    {
10
    case 0:
11
    case 6: p = ""; break;
12
    case 1:
13
    case 7: p = "abc"; break;
14
    case 2:
15
    case 8: p = "def"; break;
16
    default: p = "ghi"; break;
17
    }
18
  return p;
19
}
20
 
21
/* { dg-final { scan-assembler-not "CSWTCH" } } */
22
/* { dg-final { scan-tree-dump "need runtime relocations" "switchconv" } } */
23
/* { dg-final { cleanup-tree-dump "switchconv" } } */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.