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[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [arm/] [neon/] [vuzpf32.c] - Blame information for rev 378

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/* Test the `vuzpf32' ARM Neon intrinsic.  */
/* This file was autogenerated by neon-testgen.  */
 
/* { dg-do assemble } */
/* { dg-require-effective-target arm_neon_ok } */
/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
 
#include "arm_neon.h"
 
void test_vuzpf32 (void)
{
  float32x2x2_t out_float32x2x2_t;
  float32x2_t arg0_float32x2_t;
  float32x2_t arg1_float32x2_t;
 
  out_float32x2x2_t = vuzp_f32 (arg0_float32x2_t, arg1_float32x2_t);
}
 
/* { dg-final { scan-assembler "vuzp\.32\[      \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[         \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */

Line No.	Rev	Author	Line
1	313	jeremybenn	/* Test the `vuzpf32' ARM Neon intrinsic. */
2			`/* This file was autogenerated by neon-testgen. */`
3
4			`/* { dg-do assemble } */`
5			`/* { dg-require-effective-target arm_neon_ok } */`
6			`/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */`
7
8			`#include "arm_neon.h"`
9
10			`void test_vuzpf32 (void)`
11			`{`
12			`float32x2x2_t out_float32x2x2_t;`
13			`float32x2_t arg0_float32x2_t;`
14			`float32x2_t arg1_float32x2_t;`
15
16			`out_float32x2x2_t = vuzp_f32 (arg0_float32x2_t, arg1_float32x2_t);`
17			`}`
18
19			`/* { dg-final { scan-assembler "vuzp\.32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */`
20			`/* { dg-final { cleanup-saved-temps } } */`

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Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [arm/] [neon/] [vuzpf32.c] - Blame information for rev 378