OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [i386/] [amd64-abi-5.c] - Blame information for rev 318

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 318 jeremybenn
/* { dg-do run } */
2
/* { dg-require-effective-target lp64 } */
3
/* { dg-options "-O2" } */
4
 
5
#include <stdarg.h>
6
#include <assert.h>
7
 
8
int n1 = 30;
9
double n2 = 324;
10
double n3 = 39494.94;
11
double n4 = 407;
12
double n5 = 32.304;
13
double n6 = 394.14;
14
double n7 = 4.07;
15
double n8 = 32.4;
16
double n9 = 314.194;
17
double n10 = 0.1407;
18
 
19
int e1;
20
double e2;
21
double e3;
22
double e4;
23
double e5;
24
double e6;
25
double e7;
26
double e8;
27
double e9;
28
double e10;
29
 
30
static void
31
__attribute__((noinline))
32
test (int a1, ...)
33
{
34
  e1 = a1;
35
  va_list va_arglist;
36
  va_start (va_arglist, a1);
37
  e2 = va_arg (va_arglist, double);
38
  e3 = va_arg (va_arglist, double);
39
  e4 = va_arg (va_arglist, double);
40
  e5 = va_arg (va_arglist, double);
41
  e6 = va_arg (va_arglist, double);
42
  e7 = va_arg (va_arglist, double);
43
  e8 = va_arg (va_arglist, double);
44
  e9 = va_arg (va_arglist, double);
45
  e10 = va_arg (va_arglist, double);
46
  va_end (va_arglist);
47
}
48
 
49
int
50
main ()
51
{
52
  test (n1, n2, n3, n4, n5, n6, n7, n8, n9, n10);
53
  assert (n1 == e1);
54
  assert (n2 == e2);
55
  assert (n3 == e3);
56
  assert (n4 == e4);
57
  assert (n5 == e5);
58
  assert (n6 == e6);
59
  assert (n7 == e7);
60
  assert (n8 == e8);
61
  assert (n9 == e9);
62
  assert (n10 == e10);
63
  return 0;
64
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.