OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [i386/] [pr14552.c] - Blame information for rev 328

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 318 jeremybenn
/* { dg-do compile } */
2
/* { dg-options "-O2 -mmmx" } */
3
 
4
typedef short mmxw  __attribute__ ((vector_size (8)));
5
typedef int   mmxdw __attribute__ ((vector_size (8)));
6
 
7
mmxdw dw;
8
mmxw w;
9
 
10
void test()
11
{
12
  w+=w;
13
  dw= (mmxdw)w;
14
}
15
 
16
/* { dg-final { scan-assembler-not "%mm" } } */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.