OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [i386/] [pr32708-1.c] - Blame information for rev 318

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 318 jeremybenn
/* { dg-do compile } */
2
/* { dg-options "-O2 -msse2" } */
3
/* { dg-require-effective-target sse2 } */
4
 
5
typedef long long __v2di __attribute__ ((__vector_size__ (16)));
6
typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7
 
8
static __inline __m128i __attribute__((__always_inline__))
9
_mm_set_epi64x (long long __q1, long long __q0)
10
{
11
  return __extension__ (__m128i)(__v2di){ __q0, __q1 };
12
}
13
 
14
__m128i long2vector(long long __i)
15
{
16
  return _mm_set_epi64x (0, __i);
17
}
18
 
19
/* { dg-final { scan-assembler-not "movq2dq" } } */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.