OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [i386/] [pr35767-4.c] - Blame information for rev 318

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 318 jeremybenn
/* Test that we generate aligned load when memory is aligned.  */
2
/* { dg-do compile } */
3
/* { dg-require-effective-target dfp } */
4
/* { dg-options "-O -march=x86-64 -mtune=generic -std=gnu99" } */
5
/* { dg-final { scan-assembler-not "movdqu" } } */
6
/* { dg-final { scan-assembler "movdqa" } } */
7
 
8
extern _Decimal128 foo (_Decimal128, _Decimal128, _Decimal128);
9
 
10
void
11
bar (void)
12
{
13
  foo (0, 0, 0);
14
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.