OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [i386/] [pr37434-1.c] - Blame information for rev 318

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 318 jeremybenn
/* { dg-do compile } */
2
/* { dg-options "-O2 -msse2" } */
3
/* { dg-require-effective-target sse2 } */
4
 
5
typedef short __v8hi __attribute__ ((__vector_size__ (16)));
6
typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7
__m128i Set_AC4R_SETUP_I( const short *val ) {
8
  short D2073 = *val;
9
  short D2076 = *(val + 2);
10
  short D2079 = *(val + 4);
11
  __v8hi D2094 = {D2073, D2076, D2079, 0, D2073, D2076, D2079, 0};
12
  return (__m128i)D2094;
13
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.