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[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [i386/] [pr39139.c] - Blame information for rev 318

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Line No. Rev Author Line
1 318 jeremybenn
/* PR target/39139 */
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/* { dg-do compile } */
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/* { dg-options "-Os" } */
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#ifdef __x86_64__
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# define AX_REG asm ("rax")
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# define DI_REG asm ("rdi")
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# define SI_REG asm ("rsi")
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#else
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# define AX_REG asm ("eax")
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# define DI_REG asm ("edi")
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# define SI_REG asm ("esi")
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#endif
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__extension__ typedef __SIZE_TYPE__ size_t;
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static inline int
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foo (unsigned int x, void *y)
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{
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  register size_t r AX_REG;
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  register size_t a1 DI_REG;
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  register size_t a2 SI_REG;
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  a1 = (size_t) x;
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  a2 = (size_t) y;
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  asm volatile ("" : "=r" (r), "+r" (a1), "+r" (a2) : : "memory");
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  return (int) r;
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}
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struct T { size_t t1, t2; unsigned int t3, t4, t5; };
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int
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bar (size_t x, unsigned int y, size_t u, unsigned int v)
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{
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  long r;
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  struct T e = { .t1 = x, .t2 = u };
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  if (x << y != u << v)
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    return 5;
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  r = foo (11, &e);
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  return e.t3 == x;
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}

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