OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [i386/] [sse2-shufpd-1.c] - Blame information for rev 318

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 318 jeremybenn
/* { dg-do run } */
2
/* { dg-options "-O2 -msse2" } */
3
/* { dg-require-effective-target sse2 } */
4
 
5
#ifndef CHECK_H
6
#define CHECK_H "sse2-check.h"
7
#endif
8
 
9
#ifndef TEST
10
#define TEST sse2_test
11
#endif
12
 
13
#define N 0xab
14
 
15
#include CHECK_H
16
 
17
#include <emmintrin.h>
18
 
19
static __m128d
20
__attribute__((noinline, unused))
21
test (__m128d s1, __m128d s2)
22
{
23
  return _mm_shuffle_pd (s1, s2, N);
24
}
25
 
26
static void
27
TEST (void)
28
{
29
  union128d u, s1, s2;
30
  double e[2] = {0.0};
31
 
32
  s1.x = _mm_set_pd (2134.3343,1234.635654);
33
  s2.x = _mm_set_pd (453.345635,54646.464356);
34
  u.x = test (s1.x, s2.x);
35
 
36
  e[0] = (N & (1 << 0)) ? s1.a[1] : s1.a[0];
37
  e[1] = (N & (1 << 1)) ? s2.a[1] : s2.a[0];
38
 
39
  if (check_union128d(u, e))
40
    abort ();
41
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.