OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [i386/] [sse4_1-roundpd-3.c] - Blame information for rev 318

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 318 jeremybenn
/* { dg-do run } */
2
/* { dg-require-effective-target sse4 } */
3
/* { dg-options "-O2 -msse4.1" } */
4
/* { dg-skip-if "no M_PI" { vxworks_kernel } } */
5
 
6
#ifndef CHECK_H
7
#define CHECK_H "sse4_1-check.h"
8
#endif
9
 
10
#ifndef TEST
11
#define TEST sse4_1_test
12
#endif
13
 
14
#include CHECK_H
15
 
16
#include <smmintrin.h>
17
 
18
static void
19
TEST (void)
20
{
21
  union128d u, s;
22
  double e[2] = {0.0};
23
  int i;
24
 
25
  s.x = _mm_set_pd (1.1234, -2.3478);
26
  u.x = _mm_ceil_pd (s.x);
27
 
28
  for (i = 0; i < 2; i++)
29
    {
30
      __m128d tmp = _mm_load_sd (&s.a[i]);
31
      tmp = _mm_ceil_sd (tmp, tmp);
32
      _mm_store_sd (&e[i], tmp);
33
    }
34
 
35
  if (check_union128d (u, e))
36
    abort ();
37
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.