OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [mips/] [call-saved-2.c] - Blame information for rev 328

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 321 jeremybenn 
/* Check that we save non-MIPS16 GPRs if they are explicitly clobbered.  */
2 
/* { dg-options "(-mips16) isa_rev=0 -O2" } */
3 
 
4 
MIPS16 void
5 
foo (void)
6 
{
7 
  asm volatile ("" ::: "$19", "$23", "$24", "$30");
8 
}
9 
/* { dg-final { scan-assembler-not "\\\$16" } } */
10 
/* { dg-final { scan-assembler-not "\\\$17" } } */
11 
/* { dg-final { scan-assembler-not "\\\$18" } } */
12 
/* { dg-final { scan-assembler "\\\$19" } } */
13 
/* { dg-final { scan-assembler-not "\\\$20" } } */
14 
/* { dg-final { scan-assembler-not "\\\$21" } } */
15 
/* { dg-final { scan-assembler-not "\\\$22" } } */
16 
/* { dg-final { scan-assembler "\\\$23" } } */
17 
/* { dg-final { scan-assembler-not "\\\$24" } } */
18 
/* { dg-final { scan-assembler "\\\$(30|fp)" } } */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.