OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [mips/] [ext-2.c] - Blame information for rev 378

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 321 jeremybenn
/* Turn the truncate,zero_extend,lshiftrt sequence before the or into a
2
   zero_extract.  The truncate is due to TARGET_PROMOTE_PROTOTYPES, the
3
   zero_extend to PROMOTE_MODE.  */
4
/* { dg-do compile } */
5
/* { dg-options "-O isa_rev>=2 -mgp64" } */
6
/* { dg-final { scan-assembler "\tdext\t" } } */
7
/* { dg-final { scan-assembler-not "and" } } */
8
/* { dg-final { scan-assembler-not "srl" } } */
9
 
10
void
11
f (unsigned char x, unsigned char *r)
12
{
13
  *r = 0x50 | (x >> 4);
14
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.