OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [mips/] [fix-r4000-7.c] - Blame information for rev 321

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 321 jeremybenn
/* { dg-options "-march=r4000 -mfix-r4000 -O2 -mgp64 -dp -EB" } */
2
typedef long long int64_t;
3
typedef int int128_t __attribute__((mode(TI)));
4
int64_t foo (int64_t x, int64_t y) { return ((int128_t) x * y) >> 64; }
5
/* ??? A highpart pattern would be a better choice, but we currently
6
   don't use them.  */
7
/* { dg-final { scan-assembler "[concat {\tdmult\t\$[45],\$[45][^\n]+mulditi3[^\n]+\n\tmflo\t\$3\n\tmfhi\t\$2\n}]" } } */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.