OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [mips/] [ins-2.c] - Blame information for rev 324

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 321 jeremybenn
/* { dg-do compile } */
2
/* { dg-options "-O -meb isa_rev>=2 -mgp64" } */
3
/* { dg-final { scan-assembler-times "\tins\t|\tdins\t" 1 } } */
4
/* { dg-final { scan-assembler-times "\tsll\t|\tins\t" 1 } } */
5
 
6
/* When inserting something into the top bit of a 32-bit structure,
7
   we must make sure that the register remains properly sign-extended.
8
   There are two ways of doing this:
9
 
10
     - use purely 32-bit bit manipulations (a single INS, matched twice here).
11
     - use a 64-bit bit manipulation (DINS), and sign-extend the result.  We
12
     check for this extension using SLL.  */
13
 
14
struct s
15
{
16
  int a:3;
17
  int b:29;
18
};
19
 
20
NOMIPS16 void
21
f (int a)
22
{
23
  struct s s;
24
  asm volatile ("" : "=r"(s));
25
  s.a = a;
26
  asm volatile ("" :: "r"(s));
27
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.