OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [mips/] [madd-8.c] - Blame information for rev 321

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 321 jeremybenn
/* { dg-options "-O2 -march=5kc" } */
2
/* { dg-final { scan-assembler "\tmul\t" } } */
3
/* { dg-final { scan-assembler-not "\tmadd\t" } } */
4
/* { dg-final { scan-assembler-not "\tmtlo\t" } } */
5
/* { dg-final { scan-assembler-not "\tmflo\t" } } */
6
 
7
NOMIPS16 int
8
f2 (int x, int y, int z)
9
{
10
  asm volatile ("" ::: "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9",
11
                "$10", "$11", "$12", "$13", "$14", "$15", "$16", "$17",
12
                "$18", "$19", "$20", "$21", "$22", "$23", "$24", "$25",
13
                "$31");
14
  return x * y + z;
15
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.