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[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [mips/] [mips32-dsp-run.c] - Blame information for rev 328

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Line No. Rev Author Line
1 321 jeremybenn
/* Test MIPS32 DSP instructions */
2
/* { dg-do run } */
3
/* { dg-options "-mdsp -O2" } */
4
 
5
#include <stdlib.h>
6
#include <stdio.h>
7
 
8
typedef signed char v4i8 __attribute__ ((vector_size(4)));
9
typedef short v2q15 __attribute__ ((vector_size(4)));
10
 
11
typedef int q31;
12
typedef int i32;
13
typedef long long a64;
14
 
15
NOMIPS16 void test_MIPS_DSP (void);
16
 
17
char array[100];
18
int little_endian;
19
 
20
int main ()
21
{
22
  int i;
23
 
24
  union { long long ll; int i[2]; } endianness_test;
25
  endianness_test.ll = 1;
26
  little_endian = endianness_test.i[0];
27
 
28
  for (i = 0; i < 100; i++)
29
    array[i] = i;
30
 
31
  test_MIPS_DSP ();
32
 
33
  exit (0);
34
}
35
 
36
NOMIPS16 v2q15 add_v2q15 (v2q15 a, v2q15 b)
37
{
38
  return __builtin_mips_addq_ph (a, b);
39
}
40
 
41
NOMIPS16 v4i8 add_v4i8 (v4i8 a, v4i8 b)
42
{
43
  return __builtin_mips_addu_qb (a, b);
44
}
45
 
46
NOMIPS16 v2q15 sub_v2q15 (v2q15 a, v2q15 b)
47
{
48
  return __builtin_mips_subq_ph (a, b);
49
}
50
 
51
NOMIPS16 v4i8 sub_v4i8 (v4i8 a, v4i8 b)
52
{
53
  return __builtin_mips_subu_qb (a, b);
54
}
55
 
56
NOMIPS16 void test_MIPS_DSP ()
57
{
58
  v4i8 v4i8_a,v4i8_b,v4i8_c,v4i8_r,v4i8_s;
59
  v2q15 v2q15_a,v2q15_b,v2q15_c,v2q15_r,v2q15_s;
60
  q31 q31_a,q31_b,q31_c,q31_r,q31_s;
61
  i32 i32_a,i32_b,i32_c,i32_r,i32_s;
62
  a64 a64_a,a64_b,a64_c,a64_r,a64_s;
63
 
64
  void *ptr_a;
65
  int r,s;
66
  long long lr,ls;
67
 
68
  v2q15_a = (v2q15) {0x1234, 0x5678};
69
  v2q15_b = (v2q15) {0x6f89, 0x1111};
70
  v2q15_s = (v2q15) {0x81bd, 0x6789};
71
  v2q15_r = add_v2q15 (v2q15_a, v2q15_b);
72
  r = (int) v2q15_r;
73
  s = (int) v2q15_s;
74
  if (r != s)
75
    abort ();
76
 
77
  v2q15_a = (v2q15) {0x1234, 0x5678};
78
  v2q15_b = (v2q15) {0x6f89, 0x1111};
79
  v2q15_s = (v2q15) {0x7fff, 0x6789};
80
  v2q15_r = __builtin_mips_addq_s_ph (v2q15_a, v2q15_b);
81
  r = (int) v2q15_r;
82
  s = (int) v2q15_s;
83
  if (r != s)
84
    abort ();
85
 
86
  q31_a = 0x70000000;
87
  q31_b = 0x71234567;
88
  q31_s = 0x7fffffff;
89
  q31_r = __builtin_mips_addq_s_w (q31_a, q31_b);
90
  if (q31_r != q31_s)
91
    abort ();
92
 
93
  v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
94
  v4i8_b = (v4i8) {0xff, 0x89, 0x11, 0x11};
95
  v4i8_s = (v4i8) {0xf1, 0xbd, 0x67, 0x89};
96
  v4i8_r = add_v4i8 (v4i8_a, v4i8_b);
97
  r = (int) v4i8_r;
98
  s = (int) v4i8_s;
99
  if (r != s)
100
    abort ();
101
 
102
  v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
103
  v4i8_b = (v4i8) {0xff, 0x89, 0x11, 0x11};
104
  v4i8_s = (v4i8) {0xff, 0xbd, 0x67, 0x89};
105
  v4i8_r = __builtin_mips_addu_s_qb (v4i8_a, v4i8_b);
106
  r = (int) v4i8_r;
107
  s = (int) v4i8_s;
108
  if (r != s)
109
    abort ();
110
 
111
  v2q15_a = (v2q15) {0x1234, 0x5678};
112
  v2q15_b = (v2q15) {0x6f89, 0x1111};
113
  v2q15_s = (v2q15) {0xa2ab, 0x4567};
114
  v2q15_r = sub_v2q15 (v2q15_a, v2q15_b);
115
  r = (int) v2q15_r;
116
  s = (int) v2q15_s;
117
  if (r != s)
118
    abort ();
119
 
120
  v2q15_a = (v2q15) {0x8000, 0x5678};
121
  v2q15_b = (v2q15) {0x6f89, 0x1111};
122
  v2q15_s = (v2q15) {0x8000, 0x4567};
123
  v2q15_r = __builtin_mips_subq_s_ph (v2q15_a, v2q15_b);
124
  r = (int) v2q15_r;
125
  s = (int) v2q15_s;
126
  if (r != s)
127
    abort ();
128
 
129
  q31_a = 0x70000000;
130
  q31_b = 0x71234567;
131
  q31_s = 0xfedcba99;
132
  q31_r = __builtin_mips_subq_s_w (q31_a, q31_b);
133
  if (q31_r != q31_s)
134
    abort ();
135
 
136
  v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
137
  v4i8_b = (v4i8) {0xff, 0x89, 0x11, 0x11};
138
  v4i8_s = (v4i8) {0xf3, 0xab, 0x45, 0x67};
139
  v4i8_r = sub_v4i8 (v4i8_a, v4i8_b);
140
  r = (int) v4i8_r;
141
  s = (int) v4i8_s;
142
  if (r != s)
143
    abort ();
144
 
145
  v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
146
  v4i8_b = (v4i8) {0xff, 0x89, 0x11, 0x11};
147
  v4i8_s = (v4i8) {0x0, 0x0, 0x45, 0x67};
148
  v4i8_r = __builtin_mips_subu_s_qb (v4i8_a, v4i8_b);
149
  r = (int) v4i8_r;
150
  s = (int) v4i8_s;
151
  if (r != s)
152
    abort ();
153
 
154
  i32_a = 0xf5678900;
155
  i32_b = 0x7abcdef0;
156
  i32_s = 0x702467f0;
157
  i32_r = __builtin_mips_addsc (i32_a, i32_b);
158
  if (i32_r != i32_s)
159
    abort ();
160
 
161
  i32_a = 0x75678900;
162
  i32_b = 0x7abcdef0;
163
  i32_s = 0xf02467f1;
164
  i32_r = __builtin_mips_addwc (i32_a, i32_b);
165
  if (i32_r != i32_s)
166
    abort ();
167
 
168
  i32_a = 0;
169
  i32_b = 0x00000901;
170
  i32_s = 9;
171
  i32_r = __builtin_mips_modsub (i32_a, i32_b);
172
  if (i32_r != i32_s)
173
    abort ();
174
 
175
  v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
176
  i32_s = 0x1f4;
177
  i32_r = __builtin_mips_raddu_w_qb (v4i8_a);
178
  if (i32_r != i32_s)
179
    abort ();
180
 
181
  v2q15_a = (v2q15) {0x8000, 0x8134};
182
  v2q15_s = (v2q15) {0x7fff, 0x7ecc};
183
  v2q15_r = __builtin_mips_absq_s_ph (v2q15_a);
184
  r = (int) v2q15_r;
185
  s = (int) v2q15_s;
186
  if (r != s)
187
    abort ();
188
 
189
  q31_a = (q31) 0x80000000;
190
  q31_s = (q31) 0x7fffffff;
191
  q31_r = __builtin_mips_absq_s_w (q31_a);
192
  if (q31_r != q31_s)
193
    abort ();
194
 
195
  v2q15_a = (v2q15) {0x9999, 0x5612};
196
  v2q15_b = (v2q15) {0x5612, 0x3333};
197
  if (little_endian)
198
    v4i8_s = (v4i8) {0x56, 0x33, 0x99, 0x56};
199
  else
200
    v4i8_s = (v4i8) {0x99, 0x56, 0x56, 0x33};
201
  v4i8_r = __builtin_mips_precrq_qb_ph (v2q15_a, v2q15_b);
202
  r = (int) v4i8_r;
203
  s = (int) v4i8_s;
204
  if (r != s)
205
    abort ();
206
 
207
  q31_a = 0x12348678;
208
  q31_b = 0x44445555;
209
  if (little_endian)
210
    v2q15_s = (v2q15) {0x4444, 0x1234};
211
  else
212
    v2q15_s = (v2q15) {0x1234, 0x4444};
213
  v2q15_r = __builtin_mips_precrq_ph_w (q31_a, q31_b);
214
  r = (int) v2q15_r;
215
  s = (int) v2q15_s;
216
  if (r != s)
217
    abort ();
218
 
219
  q31_a = 0x12348678;
220
  q31_b = 0x44445555;
221
  if (little_endian)
222
    v2q15_s = (v2q15) {0x4444, 0x1235};
223
  else
224
    v2q15_s = (v2q15) {0x1235, 0x4444};
225
  v2q15_r = __builtin_mips_precrq_rs_ph_w (q31_a, q31_b);
226
  r = (int) v2q15_r;
227
  s = (int) v2q15_s;
228
  if (r != s)
229
    abort ();
230
 
231
  v2q15_a = (v2q15) {0x9999, 0x5612};
232
  v2q15_b = (v2q15) {0x5612, 0x3333};
233
  if (little_endian)
234
    v4i8_s = (v4i8) {0xac, 0x66, 0x00, 0xac};
235
  else
236
    v4i8_s = (v4i8) {0x00, 0xac, 0xac, 0x66};
237
  v4i8_r = __builtin_mips_precrqu_s_qb_ph (v2q15_a, v2q15_b);
238
  r = (int) v4i8_r;
239
  s = (int) v4i8_s;
240
  if (r != s)
241
    abort ();
242
 
243
  v2q15_a = (v2q15) {0x3589, 0x4444};
244
  if (little_endian)
245
    q31_s = 0x44440000;
246
  else
247
    q31_s = 0x35890000;
248
  q31_r = __builtin_mips_preceq_w_phl (v2q15_a);
249
  if (q31_r != q31_s)
250
    abort ();
251
 
252
  v2q15_a = (v2q15) {0x3589, 0x4444};
253
  if (little_endian)
254
    q31_s = 0x35890000;
255
  else
256
    q31_s = 0x44440000;
257
  q31_r = __builtin_mips_preceq_w_phr (v2q15_a);
258
  if (q31_r != q31_s)
259
    abort ();
260
 
261
  v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
262
  if (little_endian)
263
    v2q15_s = (v2q15) {0x2b00, 0x1980};
264
  else
265
    v2q15_s = (v2q15) {0x0900, 0x2b00};
266
  v2q15_r = __builtin_mips_precequ_ph_qbl (v4i8_a);
267
  r = (int) v2q15_r;
268
  s = (int) v2q15_s;
269
  if (r != s)
270
    abort ();
271
 
272
  v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
273
  if (little_endian)
274
    v2q15_s = (v2q15) {0x0900, 0x2b00};
275
  else
276
    v2q15_s = (v2q15) {0x2b00, 0x1980};
277
  v2q15_r = __builtin_mips_precequ_ph_qbr (v4i8_a);
278
  r = (int) v2q15_r;
279
  s = (int) v2q15_s;
280
  if (r != s)
281
    abort ();
282
 
283
  v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
284
  if (little_endian)
285
    v2q15_s = (v2q15) {0x2b00, 0x1980};
286
  else
287
    v2q15_s = (v2q15) {0x0900, 0x2b00};
288
  v2q15_r = __builtin_mips_precequ_ph_qbla (v4i8_a);
289
  r = (int) v2q15_r;
290
  s = (int) v2q15_s;
291
  if (r != s)
292
    abort ();
293
 
294
  v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
295
  if (little_endian)
296
    v2q15_s = (v2q15) {0x0900, 0x2b00};
297
  else
298
    v2q15_s = (v2q15) {0x2b00, 0x1980};
299
  v2q15_r = __builtin_mips_precequ_ph_qbra (v4i8_a);
300
  r = (int) v2q15_r;
301
  s = (int) v2q15_s;
302
  if (r != s)
303
    abort ();
304
 
305
  v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
306
  if (little_endian)
307
    v2q15_s = (v2q15) {0x56, 0x33};
308
  else
309
    v2q15_s = (v2q15) {0x12, 0x56};
310
  v2q15_r = __builtin_mips_preceu_ph_qbl (v4i8_a);
311
  r = (int) v2q15_r;
312
  s = (int) v2q15_s;
313
  if (r != s)
314
    abort ();
315
 
316
  v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
317
  if (little_endian)
318
    v2q15_s = (v2q15) {0x12, 0x56};
319
  else
320
    v2q15_s = (v2q15) {0x56, 0x33};
321
  v2q15_r = __builtin_mips_preceu_ph_qbr (v4i8_a);
322
  r = (int) v2q15_r;
323
  s = (int) v2q15_s;
324
  if (r != s)
325
    abort ();
326
 
327
  v4i8_a = (v4i8) {0x12, 0x99, 0x56, 0x33};
328
  if (little_endian)
329
    v2q15_s = (v2q15) {0x99, 0x33};
330
  else
331
    v2q15_s = (v2q15) {0x12, 0x56};
332
  v2q15_r = __builtin_mips_preceu_ph_qbla (v4i8_a);
333
  r = (int) v2q15_r;
334
  s = (int) v2q15_s;
335
  if (r != s)
336
    abort ();
337
 
338
  v4i8_a = (v4i8) {0x12, 0x99, 0x56, 0x33};
339
  if (little_endian)
340
    v2q15_s = (v2q15) {0x12, 0x56};
341
  else
342
    v2q15_s = (v2q15) {0x99, 0x33};
343
  v2q15_r = __builtin_mips_preceu_ph_qbra (v4i8_a);
344
  r = (int) v2q15_r;
345
  s = (int) v2q15_s;
346
  if (r != s)
347
    abort ();
348
 
349
  v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
350
  v4i8_s = (v4i8) {0xc8, 0xd0, 0x58, 0xe0};
351
  v4i8_r = __builtin_mips_shll_qb (v4i8_a, 2);
352
  r = (int) v4i8_r;
353
  s = (int) v4i8_s;
354
  if (r != s)
355
    abort ();
356
 
357
  v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
358
  i32_b = 1;
359
  v4i8_s = (v4i8) {0xe4, 0x68, 0xac, 0xf0};
360
  v4i8_r = __builtin_mips_shll_qb (v4i8_a, i32_b);
361
  r = (int) v4i8_r;
362
  s = (int) v4i8_s;
363
  if (r != s)
364
    abort ();
365
 
366
  v2q15_a = (v2q15) {0x1234, 0x5678};
367
  v2q15_s = (v2q15) {0x48d0, 0x59e0};
368
  v2q15_r = __builtin_mips_shll_ph (v2q15_a, 2);
369
  r = (int) v2q15_r;
370
  s = (int) v2q15_s;
371
  if (r != s)
372
    abort ();
373
 
374
  v2q15_a = (v2q15) {0x1234, 0x5678};
375
  i32_b = 1;
376
  v2q15_s = (v2q15) {0x2468, 0xacf0};
377
  v2q15_r = __builtin_mips_shll_ph (v2q15_a, i32_b);
378
  r = (int) v2q15_r;
379
  s = (int) v2q15_s;
380
  if (r != s)
381
    abort ();
382
 
383
  v2q15_a = (v2q15) {0x1234, 0x5678};
384
  v2q15_s = (v2q15) {0x48d0, 0x7fff};
385
  v2q15_r = __builtin_mips_shll_s_ph (v2q15_a, 2);
386
  r = (int) v2q15_r;
387
  s = (int) v2q15_s;
388
  if (r != s)
389
    abort ();
390
 
391
  v2q15_a = (v2q15) {0x1234, 0x5678};
392
  i32_b = 1;
393
  v2q15_s = (v2q15) {0x2468, 0x7fff};
394
  v2q15_r = __builtin_mips_shll_s_ph (v2q15_a, i32_b);
395
  r = (int) v2q15_r;
396
  s = (int) v2q15_s;
397
  if (r != s)
398
    abort ();
399
 
400
  q31_a = 0x70000000;
401
  q31_s = 0x7fffffff;
402
  q31_r = __builtin_mips_shll_s_w (q31_a, 2);
403
  if (q31_r != q31_s)
404
    abort ();
405
 
406
  q31_a = 0x70000000;
407
  i32_b = 1;
408
  q31_s = 0x7fffffff;
409
  q31_r = __builtin_mips_shll_s_w (q31_a, i32_b);
410
  if (q31_r != q31_s)
411
    abort ();
412
 
413
  v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
414
  v4i8_s = (v4i8) {0x3c, 0xd, 0x15, 0x1e};
415
  v4i8_r = __builtin_mips_shrl_qb (v4i8_a, 2);
416
  r = (int) v4i8_r;
417
  s = (int) v4i8_s;
418
  if (r != s)
419
    abort ();
420
 
421
  v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
422
  i32_b = 1;
423
  v4i8_s = (v4i8) {0x79, 0x1a, 0x2b, 0x3c};
424
  v4i8_r = __builtin_mips_shrl_qb (v4i8_a, i32_b);
425
  r = (int) v4i8_r;
426
  s = (int) v4i8_s;
427
  if (r != s)
428
    abort ();
429
 
430
  v2q15_a = (v2q15) {0x1234, 0x5678};
431
  v2q15_s = (v2q15) {0x48d, 0x159e};
432
  v2q15_r = __builtin_mips_shra_ph (v2q15_a, 2);
433
  r = (int) v2q15_r;
434
  s = (int) v2q15_s;
435
  if (r != s)
436
    abort ();
437
 
438
  v2q15_a = (v2q15) {0x1234, 0x5678};
439
  i32_b = 1;
440
  v2q15_s = (v2q15) {0x91a, 0x2b3c};
441
  v2q15_r = __builtin_mips_shra_ph (v2q15_a, i32_b);
442
  r = (int) v2q15_r;
443
  s = (int) v2q15_s;
444
  if (r != s)
445
    abort ();
446
 
447
  v2q15_a = (v2q15) {0x1234, 0x5678};
448
  v2q15_s = (v2q15) {0x48d, 0x159e};
449
  v2q15_r = __builtin_mips_shra_r_ph (v2q15_a, 2);
450
  r = (int) v2q15_r;
451
  s = (int) v2q15_s;
452
  if (r != s)
453
    abort ();
454
 
455
  v2q15_a = (v2q15) {0x1234, 0x5678};
456
  i32_b = 3;
457
  v2q15_s = (v2q15) {0x247, 0xacf};
458
  v2q15_r = __builtin_mips_shra_r_ph (v2q15_a, i32_b);
459
  r = (int) v2q15_r;
460
  s = (int) v2q15_s;
461
  if (r != s)
462
    abort ();
463
 
464
  q31_a = 0x70000000;
465
  q31_s = 0x1c000000;
466
  q31_r = __builtin_mips_shra_r_w (q31_a, 2);
467
  if (q31_r != q31_s)
468
    abort ();
469
 
470
  q31_a = 0x70000004;
471
  i32_b = 3;
472
  q31_s = 0x0e000001;
473
  q31_r = __builtin_mips_shra_r_w (q31_a, i32_b);
474
  if (q31_r != q31_s)
475
    abort ();
476
 
477
  v4i8_a = (v4i8) {0x1, 0x2, 0x3, 0x4};
478
  v2q15_b = (v2q15) {0x6f89, 0x1111};
479
  if (little_endian)
480
    v2q15_s = (v2q15) {0xffff, 0x4444};
481
  else
482
    v2q15_s = (v2q15) {0x6f89, 0x2222};
483
  v2q15_r = __builtin_mips_muleu_s_ph_qbl (v4i8_a, v2q15_b);
484
  r = (int) v2q15_r;
485
  s = (int) v2q15_s;
486
  if (r != s)
487
    abort ();
488
 
489
  v4i8_a = (v4i8) {0x1, 0x2, 0x3, 0x4};
490
  v2q15_b = (v2q15) {0x6f89, 0x1111};
491
  if (little_endian)
492
    v2q15_s = (v2q15) {0x6f89, 0x2222};
493
  else
494
    v2q15_s = (v2q15) {0xffff, 0x4444};
495
  v2q15_r = __builtin_mips_muleu_s_ph_qbr (v4i8_a, v2q15_b);
496
  r = (int) v2q15_r;
497
  s = (int) v2q15_s;
498
  if (r != s)
499
    abort ();
500
 
501
  v2q15_a = (v2q15) {0x1234, 0x5678};
502
  v2q15_b = (v2q15) {0x6f89, 0x1111};
503
  v2q15_s = (v2q15) {0x0fdd, 0x0b87};
504
  v2q15_r = __builtin_mips_mulq_rs_ph (v2q15_a, v2q15_b);
505
  r = (int) v2q15_r;
506
  s = (int) v2q15_s;
507
  if (r != s)
508
    abort ();
509
 
510
  v2q15_a = (v2q15) {0x8000, 0x8000};
511
  v2q15_b = (v2q15) {0x8000, 0x8000};
512
  q31_s = 0x7fffffff;
513
  q31_r = __builtin_mips_muleq_s_w_phl (v2q15_a, v2q15_b);
514
  if (q31_r != q31_s)
515
    abort ();
516
 
517
  v2q15_a = (v2q15) {0x8000, 0x8000};
518
  v2q15_b = (v2q15) {0x8000, 0x8000};
519
  q31_s = 0x7fffffff;
520
  q31_r = __builtin_mips_muleq_s_w_phr (v2q15_a, v2q15_b);
521
  if (q31_r != q31_s)
522
    abort ();
523
 
524
#ifndef __mips64
525
  a64_a = 0x22221111;
526
  v4i8_b = (v4i8) {0x12, 0x34, 0x56, 0x78};
527
  v4i8_c = (v4i8) {0xaa, 0x89, 0x11, 0x34};
528
  if (little_endian)
529
    a64_s = 0x22222f27;
530
  else
531
    a64_s = 0x222238d9;
532
  a64_r = __builtin_mips_dpau_h_qbl (a64_a, v4i8_b, v4i8_c);
533
  if (a64_r != a64_s)
534
    abort ();
535
 
536
  a64_a = 0x22221111;
537
  v4i8_b = (v4i8) {0x12, 0x34, 0x56, 0x78};
538
  v4i8_c = (v4i8) {0xaa, 0x89, 0x11, 0x34};
539
  if (little_endian)
540
    a64_s = 0x222238d9;
541
  else
542
    a64_s = 0x22222f27;
543
  a64_r = __builtin_mips_dpau_h_qbr (a64_a, v4i8_b, v4i8_c);
544
  if (a64_r != a64_s)
545
    abort ();
546
 
547
  a64_a = 0x22221111;
548
  v4i8_b = (v4i8) {0x12, 0x34, 0x56, 0x78};
549
  v4i8_c = (v4i8) {0xaa, 0x89, 0x11, 0x34};
550
  if (little_endian)
551
    a64_s = 0x2221f2fb;
552
  else
553
    a64_s = 0x2221e949;
554
  a64_r = __builtin_mips_dpsu_h_qbl (a64_a, v4i8_b, v4i8_c);
555
  if (a64_r != a64_s)
556
    abort ();
557
 
558
  a64_a = 0x22221111;
559
  v4i8_b = (v4i8) {0x12, 0x34, 0x56, 0x78};
560
  v4i8_c = (v4i8) {0xaa, 0x89, 0x11, 0x34};
561
  if (little_endian)
562
    a64_s = 0x2221e949;
563
  else
564
    a64_s = 0x2221f2fb;
565
  a64_r = __builtin_mips_dpsu_h_qbr (a64_a, v4i8_b, v4i8_c);
566
  if (a64_r != a64_s)
567
    abort ();
568
 
569
  a64_a = 0x00001111;
570
  v2q15_b = (v2q15) {0x8000, 0x5678};
571
  v2q15_c = (v2q15) {0x8000, 0x1111};
572
  a64_s = 0x8b877d00;
573
  a64_r = __builtin_mips_dpaq_s_w_ph (a64_a, v2q15_b, v2q15_c);
574
  if (a64_r != a64_s)
575
    abort ();
576
 
577
  a64_a = 0x00001111;
578
  v2q15_b = (v2q15) {0x8000, 0x5678};
579
  v2q15_c = (v2q15) {0x8000, 0x1111};
580
  a64_s = 0xffffffff7478a522LL;
581
  a64_r = __builtin_mips_dpsq_s_w_ph (a64_a, v2q15_b, v2q15_c);
582
  if (a64_r != a64_s)
583
    abort ();
584
 
585
  a64_a = 0x00001111;
586
  v2q15_b = (v2q15) {0x8000, 0x5678};
587
  v2q15_c = (v2q15) {0x8000, 0x1111};
588
  if (little_endian)
589
    a64_s = 0xffffffff8b877d02LL;
590
  else
591
    a64_s = 0x7478a520;
592
  a64_r = __builtin_mips_mulsaq_s_w_ph (a64_a, v2q15_b, v2q15_c);
593
  if (a64_r != a64_s)
594
    abort ();
595
 
596
  a64_a = 0x00001111;
597
  q31_b = 0x80000000;
598
  q31_c = 0x80000000;
599
  a64_s = 0x7fffffffffffffffLL;
600
  a64_r = __builtin_mips_dpaq_sa_l_w (a64_a, q31_b, q31_c);
601
  if (a64_r != a64_s)
602
    abort ();
603
 
604
  a64_a = 0x00001111;
605
  q31_b = 0x80000000;
606
  q31_c = 0x80000000;
607
  a64_s = 0x8000000000001112LL;
608
  a64_r = __builtin_mips_dpsq_sa_l_w (a64_a, q31_b, q31_c);
609
  if (a64_r != a64_s)
610
    abort ();
611
 
612
  a64_a = 0x00001111;
613
  v2q15_b = (v2q15) {0x8000, 0x1};
614
  v2q15_c = (v2q15) {0x8000, 0x2};
615
  if (little_endian)
616
    a64_s = 0x1115;
617
  else
618
    a64_s = 0x80001110;
619
  a64_r = __builtin_mips_maq_s_w_phl (a64_a, v2q15_b, v2q15_c);
620
  if (a64_r != a64_s)
621
    abort ();
622
 
623
  a64_a = 0x00001111;
624
  v2q15_b = (v2q15) {0x8000, 0x1};
625
  v2q15_c = (v2q15) {0x8000, 0x2};
626
  if (little_endian)
627
    a64_s = 0x80001110;
628
  else
629
    a64_s = 0x1115;
630
  a64_r = __builtin_mips_maq_s_w_phr (a64_a, v2q15_b, v2q15_c);
631
  if (a64_r != a64_s)
632
    abort ();
633
 
634
  a64_a = 0x00001111;
635
  v2q15_b = (v2q15) {0x8000, 0x1};
636
  v2q15_c = (v2q15) {0x8000, 0x2};
637
  if (little_endian)
638
    a64_s = 0x1115;
639
  else
640
    a64_s = 0x7fffffff;
641
  a64_r = __builtin_mips_maq_sa_w_phl (a64_a, v2q15_b, v2q15_c);
642
  if (a64_r != a64_s)
643
    abort ();
644
 
645
  a64_a = 0x00001111;
646
  v2q15_b = (v2q15) {0x8000, 0x1};
647
  v2q15_c = (v2q15) {0x8000, 0x2};
648
  if (little_endian)
649
    a64_s = 0x7fffffff;
650
  else
651
    a64_s = 0x1115;
652
  a64_r = __builtin_mips_maq_sa_w_phr (a64_a, v2q15_b, v2q15_c);
653
  if (a64_r != a64_s)
654
    abort ();
655
#endif
656
 
657
  i32_a = 0x12345678;
658
  i32_s = 0x00001e6a;
659
  i32_r = __builtin_mips_bitrev (i32_a);
660
  if (i32_r != i32_s)
661
    abort ();
662
 
663
  i32_a = 0x00000208; // pos is 8, size is 4
664
  __builtin_mips_wrdsp (i32_a, 31);
665
  i32_a = 0x12345678;
666
  i32_b = 0x87654321;
667
  i32_s = 0x12345178;
668
  i32_r = __builtin_mips_insv (i32_a, i32_b);
669
  if (i32_r != i32_s)
670
    abort ();
671
 
672
  v4i8_s = (v4i8) {1, 1, 1, 1};
673
  v4i8_r = __builtin_mips_repl_qb (1);
674
  r = (int) v4i8_r;
675
  s = (int) v4i8_s;
676
  if (r != s)
677
    abort ();
678
 
679
  i32_a = 99;
680
  v4i8_s = (v4i8) {99, 99, 99, 99};
681
  v4i8_r = __builtin_mips_repl_qb (i32_a);
682
  r = (int) v4i8_r;
683
  s = (int) v4i8_s;
684
  if (r != s)
685
    abort ();
686
 
687
  v2q15_s = (v2q15) {30, 30};
688
  v2q15_r = __builtin_mips_repl_ph (30);
689
  r = (int) v2q15_r;
690
  s = (int) v2q15_s;
691
  if (r != s)
692
    abort ();
693
 
694
  i32_a = 0x5612;
695
  v2q15_s = (v2q15) {0x5612, 0x5612};
696
  v2q15_r = __builtin_mips_repl_ph (i32_a);
697
  r = (int) v2q15_r;
698
  s = (int) v2q15_s;
699
  if (r != s)
700
    abort ();
701
 
702
  v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
703
  v4i8_b = (v4i8) {0x12, 0x34, 0x78, 0x56};
704
  if (little_endian)
705
    i32_s = 0x03000000;
706
  else
707
    i32_s = 0x0c000000;
708
  __builtin_mips_cmpu_eq_qb (v4i8_a, v4i8_b);
709
  i32_r = __builtin_mips_rddsp (16);
710
  if (i32_r != i32_s)
711
    abort ();
712
 
713
  v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
714
  v4i8_b = (v4i8) {0x12, 0x34, 0x78, 0x56};
715
  if (little_endian)
716
    i32_s = 0x04000000;
717
  else
718
    i32_s = 0x02000000;
719
  __builtin_mips_cmpu_lt_qb (v4i8_a, v4i8_b);
720
  i32_r = __builtin_mips_rddsp (16);
721
  if (i32_r != i32_s)
722
    abort ();
723
 
724
  v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
725
  v4i8_b = (v4i8) {0x12, 0x34, 0x78, 0x56};
726
  if (little_endian)
727
    i32_s = 0x07000000;
728
  else
729
    i32_s = 0x0e000000;
730
  __builtin_mips_cmpu_le_qb (v4i8_a, v4i8_b);
731
  i32_r = __builtin_mips_rddsp (16);
732
  if (i32_r != i32_s)
733
    abort ();
734
 
735
  v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
736
  v4i8_b = (v4i8) {0x12, 0x34, 0x78, 0x56};
737
  if (little_endian)
738
    i32_s = 0x3;
739
  else
740
    i32_s = 0xc;
741
  i32_r=__builtin_mips_cmpgu_eq_qb (v4i8_a, v4i8_b);
742
  if (i32_r != i32_s)
743
    abort ();
744
 
745
  v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
746
  v4i8_b = (v4i8) {0x12, 0x34, 0x78, 0x56};
747
  if (little_endian)
748
    i32_s = 0x4;
749
  else
750
    i32_s = 0x2;
751
  i32_r = __builtin_mips_cmpgu_lt_qb (v4i8_a, v4i8_b);
752
  if (i32_r != i32_s)
753
    abort ();
754
 
755
  v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
756
  v4i8_b = (v4i8) {0x12, 0x34, 0x78, 0x56};
757
  if (little_endian)
758
    i32_s = 0x7;
759
  else
760
    i32_s = 0xe;
761
  i32_r = __builtin_mips_cmpgu_le_qb (v4i8_a, v4i8_b);
762
  if (i32_r != i32_s)
763
    abort ();
764
 
765
  __builtin_mips_wrdsp (0,31); // Clear all condition code bits.
766
  v2q15_a = (v2q15) {0x1234, 0x5678};
767
  v2q15_b = (v2q15) {0x1234, 0x7856};
768
  if (little_endian)
769
    i32_s = 0x01000000;
770
  else
771
    i32_s = 0x02000000;
772
  __builtin_mips_cmp_eq_ph (v2q15_a, v2q15_b);
773
  i32_r = __builtin_mips_rddsp (16);
774
  if (i32_r != i32_s)
775
    abort ();
776
 
777
  v2q15_a = (v2q15) {0x1234, 0x5678};
778
  v2q15_b = (v2q15) {0x1234, 0x7856};
779
  if (little_endian)
780
    i32_s = 0x02000000;
781
  else
782
    i32_s = 0x01000000;
783
  __builtin_mips_cmp_lt_ph (v2q15_a, v2q15_b);
784
  i32_r = __builtin_mips_rddsp (16);
785
  if (i32_r != i32_s)
786
    abort ();
787
 
788
  v2q15_a = (v2q15) {0x1234, 0x5678};
789
  v2q15_b = (v2q15) {0x1234, 0x7856};
790
  i32_s = 0x03000000;
791
  __builtin_mips_cmp_le_ph (v2q15_a, v2q15_b);
792
  i32_r = __builtin_mips_rddsp (16);
793
  if (i32_r != i32_s)
794
    abort ();
795
 
796
  i32_a = 0x0a000000; // cc: 0000 1010
797
  __builtin_mips_wrdsp (i32_a, 31);
798
  v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
799
  v4i8_b = (v4i8) {0x21, 0x43, 0x65, 0x87};
800
  if (little_endian)
801
    v4i8_s = (v4i8) {0x21, 0x34, 0x65, 0x78};
802
  else
803
    v4i8_s = (v4i8) {0x12, 0x43, 0x56, 0x87};
804
  v4i8_r = __builtin_mips_pick_qb (v4i8_a, v4i8_b);
805
  r = (int) v4i8_r;
806
  s = (int) v4i8_s;
807
  if (r != s)
808
    abort ();
809
 
810
  i32_a = 0x02000000; // cc: 0000 0010
811
  __builtin_mips_wrdsp (i32_a, 31);
812
  v2q15_a = (v2q15) {0x1234, 0x5678};
813
  v2q15_b = (v2q15) {0x2143, 0x6587};
814
  if (little_endian)
815
    v2q15_s = (v2q15) {0x2143, 0x5678};
816
  else
817
    v2q15_s = (v2q15) {0x1234, 0x6587};
818
  v2q15_r = __builtin_mips_pick_ph (v2q15_a, v2q15_b);
819
  r = (int) v2q15_r;
820
  s = (int) v2q15_s;
821
  if (r != s)
822
    abort ();
823
 
824
  v2q15_a = (v2q15) {0x1234, 0x5678};
825
  v2q15_b = (v2q15) {0x1234, 0x7856};
826
  if (little_endian)
827
    v2q15_s = (v2q15) {0x7856, 0x1234};
828
  else
829
    v2q15_s = (v2q15) {0x5678, 0x1234};
830
  v2q15_r = __builtin_mips_packrl_ph (v2q15_a, v2q15_b);
831
  r = (int) v2q15_r;
832
  s = (int) v2q15_s;
833
  if (r != s)
834
    abort ();
835
 
836
#ifndef __mips64
837
  a64_a = 0x1234567887654321LL;
838
  i32_s = 0x88765432;
839
  i32_r = __builtin_mips_extr_w (a64_a, 4);
840
  if (i32_r != i32_s)
841
    abort ();
842
 
843
  a64_a = 0x1234567887658321LL;
844
  i32_s = 0x56788766;
845
  i32_r = __builtin_mips_extr_r_w (a64_a, 16);
846
  if (i32_r != i32_s)
847
    abort ();
848
 
849
  a64_a = 0x12345677fffffff8LL;
850
  i32_s = 0x7fffffff;
851
  i32_r = __builtin_mips_extr_rs_w (a64_a, 4);
852
  if (i32_r != i32_s)
853
    abort ();
854
 
855
  a64_a = 0x1234567887658321LL;
856
  i32_s = 0x7fff;
857
  i32_r = __builtin_mips_extr_s_h (a64_a, 16);
858
  if (i32_r != i32_s)
859
    abort ();
860
 
861
  a64_a = 0x0000007887658321LL;
862
  i32_b = 24;
863
  i32_s = 0x7887;
864
  i32_r = __builtin_mips_extr_s_h (a64_a, i32_b);
865
  if (i32_r != i32_s)
866
    abort ();
867
 
868
  a64_a = 0x1234567887654321LL;
869
  i32_b = 4;
870
  i32_s = 0x88765432;
871
  i32_r = __builtin_mips_extr_w (a64_a, i32_b);
872
  if (i32_r != i32_s)
873
    abort ();
874
 
875
  a64_a = 0x1234567887658321LL;
876
  i32_b = 16;
877
  i32_s = 0x56788766;
878
  i32_r = __builtin_mips_extr_r_w (a64_a, i32_b);
879
  if (i32_r != i32_s)
880
    abort ();
881
 
882
  a64_a = 0x12345677fffffff8LL;
883
  i32_b = 4;
884
  i32_s = 0x7fffffff;
885
  i32_r = __builtin_mips_extr_rs_w (a64_a, i32_b);
886
  if (i32_r != i32_s)
887
    abort ();
888
 
889
  i32_a = 0x0000021f; // pos is 31
890
  __builtin_mips_wrdsp (i32_a, 31);
891
  a64_a = 0x1234567887654321LL;
892
  i32_s = 8;
893
  i32_r = __builtin_mips_extp (a64_a, 3); // extract 4 bits
894
  if (i32_r != i32_s)
895
    abort ();
896
 
897
  i32_a = 0x0000021f; // pos is 31
898
  __builtin_mips_wrdsp (i32_a, 31);
899
  a64_a = 0x1234567887654321LL;
900
  i32_b = 7; // size is 8. NOTE!! we should use 7
901
  i32_s = 0x87;
902
  i32_r = __builtin_mips_extp (a64_a, i32_b);
903
  if (i32_r != i32_s)
904
    abort ();
905
 
906
  i32_a = 0x0000021f; // pos is 31
907
  __builtin_mips_wrdsp (i32_a, 31);
908
  a64_a = 0x1234567887654321LL;
909
  i32_s = 8;
910
  i32_r = __builtin_mips_extpdp (a64_a, 3); // extract 4 bits
911
  if (i32_r != i32_s)
912
    abort ();
913
 
914
  i32_s = 0x0000021b; // pos is 27
915
  i32_r = __builtin_mips_rddsp (31);
916
  if (i32_r != i32_s)
917
    abort ();
918
 
919
  i32_a = 0x0000021f; // pos is 31
920
  __builtin_mips_wrdsp (i32_a, 31);
921
  a64_a = 0x1234567887654321LL;
922
  i32_b = 11; // size is 12. NOTE!!! We should use 11
923
  i32_s = 0x876;
924
  i32_r = __builtin_mips_extpdp (a64_a, i32_b);
925
  if (i32_r != i32_s)
926
    abort ();
927
 
928
  i32_s = 0x00000213; // pos is 19
929
  i32_r = __builtin_mips_rddsp (31);
930
  if (i32_r != i32_s)
931
    abort ();
932
 
933
  a64_a = 0x1234567887654321LL;
934
  a64_s = 0x0012345678876543LL;
935
  a64_r = __builtin_mips_shilo (a64_a, 8);
936
  if (a64_r != a64_s)
937
    abort ();
938
 
939
  a64_a = 0x1234567887654321LL;
940
  i32_b = -16;
941
  a64_s = 0x5678876543210000LL;
942
  a64_r = __builtin_mips_shilo (a64_a, i32_b);
943
  if (a64_r != a64_s)
944
    abort ();
945
 
946
  i32_a = 0x0;
947
  __builtin_mips_wrdsp (i32_a, 31);
948
  a64_a = 0x1234567887654321LL;
949
  i32_b = 0x11112222;
950
  a64_s = 0x8765432111112222LL;
951
  a64_r = __builtin_mips_mthlip (a64_a, i32_b);
952
  if (a64_r != a64_s)
953
    abort ();
954
  i32_s = 32;
955
  i32_r = __builtin_mips_rddsp (31);
956
  if (i32_r != i32_s)
957
    abort ();
958
#endif
959
 
960
  i32_a = 0x1357a468;
961
  __builtin_mips_wrdsp (i32_a, 63);
962
  i32_s = 0x03572428;
963
  i32_r = __builtin_mips_rddsp (63);
964
  if (i32_r != i32_s)
965
    abort ();
966
 
967
  ptr_a = &array;
968
  i32_b = 37;
969
  i32_s = 37;
970
  i32_r = __builtin_mips_lbux (ptr_a, i32_b);
971
  if (i32_r != i32_s)
972
    abort ();
973
 
974
  ptr_a = &array;
975
  i32_b = 38;
976
  if (little_endian)
977
    i32_s = 0x2726;
978
  else
979
    i32_s = 0x2627;
980
  i32_r = __builtin_mips_lhx (ptr_a, i32_b);
981
  if (i32_r != i32_s)
982
    abort ();
983
 
984
  ptr_a = &array;
985
  i32_b = 40;
986
  if (little_endian)
987
    i32_s = 0x2b2a2928;
988
  else
989
    i32_s = 0x28292a2b;
990
  i32_r = __builtin_mips_lwx (ptr_a, i32_b);
991
  if (i32_r != i32_s)
992
    abort ();
993
 
994
  i32_a = 0x00000220; // pos is 32, size is 4
995
  __builtin_mips_wrdsp (i32_a, 63);
996
  i32_s = 1;
997
  i32_r = __builtin_mips_bposge32 ();
998
  if (i32_r != i32_s)
999
    abort ();
1000
}
1001
 

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