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[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [mips/] [mips32-dsp.c] - Blame information for rev 378

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Line No. Rev Author Line
1 321 jeremybenn 
/* Test MIPS32 DSP instructions */
2 
/* { dg-do compile } */
3 
/* { dg-options "-mgp32 -mdsp" } */
4 
/* { dg-final { scan-assembler "addq.ph" } } */
5 
/* { dg-final { scan-assembler "addq_s.ph" } } */
6 
/* { dg-final { scan-assembler "addq_s.w" } } */
7 
/* { dg-final { scan-assembler "addu.qb" } } */
8 
/* { dg-final { scan-assembler "addu_s.qb" } } */
9 
/* { dg-final { scan-assembler "subq.ph" } } */
10 
/* { dg-final { scan-assembler "subq_s.ph" } } */
11 
/* { dg-final { scan-assembler "subq_s.w" } } */
12 
/* { dg-final { scan-assembler "subu.qb" } } */
13 
/* { dg-final { scan-assembler "subu_s.qb" } } */
14 
/* { dg-final { scan-assembler "addsc" } } */
15 
/* { dg-final { scan-assembler "addwc" } } */
16 
/* { dg-final { scan-assembler "modsub" } } */
17 
/* { dg-final { scan-assembler "raddu.w.qb" } } */
18 
/* { dg-final { scan-assembler "absq_s.ph" } } */
19 
/* { dg-final { scan-assembler "absq_s.w" } } */
20 
/* { dg-final { scan-assembler "precrq.qb.ph" } } */
21 
/* { dg-final { scan-assembler "precrq.ph.w" } } */
22 
/* { dg-final { scan-assembler "precrq_rs.ph.w" } } */
23 
/* { dg-final { scan-assembler "precrqu_s.qb.ph" } } */
24 
/* { dg-final { scan-assembler "preceq.w.phl" } } */
25 
/* { dg-final { scan-assembler "preceq.w.phr" } } */
26 
/* { dg-final { scan-assembler "precequ.ph.qbl" } } */
27 
/* { dg-final { scan-assembler "precequ.ph.qbr" } } */
28 
/* { dg-final { scan-assembler "precequ.ph.qbla" } } */
29 
/* { dg-final { scan-assembler "precequ.ph.qbra" } } */
30 
/* { dg-final { scan-assembler "preceu.ph.qbl" } } */
31 
/* { dg-final { scan-assembler "preceu.ph.qbr" } } */
32 
/* { dg-final { scan-assembler "preceu.ph.qbla" } } */
33 
/* { dg-final { scan-assembler "preceu.ph.qbra" } } */
34 
/* { dg-final { scan-assembler "shllv?.qb" } } */
35 
/* { dg-final { scan-assembler "shllv?.ph" } } */
36 
/* { dg-final { scan-assembler "shllv?_s.ph" } } */
37 
/* { dg-final { scan-assembler "shllv?_s.w" } } */
38 
/* { dg-final { scan-assembler "shrlv?.qb" } } */
39 
/* { dg-final { scan-assembler "shrav?.ph" } } */
40 
/* { dg-final { scan-assembler "shrav?_r.ph" } } */
41 
/* { dg-final { scan-assembler "shrav?_r.w" } } */
42 
/* { dg-final { scan-assembler "muleu_s.ph.qbl" } } */
43 
/* { dg-final { scan-assembler "muleu_s.ph.qbr" } } */
44 
/* { dg-final { scan-assembler "mulq_rs.ph" } } */
45 
/* { dg-final { scan-assembler "muleq_s.w.phl" } } */
46 
/* { dg-final { scan-assembler "muleq_s.w.phr" } } */
47 
/* { dg-final { scan-assembler "dpau.h.qbl" } } */
48 
/* { dg-final { scan-assembler "dpau.h.qbr" } } */
49 
/* { dg-final { scan-assembler "dpsu.h.qbl" } } */
50 
/* { dg-final { scan-assembler "dpsu.h.qbr" } } */
51 
/* { dg-final { scan-assembler "dpaq_s.w.ph" } } */
52 
/* { dg-final { scan-assembler "dpsq_s.w.ph" } } */
53 
/* { dg-final { scan-assembler "mulsaq_s.w.ph" } } */
54 
/* { dg-final { scan-assembler "dpaq_sa.l.w" } } */
55 
/* { dg-final { scan-assembler "dpsq_sa.l.w" } } */
56 
/* { dg-final { scan-assembler "maq_s.w.phl" } } */
57 
/* { dg-final { scan-assembler "maq_s.w.phr" } } */
58 
/* { dg-final { scan-assembler "maq_sa.w.phl" } } */
59 
/* { dg-final { scan-assembler "maq_sa.w.phr" } } */
60 
/* { dg-final { scan-assembler "bitrev" } } */
61 
/* { dg-final { scan-assembler "insv" } } */
62 
/* { dg-final { scan-assembler "replv?.qb" } } */
63 
/* { dg-final { scan-assembler "repl.ph" } } */
64 
/* { dg-final { scan-assembler "replv.ph" } } */
65 
/* { dg-final { scan-assembler "cmpu.eq.qb" } } */
66 
/* { dg-final { scan-assembler "cmpu.lt.qb" } } */
67 
/* { dg-final { scan-assembler "cmpu.le.qb" } } */
68 
/* { dg-final { scan-assembler "cmpgu.eq.qb" } } */
69 
/* { dg-final { scan-assembler "cmpgu.lt.qb" } } */
70 
/* { dg-final { scan-assembler "cmpgu.le.qb" } } */
71 
/* { dg-final { scan-assembler "cmp.eq.ph" } } */
72 
/* { dg-final { scan-assembler "cmp.lt.ph" } } */
73 
/* { dg-final { scan-assembler "cmp.le.ph" } } */
74 
/* { dg-final { scan-assembler "pick.qb" } } */
75 
/* { dg-final { scan-assembler "pick.ph" } } */
76 
/* { dg-final { scan-assembler "packrl.ph" } } */
77 
/* { dg-final { scan-assembler "extrv?.w" } } */
78 
/* { dg-final { scan-assembler "extrv?_s.h" } } */
79 
/* { dg-final { scan-assembler "extrv?_r.w" } } */
80 
/* { dg-final { scan-assembler "extrv?_rs.w" } } */
81 
/* { dg-final { scan-assembler "extpv?" } } */
82 
/* { dg-final { scan-assembler "extpdpv?" } } */
83 
/* { dg-final { scan-assembler "shilov?" } } */
84 
/* { dg-final { scan-assembler "mthlip" } } */
85 
/* { dg-final { scan-assembler "mfhi" } } */
86 
/* { dg-final { scan-assembler "mflo" } } */
87 
/* { dg-final { scan-assembler "mthi" } } */
88 
/* { dg-final { scan-assembler "mtlo" } } */
89 
/* { dg-final { scan-assembler "wrdsp" } } */
90 
/* { dg-final { scan-assembler "rddsp" } } */
91 
/* { dg-final { scan-assembler "lbux?" } } */
92 
/* { dg-final { scan-assembler "lhx?" } } */
93 
/* { dg-final { scan-assembler "lwx?" } } */
94 
/* { dg-final { scan-assembler "bposge32" } } */
95 
 
96 
#include <stdlib.h>
97 
#include <stdio.h>
98 
 
99 
typedef signed char v4i8 __attribute__ ((vector_size(4)));
100 
typedef short v2q15 __attribute__ ((vector_size(4)));
101 
 
102 
typedef int q31;
103 
typedef int i32;
104 
typedef long long a64;
105 
 
106 
NOMIPS16 void test_MIPS_DSP (void);
107 
 
108 
char array[100];
109 
int little_endian;
110 
 
111 
int main ()
112 
{
113 
  int i;
114 
 
115 
  union { long long ll; int i[2]; } endianness_test;
116 
  endianness_test.ll = 1;
117 
  little_endian = endianness_test.i[0];
118 
 
119 
  for (i = 0; i < 100; i++)
120 
    array[i] = i;
121 
 
122 
  test_MIPS_DSP ();
123 
 
124 
  exit (0);
125 
}
126 
 
127 
NOMIPS16 v2q15 add_v2q15 (v2q15 a, v2q15 b)
128 
{
129 
  return __builtin_mips_addq_ph (a, b);
130 
}
131 
 
132 
NOMIPS16 v4i8 add_v4i8 (v4i8 a, v4i8 b)
133 
{
134 
  return __builtin_mips_addu_qb (a, b);
135 
}
136 
 
137 
NOMIPS16 v2q15 sub_v2q15 (v2q15 a, v2q15 b)
138 
{
139 
  return __builtin_mips_subq_ph (a, b);
140 
}
141 
 
142 
NOMIPS16 v4i8 sub_v4i8 (v4i8 a, v4i8 b)
143 
{
144 
  return __builtin_mips_subu_qb (a, b);
145 
}
146 
 
147 
NOMIPS16 void test_MIPS_DSP ()
148 
{
149 
  v4i8 v4i8_a,v4i8_b,v4i8_c,v4i8_r,v4i8_s;
150 
  v2q15 v2q15_a,v2q15_b,v2q15_c,v2q15_r,v2q15_s;
151 
  q31 q31_a,q31_b,q31_c,q31_r,q31_s;
152 
  i32 i32_a,i32_b,i32_c,i32_r,i32_s;
153 
  a64 a64_a,a64_b,a64_c,a64_r,a64_s;
154 
 
155 
  void *ptr_a;
156 
  int r,s;
157 
  long long lr,ls;
158 
 
159 
  v2q15_a = (v2q15) {0x1234, 0x5678};
160 
  v2q15_b = (v2q15) {0x6f89, 0x1111};
161 
  v2q15_s = (v2q15) {0x81bd, 0x6789};
162 
  v2q15_r = add_v2q15 (v2q15_a, v2q15_b);
163 
  r = (int) v2q15_r;
164 
  s = (int) v2q15_s;
165 
  if (r != s)
166 
    abort ();
167 
 
168 
  v2q15_a = (v2q15) {0x1234, 0x5678};
169 
  v2q15_b = (v2q15) {0x6f89, 0x1111};
170 
  v2q15_s = (v2q15) {0x7fff, 0x6789};
171 
  v2q15_r = __builtin_mips_addq_s_ph (v2q15_a, v2q15_b);
172 
  r = (int) v2q15_r;
173 
  s = (int) v2q15_s;
174 
  if (r != s)
175 
    abort ();
176 
 
177 
  q31_a = 0x70000000;
178 
  q31_b = 0x71234567;
179 
  q31_s = 0x7fffffff;
180 
  q31_r = __builtin_mips_addq_s_w (q31_a, q31_b);
181 
  if (q31_r != q31_s)
182 
    abort ();
183 
 
184 
  v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
185 
  v4i8_b = (v4i8) {0xff, 0x89, 0x11, 0x11};
186 
  v4i8_s = (v4i8) {0xf1, 0xbd, 0x67, 0x89};
187 
  v4i8_r = add_v4i8 (v4i8_a, v4i8_b);
188 
  r = (int) v4i8_r;
189 
  s = (int) v4i8_s;
190 
  if (r != s)
191 
    abort ();
192 
 
193 
  v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
194 
  v4i8_b = (v4i8) {0xff, 0x89, 0x11, 0x11};
195 
  v4i8_s = (v4i8) {0xff, 0xbd, 0x67, 0x89};
196 
  v4i8_r = __builtin_mips_addu_s_qb (v4i8_a, v4i8_b);
197 
  r = (int) v4i8_r;
198 
  s = (int) v4i8_s;
199 
  if (r != s)
200 
    abort ();
201 
 
202 
  v2q15_a = (v2q15) {0x1234, 0x5678};
203 
  v2q15_b = (v2q15) {0x6f89, 0x1111};
204 
  v2q15_s = (v2q15) {0xa2ab, 0x4567};
205 
  v2q15_r = sub_v2q15 (v2q15_a, v2q15_b);
206 
  r = (int) v2q15_r;
207 
  s = (int) v2q15_s;
208 
  if (r != s)
209 
    abort ();
210 
 
211 
  v2q15_a = (v2q15) {0x8000, 0x5678};
212 
  v2q15_b = (v2q15) {0x6f89, 0x1111};
213 
  v2q15_s = (v2q15) {0x8000, 0x4567};
214 
  v2q15_r = __builtin_mips_subq_s_ph (v2q15_a, v2q15_b);
215 
  r = (int) v2q15_r;
216 
  s = (int) v2q15_s;
217 
  if (r != s)
218 
    abort ();
219 
 
220 
  q31_a = 0x70000000;
221 
  q31_b = 0x71234567;
222 
  q31_s = 0xfedcba99;
223 
  q31_r = __builtin_mips_subq_s_w (q31_a, q31_b);
224 
  if (q31_r != q31_s)
225 
    abort ();
226 
 
227 
  v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
228 
  v4i8_b = (v4i8) {0xff, 0x89, 0x11, 0x11};
229 
  v4i8_s = (v4i8) {0xf3, 0xab, 0x45, 0x67};
230 
  v4i8_r = sub_v4i8 (v4i8_a, v4i8_b);
231 
  r = (int) v4i8_r;
232 
  s = (int) v4i8_s;
233 
  if (r != s)
234 
    abort ();
235 
 
236 
  v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
237 
  v4i8_b = (v4i8) {0xff, 0x89, 0x11, 0x11};
238 
  v4i8_s = (v4i8) {0x0, 0x0, 0x45, 0x67};
239 
  v4i8_r = __builtin_mips_subu_s_qb (v4i8_a, v4i8_b);
240 
  r = (int) v4i8_r;
241 
  s = (int) v4i8_s;
242 
  if (r != s)
243 
    abort ();
244 
 
245 
  i32_a = 0xf5678900;
246 
  i32_b = 0x7abcdef0;
247 
  i32_s = 0x702467f0;
248 
  i32_r = __builtin_mips_addsc (i32_a, i32_b);
249 
  if (i32_r != i32_s)
250 
    abort ();
251 
 
252 
  i32_a = 0x75678900;
253 
  i32_b = 0x7abcdef0;
254 
  i32_s = 0xf02467f1;
255 
  i32_r = __builtin_mips_addwc (i32_a, i32_b);
256 
  if (i32_r != i32_s)
257 
    abort ();
258 
 
259 
  i32_a = 0;
260 
  i32_b = 0x00000901;
261 
  i32_s = 9;
262 
  i32_r = __builtin_mips_modsub (i32_a, i32_b);
263 
  if (i32_r != i32_s)
264 
    abort ();
265 
 
266 
  v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
267 
  i32_s = 0x1f4;
268 
  i32_r = __builtin_mips_raddu_w_qb (v4i8_a);
269 
  if (i32_r != i32_s)
270 
    abort ();
271 
 
272 
  v2q15_a = (v2q15) {0x8000, 0x8134};
273 
  v2q15_s = (v2q15) {0x7fff, 0x7ecc};
274 
  v2q15_r = __builtin_mips_absq_s_ph (v2q15_a);
275 
  r = (int) v2q15_r;
276 
  s = (int) v2q15_s;
277 
  if (r != s)
278 
    abort ();
279 
 
280 
  q31_a = (q31) 0x80000000;
281 
  q31_s = (q31) 0x7fffffff;
282 
  q31_r = __builtin_mips_absq_s_w (q31_a);
283 
  if (q31_r != q31_s)
284 
    abort ();
285 
 
286 
  v2q15_a = (v2q15) {0x9999, 0x5612};
287 
  v2q15_b = (v2q15) {0x5612, 0x3333};
288 
  if (little_endian)
289 
    v4i8_s = (v4i8) {0x56, 0x33, 0x99, 0x56};
290 
  else
291 
    v4i8_s = (v4i8) {0x99, 0x56, 0x56, 0x33};
292 
  v4i8_r = __builtin_mips_precrq_qb_ph (v2q15_a, v2q15_b);
293 
  r = (int) v4i8_r;
294 
  s = (int) v4i8_s;
295 
  if (r != s)
296 
    abort ();
297 
 
298 
  q31_a = 0x12348678;
299 
  q31_b = 0x44445555;
300 
  if (little_endian)
301 
    v2q15_s = (v2q15) {0x4444, 0x1234};
302 
  else
303 
    v2q15_s = (v2q15) {0x1234, 0x4444};
304 
  v2q15_r = __builtin_mips_precrq_ph_w (q31_a, q31_b);
305 
  r = (int) v2q15_r;
306 
  s = (int) v2q15_s;
307 
  if (r != s)
308 
    abort ();
309 
 
310 
  q31_a = 0x12348678;
311 
  q31_b = 0x44445555;
312 
  if (little_endian)
313 
    v2q15_s = (v2q15) {0x4444, 0x1235};
314 
  else
315 
    v2q15_s = (v2q15) {0x1235, 0x4444};
316 
  v2q15_r = __builtin_mips_precrq_rs_ph_w (q31_a, q31_b);
317 
  r = (int) v2q15_r;
318 
  s = (int) v2q15_s;
319 
  if (r != s)
320 
    abort ();
321 
 
322 
  v2q15_a = (v2q15) {0x9999, 0x5612};
323 
  v2q15_b = (v2q15) {0x5612, 0x3333};
324 
  if (little_endian)
325 
    v4i8_s = (v4i8) {0xac, 0x66, 0x00, 0xac};
326 
  else
327 
    v4i8_s = (v4i8) {0x00, 0xac, 0xac, 0x66};
328 
  v4i8_r = __builtin_mips_precrqu_s_qb_ph (v2q15_a, v2q15_b);
329 
  r = (int) v4i8_r;
330 
  s = (int) v4i8_s;
331 
  if (r != s)
332 
    abort ();
333 
 
334 
  v2q15_a = (v2q15) {0x3589, 0x4444};
335 
  if (little_endian)
336 
    q31_s = 0x44440000;
337 
  else
338 
    q31_s = 0x35890000;
339 
  q31_r = __builtin_mips_preceq_w_phl (v2q15_a);
340 
  if (q31_r != q31_s)
341 
    abort ();
342 
 
343 
  v2q15_a = (v2q15) {0x3589, 0x4444};
344 
  if (little_endian)
345 
    q31_s = 0x35890000;
346 
  else
347 
    q31_s = 0x44440000;
348 
  q31_r = __builtin_mips_preceq_w_phr (v2q15_a);
349 
  if (q31_r != q31_s)
350 
    abort ();
351 
 
352 
  v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
353 
  if (little_endian)
354 
    v2q15_s = (v2q15) {0x2b00, 0x1980};
355 
  else
356 
    v2q15_s = (v2q15) {0x0900, 0x2b00};
357 
  v2q15_r = __builtin_mips_precequ_ph_qbl (v4i8_a);
358 
  r = (int) v2q15_r;
359 
  s = (int) v2q15_s;
360 
  if (r != s)
361 
    abort ();
362 
 
363 
  v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
364 
  if (little_endian)
365 
    v2q15_s = (v2q15) {0x0900, 0x2b00};
366 
  else
367 
    v2q15_s = (v2q15) {0x2b00, 0x1980};
368 
  v2q15_r = __builtin_mips_precequ_ph_qbr (v4i8_a);
369 
  r = (int) v2q15_r;
370 
  s = (int) v2q15_s;
371 
  if (r != s)
372 
    abort ();
373 
 
374 
  v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
375 
  if (little_endian)
376 
    v2q15_s = (v2q15) {0x2b00, 0x1980};
377 
  else
378 
    v2q15_s = (v2q15) {0x0900, 0x2b00};
379 
  v2q15_r = __builtin_mips_precequ_ph_qbla (v4i8_a);
380 
  r = (int) v2q15_r;
381 
  s = (int) v2q15_s;
382 
  if (r != s)
383 
    abort ();
384 
 
385 
  v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
386 
  if (little_endian)
387 
    v2q15_s = (v2q15) {0x0900, 0x2b00};
388 
  else
389 
    v2q15_s = (v2q15) {0x2b00, 0x1980};
390 
  v2q15_r = __builtin_mips_precequ_ph_qbra (v4i8_a);
391 
  r = (int) v2q15_r;
392 
  s = (int) v2q15_s;
393 
  if (r != s)
394 
    abort ();
395 
 
396 
  v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
397 
  if (little_endian)
398 
    v2q15_s = (v2q15) {0x56, 0x33};
399 
  else
400 
    v2q15_s = (v2q15) {0x12, 0x56};
401 
  v2q15_r = __builtin_mips_preceu_ph_qbl (v4i8_a);
402 
  r = (int) v2q15_r;
403 
  s = (int) v2q15_s;
404 
  if (r != s)
405 
    abort ();
406 
 
407 
  v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
408 
  if (little_endian)
409 
    v2q15_s = (v2q15) {0x12, 0x56};
410 
  else
411 
    v2q15_s = (v2q15) {0x56, 0x33};
412 
  v2q15_r = __builtin_mips_preceu_ph_qbr (v4i8_a);
413 
  r = (int) v2q15_r;
414 
  s = (int) v2q15_s;
415 
  if (r != s)
416 
    abort ();
417 
 
418 
  v4i8_a = (v4i8) {0x12, 0x99, 0x56, 0x33};
419 
  if (little_endian)
420 
    v2q15_s = (v2q15) {0x99, 0x33};
421 
  else
422 
    v2q15_s = (v2q15) {0x12, 0x56};
423 
  v2q15_r = __builtin_mips_preceu_ph_qbla (v4i8_a);
424 
  r = (int) v2q15_r;
425 
  s = (int) v2q15_s;
426 
  if (r != s)
427 
    abort ();
428 
 
429 
  v4i8_a = (v4i8) {0x12, 0x99, 0x56, 0x33};
430 
  if (little_endian)
431 
    v2q15_s = (v2q15) {0x12, 0x56};
432 
  else
433 
    v2q15_s = (v2q15) {0x99, 0x33};
434 
  v2q15_r = __builtin_mips_preceu_ph_qbra (v4i8_a);
435 
  r = (int) v2q15_r;
436 
  s = (int) v2q15_s;
437 
  if (r != s)
438 
    abort ();
439 
 
440 
  v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
441 
  v4i8_s = (v4i8) {0xc8, 0xd0, 0x58, 0xe0};
442 
  v4i8_r = __builtin_mips_shll_qb (v4i8_a, 2);
443 
  r = (int) v4i8_r;
444 
  s = (int) v4i8_s;
445 
  if (r != s)
446 
    abort ();
447 
 
448 
  v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
449 
  i32_b = 1;
450 
  v4i8_s = (v4i8) {0xe4, 0x68, 0xac, 0xf0};
451 
  v4i8_r = __builtin_mips_shll_qb (v4i8_a, i32_b);
452 
  r = (int) v4i8_r;
453 
  s = (int) v4i8_s;
454 
  if (r != s)
455 
    abort ();
456 
 
457 
  v2q15_a = (v2q15) {0x1234, 0x5678};
458 
  v2q15_s = (v2q15) {0x48d0, 0x59e0};
459 
  v2q15_r = __builtin_mips_shll_ph (v2q15_a, 2);
460 
  r = (int) v2q15_r;
461 
  s = (int) v2q15_s;
462 
  if (r != s)
463 
    abort ();
464 
 
465 
  v2q15_a = (v2q15) {0x1234, 0x5678};
466 
  i32_b = 1;
467 
  v2q15_s = (v2q15) {0x2468, 0xacf0};
468 
  v2q15_r = __builtin_mips_shll_ph (v2q15_a, i32_b);
469 
  r = (int) v2q15_r;
470 
  s = (int) v2q15_s;
471 
  if (r != s)
472 
    abort ();
473 
 
474 
  v2q15_a = (v2q15) {0x1234, 0x5678};
475 
  v2q15_s = (v2q15) {0x48d0, 0x7fff};
476 
  v2q15_r = __builtin_mips_shll_s_ph (v2q15_a, 2);
477 
  r = (int) v2q15_r;
478 
  s = (int) v2q15_s;
479 
  if (r != s)
480 
    abort ();
481 
 
482 
  v2q15_a = (v2q15) {0x1234, 0x5678};
483 
  i32_b = 1;
484 
  v2q15_s = (v2q15) {0x2468, 0x7fff};
485 
  v2q15_r = __builtin_mips_shll_s_ph (v2q15_a, i32_b);
486 
  r = (int) v2q15_r;
487 
  s = (int) v2q15_s;
488 
  if (r != s)
489 
    abort ();
490 
 
491 
  q31_a = 0x70000000;
492 
  q31_s = 0x7fffffff;
493 
  q31_r = __builtin_mips_shll_s_w (q31_a, 2);
494 
  if (q31_r != q31_s)
495 
    abort ();
496 
 
497 
  q31_a = 0x70000000;
498 
  i32_b = 1;
499 
  q31_s = 0x7fffffff;
500 
  q31_r = __builtin_mips_shll_s_w (q31_a, i32_b);
501 
  if (q31_r != q31_s)
502 
    abort ();
503 
 
504 
  v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
505 
  v4i8_s = (v4i8) {0x3c, 0xd, 0x15, 0x1e};
506 
  v4i8_r = __builtin_mips_shrl_qb (v4i8_a, 2);
507 
  r = (int) v4i8_r;
508 
  s = (int) v4i8_s;
509 
  if (r != s)
510 
    abort ();
511 
 
512 
  v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
513 
  i32_b = 1;
514 
  v4i8_s = (v4i8) {0x79, 0x1a, 0x2b, 0x3c};
515 
  v4i8_r = __builtin_mips_shrl_qb (v4i8_a, i32_b);
516 
  r = (int) v4i8_r;
517 
  s = (int) v4i8_s;
518 
  if (r != s)
519 
    abort ();
520 
 
521 
  v2q15_a = (v2q15) {0x1234, 0x5678};
522 
  v2q15_s = (v2q15) {0x48d, 0x159e};
523 
  v2q15_r = __builtin_mips_shra_ph (v2q15_a, 2);
524 
  r = (int) v2q15_r;
525 
  s = (int) v2q15_s;
526 
  if (r != s)
527 
    abort ();
528 
 
529 
  v2q15_a = (v2q15) {0x1234, 0x5678};
530 
  i32_b = 1;
531 
  v2q15_s = (v2q15) {0x91a, 0x2b3c};
532 
  v2q15_r = __builtin_mips_shra_ph (v2q15_a, i32_b);
533 
  r = (int) v2q15_r;
534 
  s = (int) v2q15_s;
535 
  if (r != s)
536 
    abort ();
537 
 
538 
  v2q15_a = (v2q15) {0x1234, 0x5678};
539 
  v2q15_s = (v2q15) {0x48d, 0x159e};
540 
  v2q15_r = __builtin_mips_shra_r_ph (v2q15_a, 2);
541 
  r = (int) v2q15_r;
542 
  s = (int) v2q15_s;
543 
  if (r != s)
544 
    abort ();
545 
 
546 
  v2q15_a = (v2q15) {0x1234, 0x5678};
547 
  i32_b = 3;
548 
  v2q15_s = (v2q15) {0x247, 0xacf};
549 
  v2q15_r = __builtin_mips_shra_r_ph (v2q15_a, i32_b);
550 
  r = (int) v2q15_r;
551 
  s = (int) v2q15_s;
552 
  if (r != s)
553 
    abort ();
554 
 
555 
  q31_a = 0x70000000;
556 
  q31_s = 0x1c000000;
557 
  q31_r = __builtin_mips_shra_r_w (q31_a, 2);
558 
  if (q31_r != q31_s)
559 
    abort ();
560 
 
561 
  q31_a = 0x70000004;
562 
  i32_b = 3;
563 
  q31_s = 0x0e000001;
564 
  q31_r = __builtin_mips_shra_r_w (q31_a, i32_b);
565 
  if (q31_r != q31_s)
566 
    abort ();
567 
 
568 
  v4i8_a = (v4i8) {0x1, 0x2, 0x3, 0x4};
569 
  v2q15_b = (v2q15) {0x6f89, 0x1111};
570 
  if (little_endian)
571 
    v2q15_s = (v2q15) {0xffff, 0x4444};
572 
  else
573 
    v2q15_s = (v2q15) {0x6f89, 0x2222};
574 
  v2q15_r = __builtin_mips_muleu_s_ph_qbl (v4i8_a, v2q15_b);
575 
  r = (int) v2q15_r;
576 
  s = (int) v2q15_s;
577 
  if (r != s)
578 
    abort ();
579 
 
580 
  v4i8_a = (v4i8) {0x1, 0x2, 0x3, 0x4};
581 
  v2q15_b = (v2q15) {0x6f89, 0x1111};
582 
  if (little_endian)
583 
    v2q15_s = (v2q15) {0x6f89, 0x2222};
584 
  else
585 
    v2q15_s = (v2q15) {0xffff, 0x4444};
586 
  v2q15_r = __builtin_mips_muleu_s_ph_qbr (v4i8_a, v2q15_b);
587 
  r = (int) v2q15_r;
588 
  s = (int) v2q15_s;
589 
  if (r != s)
590 
    abort ();
591 
 
592 
  v2q15_a = (v2q15) {0x1234, 0x5678};
593 
  v2q15_b = (v2q15) {0x6f89, 0x1111};
594 
  v2q15_s = (v2q15) {0x0fdd, 0x0b87};
595 
  v2q15_r = __builtin_mips_mulq_rs_ph (v2q15_a, v2q15_b);
596 
  r = (int) v2q15_r;
597 
  s = (int) v2q15_s;
598 
  if (r != s)
599 
    abort ();
600 
 
601 
  v2q15_a = (v2q15) {0x8000, 0x8000};
602 
  v2q15_b = (v2q15) {0x8000, 0x8000};
603 
  q31_s = 0x7fffffff;
604 
  q31_r = __builtin_mips_muleq_s_w_phl (v2q15_a, v2q15_b);
605 
  if (q31_r != q31_s)
606 
    abort ();
607 
 
608 
  v2q15_a = (v2q15) {0x8000, 0x8000};
609 
  v2q15_b = (v2q15) {0x8000, 0x8000};
610 
  q31_s = 0x7fffffff;
611 
  q31_r = __builtin_mips_muleq_s_w_phr (v2q15_a, v2q15_b);
612 
  if (q31_r != q31_s)
613 
    abort ();
614 
 
615 
#ifndef __mips64
616 
  a64_a = 0x22221111;
617 
  v4i8_b = (v4i8) {0x12, 0x34, 0x56, 0x78};
618 
  v4i8_c = (v4i8) {0xaa, 0x89, 0x11, 0x34};
619 
  if (little_endian)
620 
    a64_s = 0x22222f27;
621 
  else
622 
    a64_s = 0x222238d9;
623 
  a64_r = __builtin_mips_dpau_h_qbl (a64_a, v4i8_b, v4i8_c);
624 
  if (a64_r != a64_s)
625 
    abort ();
626 
 
627 
  a64_a = 0x22221111;
628 
  v4i8_b = (v4i8) {0x12, 0x34, 0x56, 0x78};
629 
  v4i8_c = (v4i8) {0xaa, 0x89, 0x11, 0x34};
630 
  if (little_endian)
631 
    a64_s = 0x222238d9;
632 
  else
633 
    a64_s = 0x22222f27;
634 
  a64_r = __builtin_mips_dpau_h_qbr (a64_a, v4i8_b, v4i8_c);
635 
  if (a64_r != a64_s)
636 
    abort ();
637 
 
638 
  a64_a = 0x22221111;
639 
  v4i8_b = (v4i8) {0x12, 0x34, 0x56, 0x78};
640 
  v4i8_c = (v4i8) {0xaa, 0x89, 0x11, 0x34};
641 
  if (little_endian)
642 
    a64_s = 0x2221f2fb;
643 
  else
644 
    a64_s = 0x2221e949;
645 
  a64_r = __builtin_mips_dpsu_h_qbl (a64_a, v4i8_b, v4i8_c);
646 
  if (a64_r != a64_s)
647 
    abort ();
648 
 
649 
  a64_a = 0x22221111;
650 
  v4i8_b = (v4i8) {0x12, 0x34, 0x56, 0x78};
651 
  v4i8_c = (v4i8) {0xaa, 0x89, 0x11, 0x34};
652 
  if (little_endian)
653 
    a64_s = 0x2221e949;
654 
  else
655 
    a64_s = 0x2221f2fb;
656 
  a64_r = __builtin_mips_dpsu_h_qbr (a64_a, v4i8_b, v4i8_c);
657 
  if (a64_r != a64_s)
658 
    abort ();
659 
 
660 
  a64_a = 0x00001111;
661 
  v2q15_b = (v2q15) {0x8000, 0x5678};
662 
  v2q15_c = (v2q15) {0x8000, 0x1111};
663 
  a64_s = 0x8b877d00;
664 
  a64_r = __builtin_mips_dpaq_s_w_ph (a64_a, v2q15_b, v2q15_c);
665 
  if (a64_r != a64_s)
666 
    abort ();
667 
 
668 
  a64_a = 0x00001111;
669 
  v2q15_b = (v2q15) {0x8000, 0x5678};
670 
  v2q15_c = (v2q15) {0x8000, 0x1111};
671 
  a64_s = 0xffffffff7478a522LL;
672 
  a64_r = __builtin_mips_dpsq_s_w_ph (a64_a, v2q15_b, v2q15_c);
673 
  if (a64_r != a64_s)
674 
    abort ();
675 
 
676 
  a64_a = 0x00001111;
677 
  v2q15_b = (v2q15) {0x8000, 0x5678};
678 
  v2q15_c = (v2q15) {0x8000, 0x1111};
679 
  if (little_endian)
680 
    a64_s = 0xffffffff8b877d02LL;
681 
  else
682 
    a64_s = 0x7478a520;
683 
  a64_r = __builtin_mips_mulsaq_s_w_ph (a64_a, v2q15_b, v2q15_c);
684 
  if (a64_r != a64_s)
685 
    abort ();
686 
 
687 
  a64_a = 0x00001111;
688 
  q31_b = 0x80000000;
689 
  q31_c = 0x80000000;
690 
  a64_s = 0x7fffffffffffffffLL;
691 
  a64_r = __builtin_mips_dpaq_sa_l_w (a64_a, q31_b, q31_c);
692 
  if (a64_r != a64_s)
693 
    abort ();
694 
 
695 
  a64_a = 0x00001111;
696 
  q31_b = 0x80000000;
697 
  q31_c = 0x80000000;
698 
  a64_s = 0x8000000000001112LL;
699 
  a64_r = __builtin_mips_dpsq_sa_l_w (a64_a, q31_b, q31_c);
700 
  if (a64_r != a64_s)
701 
    abort ();
702 
 
703 
  a64_a = 0x00001111;
704 
  v2q15_b = (v2q15) {0x8000, 0x1};
705 
  v2q15_c = (v2q15) {0x8000, 0x2};
706 
  if (little_endian)
707 
    a64_s = 0x1115;
708 
  else
709 
    a64_s = 0x80001110;
710 
  a64_r = __builtin_mips_maq_s_w_phl (a64_a, v2q15_b, v2q15_c);
711 
  if (a64_r != a64_s)
712 
    abort ();
713 
 
714 
  a64_a = 0x00001111;
715 
  v2q15_b = (v2q15) {0x8000, 0x1};
716 
  v2q15_c = (v2q15) {0x8000, 0x2};
717 
  if (little_endian)
718 
    a64_s = 0x80001110;
719 
  else
720 
    a64_s = 0x1115;
721 
  a64_r = __builtin_mips_maq_s_w_phr (a64_a, v2q15_b, v2q15_c);
722 
  if (a64_r != a64_s)
723 
    abort ();
724 
 
725 
  a64_a = 0x00001111;
726 
  v2q15_b = (v2q15) {0x8000, 0x1};
727 
  v2q15_c = (v2q15) {0x8000, 0x2};
728 
  if (little_endian)
729 
    a64_s = 0x1115;
730 
  else
731 
    a64_s = 0x7fffffff;
732 
  a64_r = __builtin_mips_maq_sa_w_phl (a64_a, v2q15_b, v2q15_c);
733 
  if (a64_r != a64_s)
734 
    abort ();
735 
 
736 
  a64_a = 0x00001111;
737 
  v2q15_b = (v2q15) {0x8000, 0x1};
738 
  v2q15_c = (v2q15) {0x8000, 0x2};
739 
  if (little_endian)
740 
    a64_s = 0x7fffffff;
741 
  else
742 
    a64_s = 0x1115;
743 
  a64_r = __builtin_mips_maq_sa_w_phr (a64_a, v2q15_b, v2q15_c);
744 
  if (a64_r != a64_s)
745 
    abort ();
746 
#endif
747 
 
748 
  i32_a = 0x12345678;
749 
  i32_s = 0x00001e6a;
750 
  i32_r = __builtin_mips_bitrev (i32_a);
751 
  if (i32_r != i32_s)
752 
    abort ();
753 
 
754 
  i32_a = 0x00000208; // pos is 8, size is 4
755 
  __builtin_mips_wrdsp (i32_a, 31);
756 
  i32_a = 0x12345678;
757 
  i32_b = 0x87654321;
758 
  i32_s = 0x12345178;
759 
  i32_r = __builtin_mips_insv (i32_a, i32_b);
760 
  if (i32_r != i32_s)
761 
    abort ();
762 
 
763 
  v4i8_s = (v4i8) {1, 1, 1, 1};
764 
  v4i8_r = __builtin_mips_repl_qb (1);
765 
  r = (int) v4i8_r;
766 
  s = (int) v4i8_s;
767 
  if (r != s)
768 
    abort ();
769 
 
770 
  i32_a = 99;
771 
  v4i8_s = (v4i8) {99, 99, 99, 99};
772 
  v4i8_r = __builtin_mips_repl_qb (i32_a);
773 
  r = (int) v4i8_r;
774 
  s = (int) v4i8_s;
775 
  if (r != s)
776 
    abort ();
777 
 
778 
  v2q15_s = (v2q15) {30, 30};
779 
  v2q15_r = __builtin_mips_repl_ph (30);
780 
  r = (int) v2q15_r;
781 
  s = (int) v2q15_s;
782 
  if (r != s)
783 
    abort ();
784 
 
785 
  i32_a = 0x5612;
786 
  v2q15_s = (v2q15) {0x5612, 0x5612};
787 
  v2q15_r = __builtin_mips_repl_ph (i32_a);
788 
  r = (int) v2q15_r;
789 
  s = (int) v2q15_s;
790 
  if (r != s)
791 
    abort ();
792 
 
793 
  v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
794 
  v4i8_b = (v4i8) {0x12, 0x34, 0x78, 0x56};
795 
  if (little_endian)
796 
    i32_s = 0x03000000;
797 
  else
798 
    i32_s = 0x0c000000;
799 
  __builtin_mips_cmpu_eq_qb (v4i8_a, v4i8_b);
800 
  i32_r = __builtin_mips_rddsp (16);
801 
  if (i32_r != i32_s)
802 
    abort ();
803 
 
804 
  v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
805 
  v4i8_b = (v4i8) {0x12, 0x34, 0x78, 0x56};
806 
  if (little_endian)
807 
    i32_s = 0x04000000;
808 
  else
809 
    i32_s = 0x02000000;
810 
  __builtin_mips_cmpu_lt_qb (v4i8_a, v4i8_b);
811 
  i32_r = __builtin_mips_rddsp (16);
812 
  if (i32_r != i32_s)
813 
    abort ();
814 
 
815 
  v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
816 
  v4i8_b = (v4i8) {0x12, 0x34, 0x78, 0x56};
817 
  if (little_endian)
818 
    i32_s = 0x07000000;
819 
  else
820 
    i32_s = 0x0e000000;
821 
  __builtin_mips_cmpu_le_qb (v4i8_a, v4i8_b);
822 
  i32_r = __builtin_mips_rddsp (16);
823 
  if (i32_r != i32_s)
824 
    abort ();
825 
 
826 
  v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
827 
  v4i8_b = (v4i8) {0x12, 0x34, 0x78, 0x56};
828 
  if (little_endian)
829 
    i32_s = 0x3;
830 
  else
831 
    i32_s = 0xc;
832 
  i32_r=__builtin_mips_cmpgu_eq_qb (v4i8_a, v4i8_b);
833 
  if (i32_r != i32_s)
834 
    abort ();
835 
 
836 
  v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
837 
  v4i8_b = (v4i8) {0x12, 0x34, 0x78, 0x56};
838 
  if (little_endian)
839 
    i32_s = 0x4;
840 
  else
841 
    i32_s = 0x2;
842 
  i32_r = __builtin_mips_cmpgu_lt_qb (v4i8_a, v4i8_b);
843 
  if (i32_r != i32_s)
844 
    abort ();
845 
 
846 
  v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
847 
  v4i8_b = (v4i8) {0x12, 0x34, 0x78, 0x56};
848 
  if (little_endian)
849 
    i32_s = 0x7;
850 
  else
851 
    i32_s = 0xe;
852 
  i32_r = __builtin_mips_cmpgu_le_qb (v4i8_a, v4i8_b);
853 
  if (i32_r != i32_s)
854 
    abort ();
855 
 
856 
  __builtin_mips_wrdsp (0,31); // Clear all condition code bits.
857 
  v2q15_a = (v2q15) {0x1234, 0x5678};
858 
  v2q15_b = (v2q15) {0x1234, 0x7856};
859 
  if (little_endian)
860 
    i32_s = 0x01000000;
861 
  else
862 
    i32_s = 0x02000000;
863 
  __builtin_mips_cmp_eq_ph (v2q15_a, v2q15_b);
864 
  i32_r = __builtin_mips_rddsp (16);
865 
  if (i32_r != i32_s)
866 
    abort ();
867 
 
868 
  v2q15_a = (v2q15) {0x1234, 0x5678};
869 
  v2q15_b = (v2q15) {0x1234, 0x7856};
870 
  if (little_endian)
871 
    i32_s = 0x02000000;
872 
  else
873 
    i32_s = 0x01000000;
874 
  __builtin_mips_cmp_lt_ph (v2q15_a, v2q15_b);
875 
  i32_r = __builtin_mips_rddsp (16);
876 
  if (i32_r != i32_s)
877 
    abort ();
878 
 
879 
  v2q15_a = (v2q15) {0x1234, 0x5678};
880 
  v2q15_b = (v2q15) {0x1234, 0x7856};
881 
  i32_s = 0x03000000;
882 
  __builtin_mips_cmp_le_ph (v2q15_a, v2q15_b);
883 
  i32_r = __builtin_mips_rddsp (16);
884 
  if (i32_r != i32_s)
885 
    abort ();
886 
 
887 
  i32_a = 0x0a000000; // cc: 0000 1010
888 
  __builtin_mips_wrdsp (i32_a, 31);
889 
  v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
890 
  v4i8_b = (v4i8) {0x21, 0x43, 0x65, 0x87};
891 
  if (little_endian)
892 
    v4i8_s = (v4i8) {0x21, 0x34, 0x65, 0x78};
893 
  else
894 
    v4i8_s = (v4i8) {0x12, 0x43, 0x56, 0x87};
895 
  v4i8_r = __builtin_mips_pick_qb (v4i8_a, v4i8_b);
896 
  r = (int) v4i8_r;
897 
  s = (int) v4i8_s;
898 
  if (r != s)
899 
    abort ();
900 
 
901 
  i32_a = 0x02000000; // cc: 0000 0010
902 
  __builtin_mips_wrdsp (i32_a, 31);
903 
  v2q15_a = (v2q15) {0x1234, 0x5678};
904 
  v2q15_b = (v2q15) {0x2143, 0x6587};
905 
  if (little_endian)
906 
    v2q15_s = (v2q15) {0x2143, 0x5678};
907 
  else
908 
    v2q15_s = (v2q15) {0x1234, 0x6587};
909 
  v2q15_r = __builtin_mips_pick_ph (v2q15_a, v2q15_b);
910 
  r = (int) v2q15_r;
911 
  s = (int) v2q15_s;
912 
  if (r != s)
913 
    abort ();
914 
 
915 
  v2q15_a = (v2q15) {0x1234, 0x5678};
916 
  v2q15_b = (v2q15) {0x1234, 0x7856};
917 
  if (little_endian)
918 
    v2q15_s = (v2q15) {0x7856, 0x1234};
919 
  else
920 
    v2q15_s = (v2q15) {0x5678, 0x1234};
921 
  v2q15_r = __builtin_mips_packrl_ph (v2q15_a, v2q15_b);
922 
  r = (int) v2q15_r;
923 
  s = (int) v2q15_s;
924 
  if (r != s)
925 
    abort ();
926 
 
927 
#ifndef __mips64
928 
  a64_a = 0x1234567887654321LL;
929 
  i32_s = 0x88765432;
930 
  i32_r = __builtin_mips_extr_w (a64_a, 4);
931 
  if (i32_r != i32_s)
932 
    abort ();
933 
 
934 
  a64_a = 0x1234567887658321LL;
935 
  i32_s = 0x56788766;
936 
  i32_r = __builtin_mips_extr_r_w (a64_a, 16);
937 
  if (i32_r != i32_s)
938 
    abort ();
939 
 
940 
  a64_a = 0x12345677fffffff8LL;
941 
  i32_s = 0x7fffffff;
942 
  i32_r = __builtin_mips_extr_rs_w (a64_a, 4);
943 
  if (i32_r != i32_s)
944 
    abort ();
945 
 
946 
  a64_a = 0x1234567887658321LL;
947 
  i32_s = 0x7fff;
948 
  i32_r = __builtin_mips_extr_s_h (a64_a, 16);
949 
  if (i32_r != i32_s)
950 
    abort ();
951 
 
952 
  a64_a = 0x0000007887658321LL;
953 
  i32_b = 24;
954 
  i32_s = 0x7887;
955 
  i32_r = __builtin_mips_extr_s_h (a64_a, i32_b);
956 
  if (i32_r != i32_s)
957 
    abort ();
958 
 
959 
  a64_a = 0x1234567887654321LL;
960 
  i32_b = 4;
961 
  i32_s = 0x88765432;
962 
  i32_r = __builtin_mips_extr_w (a64_a, i32_b);
963 
  if (i32_r != i32_s)
964 
    abort ();
965 
 
966 
  a64_a = 0x1234567887658321LL;
967 
  i32_b = 16;
968 
  i32_s = 0x56788766;
969 
  i32_r = __builtin_mips_extr_r_w (a64_a, i32_b);
970 
  if (i32_r != i32_s)
971 
    abort ();
972 
 
973 
  a64_a = 0x12345677fffffff8LL;
974 
  i32_b = 4;
975 
  i32_s = 0x7fffffff;
976 
  i32_r = __builtin_mips_extr_rs_w (a64_a, i32_b);
977 
  if (i32_r != i32_s)
978 
    abort ();
979 
 
980 
  i32_a = 0x0000021f; // pos is 31
981 
  __builtin_mips_wrdsp (i32_a, 31);
982 
  a64_a = 0x1234567887654321LL;
983 
  i32_s = 8;
984 
  i32_r = __builtin_mips_extp (a64_a, 3); // extract 4 bits
985 
  if (i32_r != i32_s)
986 
    abort ();
987 
 
988 
  i32_a = 0x0000021f; // pos is 31
989 
  __builtin_mips_wrdsp (i32_a, 31);
990 
  a64_a = 0x1234567887654321LL;
991 
  i32_b = 7; // size is 8. NOTE!! we should use 7
992 
  i32_s = 0x87;
993 
  i32_r = __builtin_mips_extp (a64_a, i32_b);
994 
  if (i32_r != i32_s)
995 
    abort ();
996 
 
997 
  i32_a = 0x0000021f; // pos is 31
998 
  __builtin_mips_wrdsp (i32_a, 31);
999 
  a64_a = 0x1234567887654321LL;
1000 
  i32_s = 8;
1001 
  i32_r = __builtin_mips_extpdp (a64_a, 3); // extract 4 bits
1002 
  if (i32_r != i32_s)
1003 
    abort ();
1004 
 
1005 
  i32_s = 0x0000021b; // pos is 27
1006 
  i32_r = __builtin_mips_rddsp (31);
1007 
  if (i32_r != i32_s)
1008 
    abort ();
1009 
 
1010 
  i32_a = 0x0000021f; // pos is 31
1011 
  __builtin_mips_wrdsp (i32_a, 31);
1012 
  a64_a = 0x1234567887654321LL;
1013 
  i32_b = 11; // size is 12. NOTE!!! We should use 11
1014 
  i32_s = 0x876;
1015 
  i32_r = __builtin_mips_extpdp (a64_a, i32_b);
1016 
  if (i32_r != i32_s)
1017 
    abort ();
1018 
 
1019 
  i32_s = 0x00000213; // pos is 19
1020 
  i32_r = __builtin_mips_rddsp (31);
1021 
  if (i32_r != i32_s)
1022 
    abort ();
1023 
 
1024 
  a64_a = 0x1234567887654321LL;
1025 
  a64_s = 0x0012345678876543LL;
1026 
  a64_r = __builtin_mips_shilo (a64_a, 8);
1027 
  if (a64_r != a64_s)
1028 
    abort ();
1029 
 
1030 
  a64_a = 0x1234567887654321LL;
1031 
  i32_b = -16;
1032 
  a64_s = 0x5678876543210000LL;
1033 
  a64_r = __builtin_mips_shilo (a64_a, i32_b);
1034 
  if (a64_r != a64_s)
1035 
    abort ();
1036 
 
1037 
  i32_a = 0x0;
1038 
  __builtin_mips_wrdsp (i32_a, 31);
1039 
  a64_a = 0x1234567887654321LL;
1040 
  i32_b = 0x11112222;
1041 
  a64_s = 0x8765432111112222LL;
1042 
  a64_r = __builtin_mips_mthlip (a64_a, i32_b);
1043 
  if (a64_r != a64_s)
1044 
    abort ();
1045 
  i32_s = 32;
1046 
  i32_r = __builtin_mips_rddsp (31);
1047 
  if (i32_r != i32_s)
1048 
    abort ();
1049 
#endif
1050 
 
1051 
  i32_a = 0x1357a468;
1052 
  __builtin_mips_wrdsp (i32_a, 63);
1053 
  i32_s = 0x03572428;
1054 
  i32_r = __builtin_mips_rddsp (63);
1055 
  if (i32_r != i32_s)
1056 
    abort ();
1057 
 
1058 
  ptr_a = &array;
1059 
  i32_b = 37;
1060 
  i32_s = 37;
1061 
  i32_r = __builtin_mips_lbux (ptr_a, i32_b);
1062 
  if (i32_r != i32_s)
1063 
    abort ();
1064 
 
1065 
  ptr_a = &array;
1066 
  i32_b = 38;
1067 
  if (little_endian)
1068 
    i32_s = 0x2726;
1069 
  else
1070 
    i32_s = 0x2627;
1071 
  i32_r = __builtin_mips_lhx (ptr_a, i32_b);
1072 
  if (i32_r != i32_s)
1073 
    abort ();
1074 
 
1075 
  ptr_a = &array;
1076 
  i32_b = 40;
1077 
  if (little_endian)
1078 
    i32_s = 0x2b2a2928;
1079 
  else
1080 
    i32_s = 0x28292a2b;
1081 
  i32_r = __builtin_mips_lwx (ptr_a, i32_b);
1082 
  if (i32_r != i32_s)
1083 
    abort ();
1084 
 
1085 
  i32_a = 0x00000220; // pos is 32, size is 4
1086 
  __builtin_mips_wrdsp (i32_a, 63);
1087 
  i32_s = 1;
1088 
  i32_r = __builtin_mips_bposge32 ();
1089 
  if (i32_r != i32_s)
1090 
    abort ();
1091 
}
1092 
 

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