OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [mips/] [msubu-1.c] - Blame information for rev 327

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 321 jeremybenn
/* { dg-do compile } */
2
/* { dg-options "-O2 -march=vr5400 -mgp32" } */
3
/* { dg-final { scan-assembler-times "\tmsacu\t\\\$0," 2 } } */
4
 
5
typedef unsigned int ui;
6
typedef unsigned long long ull;
7
 
8
NOMIPS16 ull
9
f1 (ui x, ui y, ull z)
10
{
11
  return z - (ull) y * x;
12
}
13
 
14
NOMIPS16 ull
15
f2 (ui x, ui y, ull z)
16
{
17
  ull t = (ull) x * y;
18
  int temp = 5;
19
  if (temp == 5)
20
    z -= t;
21
  return z;
22
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.