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[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [mips/] [r10k-cache-barrier-10.c] - Blame information for rev 321

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1 321 jeremybenn
/* { dg-options "-O2 -mr10k-cache-barrier=store -mips4 -mbranch-likely -mno-abicalls" } */
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int bar (int);
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/* Test that code after a branch-likely does not get an unnecessary
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   cache barrier.  */
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NOMIPS16 void
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foo (int n, int *x)
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{
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  do
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    n = bar (n * 4 + 1);
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  while (n);
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  /* The preceding branch should be a branch likely, with the shift as
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     its delay slot.  We therefore don't need a cache barrier here.  */
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  x[0] = 0;
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}
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/* { dg-final { scan-assembler-not "\tcache\t" } } */

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