OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [mips/] [r10k-cache-barrier-8.c] - Blame information for rev 321

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 321 jeremybenn
/* { dg-options "-O2 -mr10k-cache-barrier=store -G8" } */
2
 
3
/* Test that in-range stores to components of static objects
4
   do not get an unnecessary cache barrier.  */
5
 
6
struct { struct { char i[4]; } a; struct { char j[4]; } b; } s;
7
 
8
NOMIPS16 void
9
foo (int sel)
10
{
11
  s.a.i[0] = 1;
12
  s.b.j[3] = 100;
13
}
14
 
15
/* { dg-final { scan-assembler-not "\tcache\t" } } */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.