URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [powerpc/] [440-mullhw-1.c] - Blame information for rev 327

Go to most recent revision | Details | Compare with Previous | View Log


/* Test generation of mullhw on 440.  */
/* Origin: Joseph Myers <joseph@codesourcery.com> */
/* { dg-do compile } */
/* { dg-require-effective-target ilp32 } */
/* { dg-options "-O2 -mcpu=440" } */
 
/* { dg-final { scan-assembler "mullhw " } } */
 
int
f(int b, int c)
{
  int a = (short)b * (short)c;
  return a;
}

Line No.	Rev	Author	Line
1	322	jeremybenn	`/* Test generation of mullhw on 440. */`
2			`/* Origin: Joseph Myers <joseph@codesourcery.com> */`
3			`/* { dg-do compile } */`
4			`/* { dg-require-effective-target ilp32 } */`
5			`/* { dg-options "-O2 -mcpu=440" } */`
6
7			`/* { dg-final { scan-assembler "mullhw " } } */`
8
9			`int`
10			`f(int b, int c)`
11			`{`
12			`int a = (short)b * (short)c;`
13			`return a;`
14			`}`

Browse

Tools

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [powerpc/] [440-mullhw-1.c] - Blame information for rev 327