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[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [powerpc/] [altivec-cell-7.c] - Blame information for rev 322

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Line No. Rev Author Line
1 322 jeremybenn
/* { dg-do compile  } */
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/* { dg-require-effective-target powerpc_altivec_ok } */
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/* { dg-options "-O2 -maltivec -mabi=altivec -mcpu=cell" } */
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/* { dg-final { scan-assembler-times "vor" 2 } } */
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#include <altivec.h>
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/* Make sure that lvlx and lvrx are not combined into one insn and
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   we still get a vor. */
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vector unsigned char
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lvx_float (long off, float *p)
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{
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    vector unsigned char l, r;
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    l = (vector unsigned char) vec_lvlx (off, p);
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    r = (vector unsigned char) vec_lvrx (off, p);
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    return vec_or(l, r);
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}
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vector unsigned char
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lvxl_float (long off, float *p)
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{
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    vector unsigned char l, r;
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    l = (vector unsigned char) vec_lvlxl (off, p);
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    r = (vector unsigned char) vec_lvrxl (off, p);
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    return vec_or(l, r);
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}

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