OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [powerpc/] [bswap32.c] - Blame information for rev 322

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 322 jeremybenn
/* { dg-do compile { target { powerpc*-*-* } } } */
2
/* { dg-options "-O2" } */
3
/* { dg-final { scan-assembler "lwbrx" } } */
4
/* { dg-final { scan-assembler "stwbrx" } } */
5
 
6
unsigned int ui;
7
unsigned int load_bswap32 (unsigned int *p) { return __builtin_bswap32 (*p); }
8
void store_bswap32 (unsigned int a) { ui = __builtin_bswap32 (a); }

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.