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Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [sparc/] [fpmul.c] - Blame information for rev 326

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Line No. Rev Author Line
1 326 jeremybenn 
/* { dg-do compile } */
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/* { dg-options "-mcpu=ultrasparc -mvis" } */
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typedef int vec32 __attribute__((vector_size(8)));
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typedef short vec16 __attribute__((vector_size(8)));
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typedef unsigned char pixel __attribute__((vector_size(4)));
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typedef short pixel16 __attribute__((vector_size(4)));
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typedef unsigned char vec8 __attribute__((vector_size(8)));
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vec16 foo1 (pixel a, vec16 b) {
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  return __builtin_vis_fmul8x16 (a, b);
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}
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vec16 foo2 (pixel a, pixel16 b) {
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  return __builtin_vis_fmul8x16au (a, b);
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}
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vec16 foo3 (pixel a, pixel16 b) {
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  return __builtin_vis_fmul8x16al (a, b);
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}
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vec16 foo4 (vec8 a, vec16 b) {
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  return __builtin_vis_fmul8sux16 (a, b);
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}
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vec16 foo5 (vec8 a, vec16 b) {
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  return __builtin_vis_fmul8ulx16 (a, b);
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}
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vec32 foo6 (pixel a, pixel16 b) {
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  return __builtin_vis_fmuld8sux16 (a, b);
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}
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vec32 foo7 (pixel a, pixel16 b) {
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  return __builtin_vis_fmuld8ulx16 (a, b);
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}
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/* { dg-final { scan-assembler "fmul8x16\t%" } } */
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/* { dg-final { scan-assembler "fmul8x16au\t%" } } */
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/* { dg-final { scan-assembler "fmul8x16al\t%" } } */
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/* { dg-final { scan-assembler "fmul8sux16\t%" } } */
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/* { dg-final { scan-assembler "fmul8ulx16\t%" } } */
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/* { dg-final { scan-assembler "fmuld8sux16\t%" } } */
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/* { dg-final { scan-assembler "fmuld8ulx16\t%" } } */

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