OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [x86_64/] [abi/] [callabi/] [vaarg-5b.c] - Blame information for rev 328

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 328 jeremybenn
/* Test for cross x86_64<->w64 abi va_list calls.  */
2
/* { dg-options "-O2 -mabi=ms -std=gnu99 -fno-builtin" } */
3
 
4
#include <stdarg.h>
5
 
6
#define SZ_ARGS 1ll,2ll,3ll,4ll,5ll,6ll,7ll,0ll
7
 
8
static int __attribute__ ((sysv_abi))
9
fct1 (va_list argp, ...)
10
{
11
  long long p1,p2;
12
  int ret = 1;
13
  __builtin_sysv_va_list argp_2;
14
 
15
  __builtin_sysv_va_start (argp_2, argp);
16
  do {
17
    p1 = va_arg (argp_2, long long);
18
    p2 = va_arg (argp, long long);
19
    if (p1 != p2)
20
      ret = 0;
21
  } while (ret && p1 != 0);
22
  __builtin_sysv_va_end (argp_2);
23
 
24
  return ret;
25
}
26
 
27
int
28
fct2 (int dummy, ...)
29
{
30
  va_list argp;
31
  int ret = dummy;
32
 
33
  va_start (argp, dummy);
34
  ret += fct1 (argp, SZ_ARGS);
35
  va_end (argp);
36
  return ret;
37
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.