OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [libgomp/] [testsuite/] [libgomp.c/] [debug-1.c] - Blame information for rev 280

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 273 jeremybenn 
/* PR debug/36617 */
2 
/* { dg-do run } */
3 
/* { dg-options "-g -fopenmp -O0" } */
4 
 
5 
int
6 
f1 (void)
7 
{
8 
  int v1i, v1j, v1k, v1l = 0;
9 
  v1i = 6;
10 
  v1j = 8;
11 
  #pragma omp parallel private (v1k) firstprivate (v1j) shared (v1i) reduction (+:v1l)
12 
  {
13 
    v1k = v1i + v1j;
14 
    {
15 
      int v1m = 1;
16 
      v1l = v1m;
17 
    }
18 
  }
19 
  return v1l;
20 
}
21 
 
22 
int v2k = 9;
23 
 
24 
int
25 
f2 (void)
26 
{
27 
  int v2i = 6, v2j = 7;
28 
  #pragma omp single private (v2i) firstprivate (v2k)
29 
  {
30 
    int v2l = v2j + v2k;
31 
    v2i = 8;
32 
    v2k = 10;
33 
    v2j = v2l + v2i;
34 
  }
35 
  return v2i + v2j;
36 
}
37 
 
38 
int
39 
f3 (void)
40 
{
41 
  int v3i = 6, v3j = 7, v3k = 9;
42 
  #pragma omp parallel
43 
  {
44 
    #pragma omp master
45 
      v3i++;
46 
    #pragma omp single private (v3i) firstprivate (v3k)
47 
    {
48 
      int v3l = v3j + v3k;
49 
      v3i = 8;
50 
      v3k = 10;
51 
      v3j = v3l + v3i;
52 
    }
53 
    #pragma omp atomic
54 
      v3k++;
55 
  }
56 
  return v3i + v3j;
57 
}
58 
 
59 
int v4k = 9, v4l = 0;
60 
 
61 
int
62 
f4 (void)
63 
{
64 
  int v4i = 6, v4j = 7, v4n = 0;
65 
  #pragma omp sections private (v4i) firstprivate (v4k) reduction (+:v4l)
66 
  {
67 
    #pragma omp section
68 
    {
69 
      int v4m = v4j + v4k;
70 
      v4i = 8;
71 
      v4k = 10;
72 
      v4l++;
73 
      v4n = v4m + v4i;
74 
    }
75 
    #pragma omp section
76 
    {
77 
      int v4o = v4j + v4k;
78 
      v4i = 10;
79 
      v4k = 11;
80 
      v4l++;
81 
    }
82 
  }
83 
  return v4i + v4j + v4l + v4n;
84 
}
85 
 
86 
int
87 
f5 (void)
88 
{
89 
  int v5i = 6, v5j = 7, v5k = 9, v5l = 0, v5n = 0, v5p = 0;
90 
  #pragma omp parallel
91 
  {
92 
    #pragma omp master
93 
      v5p++;
94 
    #pragma omp sections private (v5i) firstprivate (v5k) reduction (+:v5l)
95 
    {
96 
      #pragma omp section
97 
      {
98 
        int v5m = v5j + v5k;
99 
        v5i = 8;
100 
        v5k = 10;
101 
        v5l++;
102 
        v5n = v5m + v5i;
103 
      }
104 
      #pragma omp section
105 
      {
106 
        int v5o = v5j + v5k;
107 
        v5i = 10;
108 
        v5k = 11;
109 
        v5l++;
110 
      }
111 
    }
112 
  }
113 
  return v5i + v5j + v5l + v5n + v5p;
114 
}
115 
 
116 
int v6k = 9, v6l = 0;
117 
 
118 
int
119 
f6 (void)
120 
{
121 
  int v6i = 6, v6j = 7, v6n = 0;
122 
  #pragma omp for private (v6i) firstprivate (v6k) reduction (+:v6l)
123 
  for (v6n = 0; v6n < 3; v6n++)
124 
    {
125 
      int v6m = v6j + v6k;
126 
      v6i = 8;
127 
      v6l++;
128 
    }
129 
  return v6i + v6j + v6k + v6l + v6n;
130 
}
131 
 
132 
int
133 
f7 (void)
134 
{
135 
  int v7i = 6, v7j = 7, v7k = 9, v7l = 0, v7n = 0, v7o = 1;
136 
  #pragma omp parallel
137 
  {
138 
    #pragma omp master
139 
      v7o++;
140 
    #pragma omp for private (v7i) firstprivate (v7k) reduction (+:v7l)
141 
    for (v7n = 0; v7n < 3; v7n++)
142 
      {
143 
        int v7m = v7j + v7k;
144 
        v7i = 8;
145 
        v7l++;
146 
      }
147 
  }
148 
  return v7i + v7j + v7k + v7l + v7n;
149 
}
150 
 
151 
int
152 
main (void)
153 
{
154 
  f1 ();
155 
  f2 ();
156 
  f3 ();
157 
  f4 ();
158 
  f5 ();
159 
  f6 ();
160 
  f7 ();
161 
  return 0;
162 
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.