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jeremybenn |
\input texinfo @c -*-texinfo-*-
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@c Copyright (C) 2008 Embecosm Limited
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@c
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@c %**start of header
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@c makeinfo ignores cmds prev to setfilename, so its arg cannot make use
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@c of @set vars. However, you can override filename with makeinfo -o.
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@setfilename or1k.info
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@c
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@include gdb-cfg.texi
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@c
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@settitle Debugging the OpenRISC 1000 with @value{GDBN}
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@setchapternewpage odd
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@c %**end of header
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@iftex
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@c @smallbook
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@c @cropmarks
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@end iftex
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@finalout
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@syncodeindex ky cp
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@c readline appendices use @vindex, @findex and @ftable,
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@c annotate.texi and gdbmi use @findex.
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@syncodeindex vr cp
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@syncodeindex fn cp
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@c !!set manual's edition!
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@set EDITION Second
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@c !!set GDB edit command default editor
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@set EDITOR /bin/ex
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@c THIS MANUAL REQUIRES TEXINFO 4.0 OR LATER.
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@c This is a dir.info fragment to support semi-automated addition of
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@c manuals to an info tree.
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@dircategory Software development
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@direntry
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* Gdb for OpenRISC 1000: (gdb for Or1K). The GNU debugger for OpenRISC 1000.
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@end direntry
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@ifinfo
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This file documents the @sc{gnu} debugger @value{GDBN} when used with
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OpenRISC 1000 processors.
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This is the @value{EDITION} Edition, of @cite{Debugging the OpenRISC 1000
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@value{GDBN}} for @value{GDBN}
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Version @value{GDBVN}.
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Copyright (C) 2008 Embecosm Limited
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Permission is granted to copy, distribute and/or modify this document
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under the terms of the GNU Free Documentation License, Version 3 or
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any later version published by the Free Software Foundation; with the
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Front-Cover Texts being ``Debugging the OpenRISC 1000 with GDB by
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Jeremy Bennett'' and with the Back-Cover Texts being ``You are free to
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copy and modify this Manual.''
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@end ifinfo
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@titlepage
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@title Debugging the OpenRISC 1000 with @value{GDBN}
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@subtitle Target Processor Manual
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@sp 1
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@subtitle @value{EDITION} Edition, for @value{GDBN} version @value{GDBVN}
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@author Jeremy Bennett, Embecosm Limited
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@page
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@tex
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{\parskip=0pt
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\hfill Please report bugs using the OpenCores tracker:\par
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\hfill @uref{www.opencores.org/ptracker.cgi/list/or1k}.\par
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\hfill {\it Debugging the OpenRISC 1000 with @value{GDBN}}\par
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\hfill \TeX{}info \texinfoversion\par
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}
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@end tex
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@vskip 0pt plus 1filll
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Copyright @copyright{} 2008
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Embecosm Limited.
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@sp 2
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Published by Embecosm Limited@*
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68 Hambledon Road
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Bournemouth BH7 6PJ, UK@*
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Permission is granted to copy, distribute and/or modify this document
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under the terms of the GNU Free Documentation License, Version 3 or
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any later version published by the Free Software Foundation; with the
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Front-Cover Texts being ``Debugging the OpenRISC 1000 with GDB by
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Jeremy Bennett'' and with the Back-Cover Texts being ``You are free to
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copy and modify this Manual.''
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@end titlepage
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@page
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@ifnottex
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@node Top, Summary, (dir), (dir)
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@top Debugging the OpenRISC 1000 with @value{GDBN}
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This file describes @value{GDBN}, the @sc{gnu} symbolic debugger for
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use with the OpenRISC 1000 processor architecture.
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This is the @value{EDITION} Edition, for @value{GDBN} Version
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@value{GDBVN}.
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Copyright (C) 2008 Embecosm Limited
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@menu
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* Summary:: Summary of @value{GDBN} with OpenRISC 1000
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* Connecting to the Target:: Connecting to an OpenRISC 1000 Target
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* OpenRISC 1000 Specific Commands:: Commands just for the OpenRISC 1000
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* OpenRISC 1000 Example:: A small example
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* OpenRISC 1000 Limitations:: Known problems
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* Copying:: GNU General Public License says
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how you can copy and share GDB
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* GNU Free Documentation License:: The license for this documentation
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* Index:: Index
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@end menu
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@end ifnottex
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@contents
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@node Summary
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@unnumbered Summary of @value{GDBN} with OpenRISC 1000
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@cindex Overview
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@cindex Summary
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@value{GDBN} is described well in its user manual, ``Debugging with GDB: The
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GNU Source-Level Debugger''.
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@cindex RSP
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@cindex Remote Serial Protocol
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This manual describes how to use @value{GDBN} to debug C programs cross
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compiled for and running on processors using the OpenRISC 1000
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architecture. In general @value{GDBN} does not run on the actual target, but
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on a separate host processor. It communicates with the target via the
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@value{GDBN} @dfn{Remote Serial Protocol} (@acronym{RSP}).
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@cindex JTAG
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@cindex jtag, target
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@cindex target jtag
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For backwards compatibility, @value{GDBN} for OpenRISC also supports the
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legacy custom remote protocol, which drives the JTAG interface on the OpenRISC
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1000. This is provided by adding a special target, ``jtag'' to @value{GDBN},
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allowing the debugger to connect via the JTAG interface. @xref{Connecting to
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the Target,,Connecting to the Target}.
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@cindex SPR
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@cindex Special Purpose Registers
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@cindex @command{spr} command
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@cindex commands, @command{spr}
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@cindex @command{info spr} command
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@cindex commands, @command{info spr}
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@cindex OpenRISC 1000 specific commands
|
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@cindex commands, OpenRISC 1000 specific
|
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In addition the info command is extended to allow inspection of
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OpenRISC 1000 Special Purpose registers, and a new command ``spr'' is
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added to set the value of a Special Purpose Register. @xref{OpenRISC 1000
|
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|
Specific Commands,,OpenRISC 1000 Specific Commands}.
|
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@cindex @command{info registers} command for OpenRISC 1000
|
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@cindex commands, @command{info registers} for OpenRISC 1000
|
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All the normal GDB commands should work, although hardware watchpoints are not
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tested at present. The @command{info registers} command will show the 32 general
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purpose registers, while the @command{info registers all} command will add the
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program counter, supervision register and exception program counter register.
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@iftex
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Throughout this document, user input is emphasised like this: @command{input},
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program output is show like this: @code{Hello World!}.
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@end iftex
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@cindex graphical debugging
|
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@cindex graphical debugging, @command{gdbtui}
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@cindex graphical debugging, @command{ddd}
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@cindex @command{gdbtui}
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@cindex @command{ddd}
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|
For those who like their debugging graphical, the @command{gdbtui} command is
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available (typically as @command{or32-uclinux-gdbtui}). @value{GDBN} for
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OpenRISC 1000 can also be run under @command{ddd} as follows:
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@example
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@command{ddd --debugger=or32-uclinux-gdb --gdb}
|
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|
@end example
|
186 |
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187 |
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@menu
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* Contributors:: Contributors to GDB for the OpenRISC 1000
|
189 |
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|
@end menu
|
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|
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@node Contributors
|
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@unnumberedsec Contributors to @value{GDBN} for the OpenRISC 1000
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|
|
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The pantheon of contributors to GDB over the years is recorded in the main
|
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user manual, `Debugging with GDB: The GNU Source-Level Debugger''.
|
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@cindex contributors, OpenRISC 1000
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There is no official history of contributors to the OpenRISC 1000
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version. However the current author believes the original GDB 5.0 and 5.3
|
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ports were the work of:
|
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@itemize @bullet
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@item
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@cindex Ivan Guzvinex
|
205 |
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@cindex Guzvinex, Ivan
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206 |
|
|
@cindex Johan Rydverg
|
207 |
|
|
@cindex Rydverg, Johan
|
208 |
|
|
@cindex Binary File Description library
|
209 |
|
|
@cindex BFD
|
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|
|
Ivan Guzvinec and Johan Rydverg at OpenCores, who wrote the Binary File
|
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|
Descriptor library;
|
212 |
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|
213 |
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@item
|
214 |
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@cindex Alessandro Forin
|
215 |
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@cindex Forin, Alessandro
|
216 |
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@cindex Per Bothner
|
217 |
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@cindex Bothner, Per
|
218 |
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@cindex GDB interface, OpenRISC 1000
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|
Alessandro Forin at Carnegie-Mellon University and Per Bothner at the University
|
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of Wisconsin who wrote the main GDB interface; and
|
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@item
|
223 |
|
|
@cindex Mark Mlinar
|
224 |
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@cindex Mlinar, Mark
|
225 |
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@cindex Chris Ziomkowski
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226 |
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@cindex Ziomkowski, Chris
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|
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@cindex OpenRISC 1000 JTAG interface
|
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@cindex JTAG, OpenRISC 1000 interface
|
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|
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Mark Mlinar at Cygnus Support and Chris Ziomkowski at ASICS.ws,who wrote the
|
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|
OpenRISC JTAG interface.
|
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@end itemize
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@cindex Jeremy Bennett
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@cindex Bennett, Jeremy
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@cindex Embecosm
|
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|
|
The port to @value{GDBN} @value{GDBVN} is the work of Jeremy Bennett
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of Embecosm Limited (jeremy.bennett@@embecosm.com).
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@quotation Plea
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@cindex contributors, unknown
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If you know of anyone who has been omitted from this list, please email the
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current author, so the omission can be corrected, and credit given where it is
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due.
|
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@end quotation
|
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|
|
|
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@node Connecting to the Target
|
247 |
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|
@chapter Connecting to an OpenRISC 1000 Target
|
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@cindex OpenRISC 1000 target, connecting
|
249 |
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@cindex target, OpenRISC 1000, connecting
|
250 |
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|
@cindex connecting, OpenRISC 1000 target
|
251 |
|
|
There are two ways to connect to an OpenRISC 1000 target with GDB.
|
252 |
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|
|
253 |
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|
@enumerate
|
254 |
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|
@item
|
255 |
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|
@cindex @command{target jtag} command
|
256 |
|
|
@cindex commands, @command{target jtag}
|
257 |
|
|
@cindex OpenRISC 1000 target, local connecting
|
258 |
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|
@cindex target, local, OpenRISC 1000, connecting
|
259 |
|
|
@cindex connecting, OpenRISC 1000 target, local
|
260 |
|
|
@cindex local OpenRISC 1000 target, connecting
|
261 |
|
|
@cindex OpenRISC 1000 target, direct connecting
|
262 |
|
|
@cindex target, direct, OpenRISC 1000, connecting
|
263 |
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@cindex connecting, OpenRISC 1000 target, direct
|
264 |
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|
@cindex direct OpenRISC 1000 target, connecting
|
265 |
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|
To hardware directly connected via a JP1 header linked to the parallel
|
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port. This uses the @value{GDBN} command @command{target jtag}.
|
267 |
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|
|
268 |
|
|
@item
|
269 |
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|
@cindex @command{target remote} command
|
270 |
|
|
@cindex commands, @command{target remote}
|
271 |
|
|
@cindex @command{target extended-remote} command
|
272 |
|
|
@cindex commands, @command{target extended-remote}
|
273 |
|
|
@cindex OpenRISC 1000 target, remote connecting via RSP
|
274 |
|
|
@cindex target, remote, OpenRISC 1000, connecting via RSP
|
275 |
|
|
@cindex connecting, OpenRISC 1000 target, remote via RSP
|
276 |
|
|
@cindex remote OpenRISC 1000 target, connecting via RSP
|
277 |
|
|
Via a TCP/IP socket to a machine which has the hardware connected, or
|
278 |
|
|
is running the architectural simulator using the standard @value{GDBN}
|
279 |
|
|
@dfn{Remote Serial Protocol}. This uses the @value{GDBN} commands
|
280 |
|
|
@command{target remote} or @command{target extended-remote}.
|
281 |
|
|
|
282 |
|
|
@item
|
283 |
|
|
@cindex @command{target jtag} command
|
284 |
|
|
@cindex commands, @command{target jtag}
|
285 |
|
|
@cindex OpenRISC 1000 target, remote connecting via JTAG
|
286 |
|
|
@cindex target, remote, OpenRISC 1000, connecting via JTAG
|
287 |
|
|
@cindex connecting, OpenRISC 1000 target, remote via JTAG
|
288 |
|
|
@cindex remote OpenRISC 1000 target, connecting via JTAG
|
289 |
|
|
Via a TCP/IP socket to a machine which has the hardware connected, or
|
290 |
|
|
is running the architectural simulator using the custom OpenRISC 1000 Remote
|
291 |
|
|
JTAG protocol. This uses the @value{GDBN} command @command{target jtag}.
|
292 |
|
|
|
293 |
|
|
@quotation Note
|
294 |
|
|
This connection mechanism is deprecated. It remains for backward compatibility
|
295 |
|
|
only.
|
296 |
|
|
@end quotation
|
297 |
|
|
|
298 |
|
|
@end enumerate
|
299 |
|
|
|
300 |
|
|
@cindex OpenRISC 1000 Architectural Simulator
|
301 |
|
|
@cindex OpenRISC 1000 Architectural Simulator, patch
|
302 |
|
|
@cindex patch, OpenRISC 1000 Architectural Simulator
|
303 |
|
|
@cindex Or1ksim
|
304 |
|
|
@cindex Or1ksim, patch
|
305 |
|
|
@cindex patch, Or1ksim
|
306 |
|
|
@quotation Caution
|
307 |
|
|
If used with version 0.2.0 of the architectural simulator, Or1ksim,
|
308 |
|
|
@value{GDBN} version @value{GDBVN} requires a patch to be applied to the
|
309 |
|
|
architectural simulator. This should be available on the OpenCores website, or
|
310 |
|
|
contact the author directly. Only the legacy OpenRISC 1000 Remote JTAG
|
311 |
|
|
Protocol interface is available for this version of the architectural
|
312 |
|
|
simualtor.
|
313 |
|
|
|
314 |
|
|
The user is strongly recommended to use Or1ksim 0.3.0 or later, since this
|
315 |
|
|
interfaces directly to @value{GDBN} using the @dfn{Remote Serial Protocol}.
|
316 |
|
|
@end quotation
|
317 |
|
|
|
318 |
|
|
@menu
|
319 |
|
|
* Direct JTAG Connection:: Direct connection via a JTAG JP1
|
320 |
|
|
interface
|
321 |
|
|
* Remote Serial Protocol Connection:: Connection via the @value{GDBN} Remote
|
322 |
|
|
Serial Protocol Interface
|
323 |
|
|
* Remote JTAG Connection:: Connection via the OpenRISC 1000 Remote
|
324 |
|
|
JTAG Interface
|
325 |
|
|
@end menu
|
326 |
|
|
|
327 |
|
|
@node Direct JTAG Connection
|
328 |
|
|
@section Direct connection via a JTAG JP1 Interface
|
329 |
|
|
@cindex OpenRISC 1000 target, local connecting
|
330 |
|
|
@cindex target, local, OpenRISC 1000, connecting
|
331 |
|
|
@cindex connecting, OpenRISC 1000 target, local
|
332 |
|
|
@cindex local OpenRISC 1000 target, connecting
|
333 |
|
|
@cindex OpenRISC 1000 target, direct connecting
|
334 |
|
|
@cindex target, direct, OpenRISC 1000, connecting
|
335 |
|
|
@cindex connecting, OpenRISC 1000 target, direct
|
336 |
|
|
@cindex direct OpenRISC 1000 target, connecting
|
337 |
|
|
|
338 |
|
|
In this case the the device to which the JP1 header is connected must be
|
339 |
|
|
specifed to the @command{target jtag} command. Typically that will be the
|
340 |
|
|
parallel printer port, so the command would be:
|
341 |
|
|
|
342 |
|
|
@cindex local @command{target jtag} command
|
343 |
|
|
@cindex direct @command{target jtag} command
|
344 |
|
|
@cindex @command{target jtag} command, local
|
345 |
|
|
@cindex @command{target jtag} command, direct
|
346 |
|
|
@cindex commands, @command{target jtag}, local
|
347 |
|
|
@cindex commands, @command{target jtag}, direct
|
348 |
|
|
@cindex local target specification
|
349 |
|
|
@cindex direct target specification
|
350 |
|
|
@cindex target specification, local
|
351 |
|
|
@cindex target specification, direct
|
352 |
|
|
@example
|
353 |
|
|
@command{target jtag /dev/lp}
|
354 |
|
|
@end example
|
355 |
|
|
|
356 |
|
|
@cindex @command{target jtag} command, local, testing
|
357 |
|
|
@cindex @command{target jtag} command, direct, testing
|
358 |
|
|
@cindex commands, @command{target jtag}, local, testing
|
359 |
|
|
@cindex commands, @command{target jtag}, direct, testing
|
360 |
|
|
@quotation Caution
|
361 |
|
|
The current author is not aware of anyone using the JP1
|
362 |
|
|
interface. As a result this code has not been tested in the port to
|
363 |
|
|
@value{GDBN} version @value{GDBVN}. Modern hardware connections are usually via
|
364 |
|
|
interfaces such as USB, for which the OpenRISC Remote Interface can be used
|
365 |
|
|
(@pxref{Remote JTAG Connection,,Remote JTAG Connection}).
|
366 |
|
|
@end quotation
|
367 |
|
|
|
368 |
|
|
@node Remote Serial Protocol Connection
|
369 |
|
|
@section Connection via the @value{GDBN} Remote Serial Protocol
|
370 |
|
|
@cindex OpenRISC 1000 target, remote connecting via RSP
|
371 |
|
|
@cindex target, remote, OpenRISC 1000, connecting via RSP
|
372 |
|
|
@cindex connecting, OpenRISC 1000 target, remote via RSP
|
373 |
|
|
@cindex remote OpenRISC 1000 target, connecting via RSP
|
374 |
|
|
|
375 |
|
|
The usual mode of operation is through the @value{GDBN} @dfn{Remote Serial
|
376 |
|
|
Protocol} (@acronym{RSP}). This communicates to the target through a TCP/IP
|
377 |
|
|
socket. The target must then implement the server side of the interface to
|
378 |
|
|
drive either physical hardware (for example through a USB/JTAG connector) or a
|
379 |
|
|
simulation of the hardware (such as the OpenRISC Architectural Simulator).
|
380 |
|
|
|
381 |
|
|
Although referred to as a @emph{remote} interface, the target may actually
|
382 |
|
|
be on the same machine, just running in a separate process, with its own
|
383 |
|
|
terminal window.
|
384 |
|
|
|
385 |
|
|
For example, to connect to the OpenRISC 1000 Architectural simulator, which is
|
386 |
|
|
running on machine ``thomas'' and has been configured to talk to @value{GDBN}
|
387 |
|
|
on port 51000, the following command would be used:
|
388 |
|
|
|
389 |
|
|
@cindex remote @command{target jtag} command
|
390 |
|
|
@cindex @command{target jtag} command, remote
|
391 |
|
|
@cindex commands, @command{target jtag}, remote
|
392 |
|
|
@cindex remote target specification for RSP
|
393 |
|
|
@cindex target specification for RSP
|
394 |
|
|
@example
|
395 |
|
|
@command{target remote thomas:51000}
|
396 |
|
|
@end example
|
397 |
|
|
|
398 |
|
|
The target machine is specified as the machine name and port number. If the
|
399 |
|
|
architectural simulator was running on the same machine, its name may be
|
400 |
|
|
omitted, thus:
|
401 |
|
|
|
402 |
|
|
@cindex remote target specification, same machine for RSP
|
403 |
|
|
@cindex target specification for RSP, same machine
|
404 |
|
|
@example
|
405 |
|
|
@command{target remote :51000}
|
406 |
|
|
@end example
|
407 |
|
|
|
408 |
|
|
@node Remote JTAG Connection
|
409 |
|
|
@section Connection via the OpenRISC 1000 Remote JTAG Interface
|
410 |
|
|
@cindex OpenRISC 1000 target, remote connecting
|
411 |
|
|
@cindex target, remote, OpenRISC 1000, connecting
|
412 |
|
|
@cindex connecting, OpenRISC 1000 target, remote
|
413 |
|
|
@cindex remote OpenRISC 1000 target, connecting
|
414 |
|
|
|
415 |
|
|
Historically, @value{GDBN} communicated with remote OpenRISC 1000 targets
|
416 |
|
|
using a customer protocol, the @dfn{OpenRISC 1000 Remote JTAG
|
417 |
|
|
Interface}.
|
418 |
|
|
|
419 |
|
|
This protocol is maintained for backwards compatibility, but is now
|
420 |
|
|
deprecated. It communicates to the target through a TCP/IP socket. The target
|
421 |
|
|
must then implement the client side of the interface to drive either physical
|
422 |
|
|
hardware (for example through a USB/JTAG connector) or a simulation of the
|
423 |
|
|
hardware (such as the OpenRISC Architectural Simulator).
|
424 |
|
|
|
425 |
|
|
Although referred to as the @emph{remote} interface, the target may actually
|
426 |
|
|
be on the same machine, just running in a separate process, with its own
|
427 |
|
|
terminal window.
|
428 |
|
|
|
429 |
|
|
For example, to connect to the OpenRISC 1000 Architectural simulator, which is
|
430 |
|
|
running on machine ``thomas'' and has been configured to talk to @value{GDBN}
|
431 |
|
|
on port 50000, I could use the command:
|
432 |
|
|
|
433 |
|
|
@cindex remote @command{target jtag} command
|
434 |
|
|
@cindex @command{target jtag} command, remote
|
435 |
|
|
@cindex commands, @command{target jtag}, remote
|
436 |
|
|
@cindex remote target specification
|
437 |
|
|
@cindex target specification, remote
|
438 |
|
|
@example
|
439 |
|
|
@command{target jtag jtag://thomas:50000}
|
440 |
|
|
@end example
|
441 |
|
|
|
442 |
|
|
The target machine is specified after the @b{jtag://} and separated from the
|
443 |
|
|
target port by a colon. If the architectural simulator was running on the same
|
444 |
|
|
machine, just @b{locahost} would suffice as the machine name, thus:
|
445 |
|
|
|
446 |
|
|
@cindex remote target specification, same machine
|
447 |
|
|
@cindex target specification, same machine
|
448 |
|
|
@example
|
449 |
|
|
@command{target jtag jtag://localhost:50000}
|
450 |
|
|
@end example
|
451 |
|
|
|
452 |
|
|
@cindex Igor Mohor
|
453 |
|
|
@cindex Mohor, Igor
|
454 |
|
|
@cindex Debug interface types
|
455 |
|
|
Unfortunately there are now two different flavours of the JTAG
|
456 |
|
|
interface used with OpenRISC 1000. The original version was created
|
457 |
|
|
for use with the OpenRISC 1000 System-on-Chip, @b{ORPSoC}. A new
|
458 |
|
|
(smaller and simpler) JTAG interface was developed by Igor Mohor in
|
459 |
|
|
2004, which is used on some designs.
|
460 |
|
|
|
461 |
|
|
The default behavior of @value{GDBN} is to use the original ORPSoC
|
462 |
|
|
version of the interface for backwards compatibility. @value{GDBN} can
|
463 |
|
|
use the Igor Mohor version by specifying for example:
|
464 |
|
|
|
465 |
|
|
@example
|
466 |
|
|
@command{target jtag jtag_mohor://localhost:50000}
|
467 |
|
|
@end example
|
468 |
|
|
|
469 |
|
|
This interface is only available with remote connections using the legacy
|
470 |
|
|
OpenRISC 1000 Remote JTAG Protocol (deprecated). The direct JP1 interface can
|
471 |
|
|
support only the ORPSoC version of JTAG.
|
472 |
|
|
|
473 |
|
|
The recommended approach is to use the @value{GDBN} @dfn{Remote Serial
|
474 |
|
|
Protocol} which interfaces directly to the simulator, and is independent of
|
475 |
|
|
the JTAG implementation used.
|
476 |
|
|
|
477 |
|
|
For completeness
|
478 |
|
|
|
479 |
|
|
@example
|
480 |
|
|
@command{target jtag jtag_orpsoc://localhost:50000}
|
481 |
|
|
@end example
|
482 |
|
|
|
483 |
|
|
is provided as a synonym for:
|
484 |
|
|
|
485 |
|
|
@example
|
486 |
|
|
@command{target jtag jtag://localhost:50000}
|
487 |
|
|
@end example
|
488 |
|
|
|
489 |
|
|
@cindex reset
|
490 |
|
|
@cindex resetting the target
|
491 |
|
|
@cindex target reset
|
492 |
|
|
By default, establishing a connection @emph{does not} reset the target. This
|
493 |
|
|
allows debugging to resume a partially complete program on connection. If a
|
494 |
|
|
reset is required, the keyworkd @command{RESET} (case insensitive) may be
|
495 |
|
|
added at the end of the @command{target} command. For example:
|
496 |
|
|
|
497 |
|
|
@example
|
498 |
|
|
@command{target jtag jtag://localhost:50000 reset}
|
499 |
|
|
@end example
|
500 |
|
|
|
501 |
|
|
@cindex robustness, OpenRISC remote JTAG interface
|
502 |
|
|
@cindex JTAG, robustness or remote interface
|
503 |
|
|
@cindex Remote Serial Protocol
|
504 |
|
|
@cindex RSP
|
505 |
|
|
@quotation Warning
|
506 |
|
|
The OpenRISC remote JTAG interface is not particularly robust. In particular
|
507 |
|
|
dropping and reconnecting sessions does not seem to work well. This was a key
|
508 |
|
|
factor in its replacement by the generic @value{GDBN} Remote Serial Interface.
|
509 |
|
|
@end quotation
|
510 |
|
|
|
511 |
|
|
@node OpenRISC 1000 Specific Commands
|
512 |
|
|
@chapter Commands just for the OpenRISC 1000
|
513 |
|
|
@cindex @command{info spr} command
|
514 |
|
|
@cindex @command{spr} command
|
515 |
|
|
@cindex commands, @command{info spr}
|
516 |
|
|
@cindex commands, @command{spr} command
|
517 |
|
|
@cindex custom commands, OpenRISC 1000
|
518 |
|
|
@cindex OpenRISC 1000, custom commands
|
519 |
|
|
The OpenRISC 1000 has one particular feature that is difficult for
|
520 |
|
|
@value{GDBN}. @value{GDBN} models target processors with a register
|
521 |
|
|
bank and a block of memory. The internals of @value{GDBN} assume that
|
522 |
|
|
there are not a huge number of registers in total.
|
523 |
|
|
|
524 |
|
|
The OpenRISC 1000 Special Purpose Registers (SPR) do not really fit well into
|
525 |
|
|
this structure. There are too many of them (12 groups each with 2000+ entries
|
526 |
|
|
so far, with up to 32 groups permitted) to be implemented as ordinary
|
527 |
|
|
registers in @value{GDBN}. Think what this would mean for the command
|
528 |
|
|
@command{info registers all}. However they cannot be considered memory, since
|
529 |
|
|
they do not reside in the main memory map.
|
530 |
|
|
|
531 |
|
|
The solution is to add two new commands to @value{GDBN} to see the value of a
|
532 |
|
|
particular SPR and to set the value of a particular SPR.
|
533 |
|
|
|
534 |
|
|
@enumerate
|
535 |
|
|
@item
|
536 |
|
|
@command{info spr} is used to show the value of a SPR or group of SPRs.
|
537 |
|
|
|
538 |
|
|
@item
|
539 |
|
|
@command{spr} is used to set the value of an individual SPR.
|
540 |
|
|
@end enumerate
|
541 |
|
|
|
542 |
|
|
@menu
|
543 |
|
|
* Reading SPRs:: Using the ``info spr'' command
|
544 |
|
|
* Writing SPRs:: Using the spr command
|
545 |
|
|
@end menu
|
546 |
|
|
|
547 |
|
|
@node Reading SPRs
|
548 |
|
|
@section Using the @command{info spr} Command
|
549 |
|
|
@cindex @command{info spr} command
|
550 |
|
|
@cindex commands, @command{info spr}
|
551 |
|
|
@cindex @command{info spr} command, argument specification
|
552 |
|
|
@cindex @command{info spr} command, single register
|
553 |
|
|
|
554 |
|
|
The value of an SPR is read by specifying either the unique name of the SPR,
|
555 |
|
|
or the its group and index in that group. For example the Debug Reason
|
556 |
|
|
Register (@code{DRR}, register 21 in group 6 (Debug)) can be read using any of
|
557 |
|
|
the following commands:
|
558 |
|
|
|
559 |
|
|
@example
|
560 |
|
|
@command{info spr DRR}
|
561 |
|
|
@command{info spr debug DRR}
|
562 |
|
|
@command{info spr debug 21}
|
563 |
|
|
@command{info spr 6 DRR}
|
564 |
|
|
@command{info spr 6 21}
|
565 |
|
|
@end example
|
566 |
|
|
|
567 |
|
|
In each case the output will be:
|
568 |
|
|
|
569 |
|
|
@example
|
570 |
|
|
@code{DEBUG.DRR = SPR6_21 = 0 (0x0)}
|
571 |
|
|
@end example
|
572 |
|
|
|
573 |
|
|
@cindex @command{info spr} command, argument specification
|
574 |
|
|
@cindex @command{info spr} command, complete group
|
575 |
|
|
It is also possible to inspect all the registers in a group. For example to
|
576 |
|
|
look at all the Programmable Interrupt Controller registers (group 9), either
|
577 |
|
|
of the following commands could be used:
|
578 |
|
|
|
579 |
|
|
@example
|
580 |
|
|
@command{info spr PIC}
|
581 |
|
|
@command{info spr 9}
|
582 |
|
|
@end example
|
583 |
|
|
|
584 |
|
|
And the output would be:
|
585 |
|
|
|
586 |
|
|
@example
|
587 |
|
|
@code{PIC.PICMR = SPR9_0 = 0 (0x9)}
|
588 |
|
|
@code{PIC.PICSR = SPR9_2 = 0 (0x8)}
|
589 |
|
|
@end example
|
590 |
|
|
|
591 |
|
|
Indicating that interrupts 0 and 4 are enabled and interrupt 4 is pending.
|
592 |
|
|
|
593 |
|
|
@node Writing SPRs
|
594 |
|
|
@section Using the @command{spr} Command
|
595 |
|
|
@cindex @command{spr} command
|
596 |
|
|
@cindex commands, @command{spr} command
|
597 |
|
|
@cindex @command{spr} command, argument specification
|
598 |
|
|
|
599 |
|
|
The value of an SPR is written by specifying the unique name of the SPR or its
|
600 |
|
|
group and index in the same manner as for the @command{info spr} command. An
|
601 |
|
|
additional argument specifies the value to be written. So for example the
|
602 |
|
|
Programmable Interrupt Controller mask register could be changed to enable
|
603 |
|
|
interrupts 5 and 3 only by any of the following commands.
|
604 |
|
|
|
605 |
|
|
@example
|
606 |
|
|
@command{spr PICMR 0x24}
|
607 |
|
|
@command{spr PIC PICMR 0x24}
|
608 |
|
|
@command{spr PIC 0 0x24}
|
609 |
|
|
@command{spr 9 PICMR 0x24}
|
610 |
|
|
@command{spr 9 2 0x24}
|
611 |
|
|
@end example
|
612 |
|
|
|
613 |
|
|
@node OpenRISC 1000 Example
|
614 |
|
|
@chapter A Small Example
|
615 |
|
|
@cindex examples
|
616 |
|
|
@cindex examples, Hello World
|
617 |
|
|
@cindex Hello World example
|
618 |
|
|
|
619 |
|
|
A simple ``Hello World'' program (what else) is used to show the basics
|
620 |
|
|
|
621 |
|
|
@cindex examples
|
622 |
|
|
@cindex examples, Hello World
|
623 |
|
|
@cindex Hello World example
|
624 |
|
|
This is the cannonical small program. Here is the main program and its two
|
625 |
|
|
subprograms (added to demonstrate a meaningful backtrace).
|
626 |
|
|
|
627 |
|
|
@example
|
628 |
|
|
void level2() @{
|
629 |
|
|
simexit( 0 );
|
630 |
|
|
@}
|
631 |
|
|
|
632 |
|
|
void level1() @{
|
633 |
|
|
level2();
|
634 |
|
|
@}
|
635 |
|
|
|
636 |
|
|
main()
|
637 |
|
|
@{
|
638 |
|
|
int i;
|
639 |
|
|
int j;
|
640 |
|
|
|
641 |
|
|
simputs( "Hello World!\n" );
|
642 |
|
|
level1();
|
643 |
|
|
@}
|
644 |
|
|
@end example
|
645 |
|
|
|
646 |
|
|
It is linked with a program providing the utility functions @code{simexit},
|
647 |
|
|
@code{simputc} and @code{simprints}.
|
648 |
|
|
|
649 |
|
|
@example
|
650 |
|
|
void simexit( int rc )
|
651 |
|
|
@{
|
652 |
|
|
__asm__ __volatile__ ( "\tl.nop\t%0" : : "K"( NOP_EXIT ));
|
653 |
|
|
|
654 |
|
|
@} /* simexit() */
|
655 |
|
|
|
656 |
|
|
void simputc( int c )
|
657 |
|
|
@{
|
658 |
|
|
__asm__ __volatile__ ( "\tl.nop\t%0" : : "K"( NOP_PUTC ));
|
659 |
|
|
|
660 |
|
|
@} /* simputc() */
|
661 |
|
|
|
662 |
|
|
void simputs( char *str )
|
663 |
|
|
@{
|
664 |
|
|
int i;
|
665 |
|
|
|
666 |
|
|
for( i = 0; str[i] != '\0' ; i++ ) @{
|
667 |
|
|
simputc( (int)(str[i]) );
|
668 |
|
|
@}
|
669 |
|
|
@} /* simputs() */
|
670 |
|
|
@end example
|
671 |
|
|
|
672 |
|
|
Finally, a small bootloader is needed, which will be placed at the OpenRISC
|
673 |
|
|
reset vector location (0x100) to set up a stack and jump to the main program.
|
674 |
|
|
|
675 |
|
|
@example
|
676 |
|
|
.org 0x100 # The reset routine goes at 0x100
|
677 |
|
|
.global _start
|
678 |
|
|
_start:
|
679 |
|
|
l.addi r1,r0,0x7f00 # Set SP to value 0x7f00
|
680 |
|
|
l.addi r2,r1,0x0 # FP and SP are the same
|
681 |
|
|
l.mfspr r3,r0,17 # Get SR value
|
682 |
|
|
l.ori r3,r3,0x10 # Set exception enable bit
|
683 |
|
|
l.jal _main # Jump to main routine
|
684 |
|
|
l.mtspr r0,r3,17 # Enable exceptions (DELAY SLOT)
|
685 |
|
|
|
686 |
|
|
.org 0xFFC
|
687 |
|
|
l.nop # Guarantee the exception vector space
|
688 |
|
|
# does not have general purpose code
|
689 |
|
|
@end example
|
690 |
|
|
|
691 |
|
|
This is compiled and linked with the OpenRISC 1000 @sc{gnu} toolchain. Note
|
692 |
|
|
that the linking must specify the bootloader first and use the @code{-Ttext
|
693 |
|
|
0x0} argument.
|
694 |
|
|
|
695 |
|
|
@cindex OpenRISC 1000 Architectural Simulator, configuration
|
696 |
|
|
@cindex configuration, OpenRISC 1000 Architectural Simulator
|
697 |
|
|
@cindex Or1ksim, configuration
|
698 |
|
|
@cindex configuration, Or1ksim
|
699 |
|
|
The Or1ksim architectural simulator is configured with memory starting at
|
700 |
|
|
location 0x0. The debugging interface is enabled by using a debug section.
|
701 |
|
|
|
702 |
|
|
@example
|
703 |
|
|
section debug
|
704 |
|
|
enabled = 1
|
705 |
|
|
gdb_enabled = 1
|
706 |
|
|
server_port = 50000
|
707 |
|
|
end
|
708 |
|
|
@end example
|
709 |
|
|
|
710 |
|
|
The architectural simulator is started in its own terminal window. If the
|
711 |
|
|
configuration is in @code{rsp.cfg}, then the command might be:
|
712 |
|
|
|
713 |
|
|
@example
|
714 |
|
|
@command{or32-uclinux-sim -f rsp.cfg}
|
715 |
|
|
Reading script file from 'rsp.cfg'...
|
716 |
|
|
Building automata... done, num uncovered: 0/213.
|
717 |
|
|
Parsing operands data... done.
|
718 |
|
|
Resetting memory controller.
|
719 |
|
|
Resetting PIC.
|
720 |
|
|
@end example
|
721 |
|
|
|
722 |
|
|
Note that no program is specified - that will be loaded from @value{GDBN}.
|
723 |
|
|
|
724 |
|
|
In a separate window start up @value{GDBN}.
|
725 |
|
|
|
726 |
|
|
@example
|
727 |
|
|
@command{or32-uclinux-gdb}
|
728 |
|
|
@end example
|
729 |
|
|
|
730 |
|
|
A local copy of the symbol table is needed, specified with the @command{file}
|
731 |
|
|
command.
|
732 |
|
|
|
733 |
|
|
@cindex examples, symbol file loading
|
734 |
|
|
@cindex symbol file loading
|
735 |
|
|
@cindex symbols when remote debugging
|
736 |
|
|
@example
|
737 |
|
|
Building automata... done, num uncovered: 0/216.
|
738 |
|
|
Parsing operands data... done.
|
739 |
|
|
GNU gdb 6.8
|
740 |
|
|
Copyright (C) 2008 Free Software Foundation, Inc.
|
741 |
|
|
License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>
|
742 |
|
|
This is free software: you are free to change and redistribute it.
|
743 |
|
|
There is NO WARRANTY, to the extent permitted by law. Type "show copying"
|
744 |
|
|
and "show warranty" for details.
|
745 |
|
|
This GDB was configured as "--host=i686-pc-linux-gnu --target=or32-uclinux".
|
746 |
|
|
(gdb) @command{file hello}
|
747 |
|
|
Reading symbols from /home/jeremy/svntrunk/GNU/gdb-6.8/progs_or32/hello...done.
|
748 |
|
|
(gdb)
|
749 |
|
|
@end example
|
750 |
|
|
|
751 |
|
|
@cindex examples, remote @command{target remote} command
|
752 |
|
|
@cindex remote @command{target remote} command, example
|
753 |
|
|
@cindex @command{target remote} command, remote, example
|
754 |
|
|
@cindex commands, @command{target remote}, remote, example
|
755 |
|
|
@cindex examples, remote target specification via RSP
|
756 |
|
|
@cindex remote target specification via RSP, example
|
757 |
|
|
@cindex target specification, remote via RSP, example
|
758 |
|
|
The connection to the target (the architectural simulator) is then
|
759 |
|
|
established, using the port number given in the configuration file.
|
760 |
|
|
|
761 |
|
|
@example
|
762 |
|
|
(gdb) @command{target remote :51000}
|
763 |
|
|
Remote debugging using :51000
|
764 |
|
|
0x00000100 in _start ()
|
765 |
|
|
(gdb)
|
766 |
|
|
@end example
|
767 |
|
|
|
768 |
|
|
@cindex examples, program loading
|
769 |
|
|
@cindex program loading
|
770 |
|
|
@cindex program loading, example
|
771 |
|
|
@cindex program loading, remote
|
772 |
|
|
@cindex remote program loading, example
|
773 |
|
|
The program of interest can now be loaded:
|
774 |
|
|
|
775 |
|
|
@example
|
776 |
|
|
(gdb) @command{load hello}
|
777 |
|
|
Loading section .text, size 0x1290 lma 0x0
|
778 |
|
|
Loading section .rodata, size 0xe lma 0x1290
|
779 |
|
|
Start address 0x100, load size 4766
|
780 |
|
|
Transfer rate: 5 KB/sec, 238 bytes/write.
|
781 |
|
|
(gdb)
|
782 |
|
|
@end example
|
783 |
|
|
|
784 |
|
|
The program does not immediately start running, since on opening the
|
785 |
|
|
connection to the target, Or1ksim stalls.
|
786 |
|
|
|
787 |
|
|
@cindex examples, @command{bt} command
|
788 |
|
|
@cindex @command{bt} command example
|
789 |
|
|
@cindex commands, @command{bt}, example
|
790 |
|
|
@cindex examples, @command{info spr} command
|
791 |
|
|
@cindex @command{info spr} command example
|
792 |
|
|
@cindex commands, @command{info spr}, example
|
793 |
|
|
All the GDB commands (including the SPR commands are available). For example
|
794 |
|
|
|
795 |
|
|
@example
|
796 |
|
|
(gdb) @command{bt}
|
797 |
|
|
#0 0x00000100 in _start ()
|
798 |
|
|
(gdb) @command{info spr 0 17}
|
799 |
|
|
SYS.SR = SPR0_17 = 32769 (0x8001)
|
800 |
|
|
(gdb)
|
801 |
|
|
@end example
|
802 |
|
|
|
803 |
|
|
The Supervision Register shows the target is in Supervisor Mode and that SPRs
|
804 |
|
|
have User Mode read access.
|
805 |
|
|
|
806 |
|
|
@emph{Note.} The supervision register is used to provide the value for the
|
807 |
|
|
@value{GDBN} @code{$ps} processor status variable, so can also be accessed as:
|
808 |
|
|
|
809 |
|
|
@example
|
810 |
|
|
(gdb) @command{print $ps}
|
811 |
|
|
$1 = 32769
|
812 |
|
|
(gdb)
|
813 |
|
|
@end example
|
814 |
|
|
|
815 |
|
|
@cindex examples, @command{breakpoint} command
|
816 |
|
|
@cindex @command{breakpoint} command example
|
817 |
|
|
@cindex commands, @command{breakpoint}, example
|
818 |
|
|
@cindex examples, @command{continue} command
|
819 |
|
|
@cindex @command{continue} command example
|
820 |
|
|
@cindex commands, @command{continue}, example
|
821 |
|
|
@cindex continuening the remote program
|
822 |
|
|
@cindex examples, continuing a program
|
823 |
|
|
For this example set a breakpoint at the start of main and then continue the
|
824 |
|
|
program
|
825 |
|
|
|
826 |
|
|
@example
|
827 |
|
|
(gdb) @command{break main}
|
828 |
|
|
Breakpoint 1 at 0x1264: file hello.c, line 41.
|
829 |
|
|
(gdb) @command{continue}
|
830 |
|
|
Continuing.
|
831 |
|
|
|
832 |
|
|
Breakpoint 1, main () at hello.c:41
|
833 |
|
|
41 simputs( "Hello World!\n" );
|
834 |
|
|
(gdb)
|
835 |
|
|
@end example
|
836 |
|
|
|
837 |
|
|
@cindex examples, @command{step} command
|
838 |
|
|
@cindex @command{step} command example
|
839 |
|
|
@cindex commands, @command{step}, example
|
840 |
|
|
It is now possible to step through the code:
|
841 |
|
|
@example
|
842 |
|
|
(gdb) @command{step}
|
843 |
|
|
simputs (str=0x1290 "Hello World!\n") at utils.c:90
|
844 |
|
|
90 for( i = 0; str[i] != '\0' ; i++ ) @{
|
845 |
|
|
(gdb) @command{step}
|
846 |
|
|
91 simputc( (int)(str[i]) );
|
847 |
|
|
(gdb) @command{step}
|
848 |
|
|
simputc (c=72) at utils.c:58
|
849 |
|
|
58 __asm__ __volatile__ ( "\tl.nop\t%0" : : "K"( NOP_PUTC ));
|
850 |
|
|
(gdb)
|
851 |
|
|
@end example
|
852 |
|
|
|
853 |
|
|
@cindex examples, @command{bt} command
|
854 |
|
|
@cindex @command{bt} command example
|
855 |
|
|
@cindex commands, @command{bt}, example
|
856 |
|
|
At this point a backtrace will show where the code has reached:
|
857 |
|
|
|
858 |
|
|
@example
|
859 |
|
|
(gdb) @command{bt}
|
860 |
|
|
#0 simputc (c=72) at utils.c:58
|
861 |
|
|
#1 0x000011cc in simputs (str=0x1290 "Hello World!\n") at utils.c:91
|
862 |
|
|
#2 0x00001274 in main () at hello.c:41
|
863 |
|
|
#3 0x00000118 in _start ()
|
864 |
|
|
(gdb)
|
865 |
|
|
@end example
|
866 |
|
|
|
867 |
|
|
One more step completes the call to the character output routine. Inspecting
|
868 |
|
|
the terminal running the Or1ksim simulation, shows the output appearing:
|
869 |
|
|
|
870 |
|
|
@example
|
871 |
|
|
JTAG Proxy server started on port 50000
|
872 |
|
|
Resetting PIC.
|
873 |
|
|
H
|
874 |
|
|
@end example
|
875 |
|
|
|
876 |
|
|
@cindex examples, @command{continue} command
|
877 |
|
|
@cindex @command{continue} command example
|
878 |
|
|
@cindex commands, @command{continue}, example
|
879 |
|
|
Let the program run to completion by giving @value{GDBN} the continue command:
|
880 |
|
|
@example
|
881 |
|
|
(gdb) @command{continue}
|
882 |
|
|
Continuing.
|
883 |
|
|
Remote connection closed
|
884 |
|
|
(gdb)
|
885 |
|
|
@end example
|
886 |
|
|
|
887 |
|
|
@cindex remote program termination
|
888 |
|
|
With completion of the program, the terminal running Or1ksim shows its final
|
889 |
|
|
output:
|
890 |
|
|
|
891 |
|
|
@example
|
892 |
|
|
Resetting PIC.
|
893 |
|
|
Hello World!
|
894 |
|
|
exit(0)
|
895 |
|
|
@@reset : cycles 0, insn #0
|
896 |
|
|
@@exit : cycles 215892308, insn #215891696
|
897 |
|
|
diff : cycles 215892308, insn #215891696
|
898 |
|
|
@end example
|
899 |
|
|
|
900 |
|
|
|
901 |
|
|
@cindex remote program restart
|
902 |
|
|
@cindex restart, remote program
|
903 |
|
|
@cindex examples, @command{set} command
|
904 |
|
|
@cindex @command{set} command example
|
905 |
|
|
@cindex commands, @command{set}, example
|
906 |
|
|
When execution exits (by execution of a @code{l.nop 1}), the connection to the
|
907 |
|
|
target is automatically broken as the simulator exits.
|
908 |
|
|
|
909 |
|
|
@node OpenRISC 1000 Limitations
|
910 |
|
|
@chapter Known Problems
|
911 |
|
|
@cindex known problems
|
912 |
|
|
@cindex OpenRISC 1000, known GDB problems
|
913 |
|
|
@cindex bugs
|
914 |
|
|
|
915 |
|
|
There are some known problems with the current implementation
|
916 |
|
|
|
917 |
|
|
@enumerate
|
918 |
|
|
@item
|
919 |
|
|
@cindex known problems, watchpoints
|
920 |
|
|
@cindex bugs, watchpoints
|
921 |
|
|
If the OpenRISC 1000 Architecture supports hardware watchpoints, @value{GDBN}
|
922 |
|
|
will use them to implement hardware breakpoints and watchpoints. @value{GDBN}
|
923 |
|
|
is not perfect in handling of watchpoints. It is possible to allocate hardware
|
924 |
|
|
watchpoints and not discover until running that sufficient watchpoints are not
|
925 |
|
|
available. It is also possible that GDB will report watchpoints being hit
|
926 |
|
|
spuriously. This can be down to the assembly code having additional memory
|
927 |
|
|
accesses that are not obviously reflected in the source code.
|
928 |
|
|
|
929 |
|
|
@item
|
930 |
|
|
@cindex known problems, remote JTAG connection robustness
|
931 |
|
|
@cindex bugs, remote JTAG connection robustness
|
932 |
|
|
@cindex JTAG, remote connection robustness
|
933 |
|
|
@cindex remote JTAG, connection robustness
|
934 |
|
|
The remote JTAG connection is not robust to being interrupted, or
|
935 |
|
|
reconnecting. If the connection is lost due to error, then you must restart
|
936 |
|
|
GDB and the target server (for example the Or1ksim architectural
|
937 |
|
|
simulator). Moving to the Remote Serial Protocol is intended to remedy this
|
938 |
|
|
problem in the future.
|
939 |
|
|
|
940 |
|
|
@item
|
941 |
|
|
@cindex known problems, architectural compatability
|
942 |
|
|
@cindex bugs, architectural compatibility
|
943 |
|
|
@cindex GDB 5.3, differences in port of @value{GDBN} version @value{GDBVN}
|
944 |
|
|
The OpenRISC 1000 architecture has evolved since the port of GDB 5.3
|
945 |
|
|
in 2001. In particular the structure of the Unit Present register has
|
946 |
|
|
changed and the CPU Configuration register has been added. The port of
|
947 |
|
|
@value{GDBN} version @value{GDBVN} uses the @emph{current}
|
948 |
|
|
specification of the OpenRISC 1000. This means that old clients that
|
949 |
|
|
talk to the debugger may not work. In particular the Or1ksim
|
950 |
|
|
Architectural simulator requires a patch to work.
|
951 |
|
|
|
952 |
|
|
@item
|
953 |
|
|
@cindex known problems, Or1ksim architectural simulator
|
954 |
|
|
@cindex bugs, Or1ksim architectural simulator
|
955 |
|
|
@cindex Or1ksim, bugs fixed
|
956 |
|
|
The handling of watchpoints in the Or1ksim architectural simulator was
|
957 |
|
|
incorrect. To work with @value{GDBN} @value{GDBVN}, a patch is required to fix
|
958 |
|
|
this problem. This is combined with the patch changing the structure of the
|
959 |
|
|
Unit Present and CPU Configuration registers.
|
960 |
|
|
|
961 |
|
|
@item
|
962 |
|
|
@cindex known problems, Or1ksim architectural simulator
|
963 |
|
|
@cindex bugs, Or1ksim architectural simulator
|
964 |
|
|
@cindex Or1ksim, bugs fixed
|
965 |
|
|
The OpenRISC 1000 architecture uses its General Purpose
|
966 |
|
|
Register (GPR) 2 as a frame pointer register. However the @command{$fp}
|
967 |
|
|
variable in @value{GDBN} is not currently implemented, and will return
|
968 |
|
|
the value of the stack pointer (GPR 1) instead.
|
969 |
|
|
@end enumerate
|
970 |
|
|
|
971 |
|
|
@cindex Bugs, reporting
|
972 |
|
|
@cindex Reporting bugs
|
973 |
|
|
Reports of bugs are much welcomed. Please report problems through the
|
974 |
|
|
OpenCORES tracker at @uref{www.opencores.org/ptracker.cgi/list/or1k}.
|
975 |
|
|
@include gpl.texi
|
976 |
|
|
|
977 |
|
|
@raisesections
|
978 |
|
|
@include fdl.texi
|
979 |
|
|
@lowersections
|
980 |
|
|
|
981 |
|
|
@node Index
|
982 |
|
|
@unnumbered Index
|
983 |
|
|
|
984 |
|
|
@printindex cp
|
985 |
|
|
|
986 |
|
|
@tex
|
987 |
|
|
% I think something like @colophon should be in texinfo. In the
|
988 |
|
|
% meantime:
|
989 |
|
|
\long\def\colophon{\hbox to0pt{}\vfill
|
990 |
|
|
\centerline{The body of this manual is set in}
|
991 |
|
|
\centerline{\fontname\tenrm,}
|
992 |
|
|
\centerline{with headings in {\bf\fontname\tenbf}}
|
993 |
|
|
\centerline{and examples in {\tt\fontname\tentt}.}
|
994 |
|
|
\centerline{{\it\fontname\tenit\/},}
|
995 |
|
|
\centerline{{\bf\fontname\tenbf}, and}
|
996 |
|
|
\centerline{{\sl\fontname\tensl\/}}
|
997 |
|
|
\centerline{are used for emphasis.}\vfill}
|
998 |
|
|
\page\colophon
|
999 |
|
|
% Blame: doc@cygnus.com, 1991.
|
1000 |
|
|
@end tex
|
1001 |
|
|
|
1002 |
|
|
@bye
|