OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [gdb/] [gdbserver/] [linux-m32r-low.c] - Blame information for rev 157

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 24 jeremybenn
/* GNU/Linux/m32r specific low level interface, for the remote server for GDB.
2
   Copyright (C) 2005, 2007, 2008 Free Software Foundation, Inc.
3
 
4
   This file is part of GDB.
5
 
6
   This program is free software; you can redistribute it and/or modify
7
   it under the terms of the GNU General Public License as published by
8
   the Free Software Foundation; either version 3 of the License, or
9
   (at your option) any later version.
10
 
11
   This program is distributed in the hope that it will be useful,
12
   but WITHOUT ANY WARRANTY; without even the implied warranty of
13
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14
   GNU General Public License for more details.
15
 
16
   You should have received a copy of the GNU General Public License
17
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
18
 
19
#include "server.h"
20
#include "linux-low.h"
21
 
22
#ifdef HAVE_SYS_REG_H
23
#include <sys/reg.h>
24
#endif
25
 
26
#define m32r_num_regs 25
27
 
28
static int m32r_regmap[] = {
29
#ifdef PT_R0
30
  PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
31
  PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_FP, PT_LR, PT_SPU,
32
  PT_PSW, PT_CBR, PT_SPI, PT_SPU, PT_BPC, PT_PC, PT_ACCL, PT_ACCH, PT_EVB
33
#else
34
  4 * 4, 4 * 5, 4 * 6, 4 * 7, 4 * 0, 4 * 1, 4 * 2, 4 * 8,
35
  4 * 9, 4 * 10, 4 * 11, 4 * 12, 4 * 13, 4 * 24, 4 * 25, 4 * 23,
36
  4 * 19, 4 * 31, 4 * 26, 4 * 23, 4 * 20, 4 * 30, 4 * 16, 4 * 15, 4 * 32
37
#endif
38
};
39
 
40
static int
41
m32r_cannot_store_register (int regno)
42
{
43
  return (regno >= m32r_num_regs);
44
}
45
 
46
static int
47
m32r_cannot_fetch_register (int regno)
48
{
49
  return (regno >= m32r_num_regs);
50
}
51
 
52
static CORE_ADDR
53
m32r_get_pc ()
54
{
55
  unsigned long pc;
56
  collect_register_by_name ("pc", &pc);
57
  return pc;
58
}
59
 
60
static void
61
m32r_set_pc (CORE_ADDR pc)
62
{
63
  unsigned long newpc = pc;
64
  supply_register_by_name ("pc", &newpc);
65
}
66
 
67
static const unsigned short m32r_breakpoint = 0x10f1;
68
#define m32r_breakpoint_len 2
69
 
70
static int
71
m32r_breakpoint_at (CORE_ADDR where)
72
{
73
  unsigned short insn;
74
 
75
  (*the_target->read_memory) (where, (unsigned char *) &insn,
76
                              m32r_breakpoint_len);
77
  if (insn == m32r_breakpoint)
78
    return 1;
79
 
80
  /* If necessary, recognize more trap instructions here.  GDB only uses the
81
     one.  */
82
  return 0;
83
}
84
 
85
struct linux_target_ops the_low_target = {
86
  m32r_num_regs,
87
  m32r_regmap,
88
  m32r_cannot_fetch_register,
89
  m32r_cannot_store_register,
90
  m32r_get_pc,
91
  m32r_set_pc,
92
  (const unsigned char *) &m32r_breakpoint,
93
  m32r_breakpoint_len,
94
  NULL,
95
  0,
96
  m32r_breakpoint_at,
97
};

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.