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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [gdb/] [h8300-tdep.c] - Blame information for rev 404

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1 24 jeremybenn
/* Target-machine dependent code for Renesas H8/300, for GDB.
2
 
3
   Copyright (C) 1988, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999,
4
   2000, 2001, 2002, 2003, 2005, 2007, 2008 Free Software Foundation, Inc.
5
 
6
   This file is part of GDB.
7
 
8
   This program is free software; you can redistribute it and/or modify
9
   it under the terms of the GNU General Public License as published by
10
   the Free Software Foundation; either version 3 of the License, or
11
   (at your option) any later version.
12
 
13
   This program is distributed in the hope that it will be useful,
14
   but WITHOUT ANY WARRANTY; without even the implied warranty of
15
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16
   GNU General Public License for more details.
17
 
18
   You should have received a copy of the GNU General Public License
19
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
20
 
21
/*
22
   Contributed by Steve Chamberlain
23
   sac@cygnus.com
24
 */
25
 
26
#include "defs.h"
27
#include "value.h"
28
#include "arch-utils.h"
29
#include "regcache.h"
30
#include "gdbcore.h"
31
#include "objfiles.h"
32
#include "gdb_assert.h"
33
#include "dis-asm.h"
34
#include "dwarf2-frame.h"
35
#include "frame-base.h"
36
#include "frame-unwind.h"
37
 
38
enum gdb_regnum
39
{
40
  E_R0_REGNUM, E_ER0_REGNUM = E_R0_REGNUM, E_ARG0_REGNUM = E_R0_REGNUM,
41
  E_RET0_REGNUM = E_R0_REGNUM,
42
  E_R1_REGNUM, E_ER1_REGNUM = E_R1_REGNUM, E_RET1_REGNUM = E_R1_REGNUM,
43
  E_R2_REGNUM, E_ER2_REGNUM = E_R2_REGNUM, E_ARGLAST_REGNUM = E_R2_REGNUM,
44
  E_R3_REGNUM, E_ER3_REGNUM = E_R3_REGNUM,
45
  E_R4_REGNUM, E_ER4_REGNUM = E_R4_REGNUM,
46
  E_R5_REGNUM, E_ER5_REGNUM = E_R5_REGNUM,
47
  E_R6_REGNUM, E_ER6_REGNUM = E_R6_REGNUM, E_FP_REGNUM = E_R6_REGNUM,
48
  E_SP_REGNUM,
49
  E_CCR_REGNUM,
50
  E_PC_REGNUM,
51
  E_CYCLES_REGNUM,
52
  E_TICK_REGNUM, E_EXR_REGNUM = E_TICK_REGNUM,
53
  E_INST_REGNUM, E_TICKS_REGNUM = E_INST_REGNUM,
54
  E_INSTS_REGNUM,
55
  E_MACH_REGNUM,
56
  E_MACL_REGNUM,
57
  E_SBR_REGNUM,
58
  E_VBR_REGNUM
59
};
60
 
61
#define H8300_MAX_NUM_REGS 18
62
 
63
#define E_PSEUDO_CCR_REGNUM(gdbarch) (gdbarch_num_regs (gdbarch))
64
#define E_PSEUDO_EXR_REGNUM(gdbarch) (gdbarch_num_regs (gdbarch)+1)
65
 
66
struct h8300_frame_cache
67
{
68
  /* Base address.  */
69
  CORE_ADDR base;
70
  CORE_ADDR sp_offset;
71
  CORE_ADDR pc;
72
 
73
  /* Flag showing that a frame has been created in the prologue code. */
74
  int uses_fp;
75
 
76
  /* Saved registers.  */
77
  CORE_ADDR saved_regs[H8300_MAX_NUM_REGS];
78
  CORE_ADDR saved_sp;
79
};
80
 
81
enum
82
{
83
  h8300_reg_size = 2,
84
  h8300h_reg_size = 4,
85
  h8300_max_reg_size = 4,
86
};
87
 
88
static int is_h8300hmode (struct gdbarch *gdbarch);
89
static int is_h8300smode (struct gdbarch *gdbarch);
90
static int is_h8300sxmode (struct gdbarch *gdbarch);
91
static int is_h8300_normal_mode (struct gdbarch *gdbarch);
92
 
93
#define BINWORD(gdbarch) ((is_h8300hmode (gdbarch) \
94
                  && !is_h8300_normal_mode (gdbarch)) \
95
                 ? h8300h_reg_size : h8300_reg_size)
96
 
97
static CORE_ADDR
98
h8300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
99
{
100
  return frame_unwind_register_unsigned (next_frame, E_PC_REGNUM);
101
}
102
 
103
static CORE_ADDR
104
h8300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
105
{
106
  return frame_unwind_register_unsigned (next_frame, E_SP_REGNUM);
107
}
108
 
109
static struct frame_id
110
h8300_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
111
{
112
  return frame_id_build (h8300_unwind_sp (gdbarch, next_frame),
113
                         frame_pc_unwind (next_frame));
114
}
115
 
116
/* Normal frames.  */
117
 
118
/* Allocate and initialize a frame cache.  */
119
 
120
static void
121
h8300_init_frame_cache (struct gdbarch *gdbarch,
122
                        struct h8300_frame_cache *cache)
123
{
124
  int i;
125
 
126
  /* Base address.  */
127
  cache->base = 0;
128
  cache->sp_offset = 0;
129
  cache->pc = 0;
130
 
131
  /* Frameless until proven otherwise.  */
132
  cache->uses_fp = 0;
133
 
134
  /* Saved registers.  We initialize these to -1 since zero is a valid
135
     offset (that's where %fp is supposed to be stored).  */
136
  for (i = 0; i < gdbarch_num_regs (gdbarch); i++)
137
    cache->saved_regs[i] = -1;
138
}
139
 
140
#define IS_MOVB_RnRm(x)         (((x) & 0xff88) == 0x0c88)
141
#define IS_MOVW_RnRm(x)         (((x) & 0xff88) == 0x0d00)
142
#define IS_MOVL_RnRm(x)         (((x) & 0xff88) == 0x0f80)
143
#define IS_MOVB_Rn16_SP(x)      (((x) & 0xfff0) == 0x6ee0)
144
#define IS_MOVB_EXT(x)          ((x) == 0x7860)
145
#define IS_MOVB_Rn24_SP(x)      (((x) & 0xfff0) == 0x6aa0)
146
#define IS_MOVW_Rn16_SP(x)      (((x) & 0xfff0) == 0x6fe0)
147
#define IS_MOVW_EXT(x)          ((x) == 0x78e0)
148
#define IS_MOVW_Rn24_SP(x)      (((x) & 0xfff0) == 0x6ba0)
149
/* Same instructions as mov.w, just prefixed with 0x0100 */
150
#define IS_MOVL_PRE(x)          ((x) == 0x0100)
151
#define IS_MOVL_Rn16_SP(x)      (((x) & 0xfff0) == 0x6fe0)
152
#define IS_MOVL_EXT(x)          ((x) == 0x78e0)
153
#define IS_MOVL_Rn24_SP(x)      (((x) & 0xfff0) == 0x6ba0)
154
 
155
#define IS_PUSHFP_MOVESPFP(x)   ((x) == 0x6df60d76)
156
#define IS_PUSH_FP(x)           ((x) == 0x01006df6)
157
#define IS_MOV_SP_FP(x)         ((x) == 0x0ff6)
158
#define IS_SUB2_SP(x)           ((x) == 0x1b87)
159
#define IS_SUB4_SP(x)           ((x) == 0x1b97)
160
#define IS_ADD_IMM_SP(x)        ((x) == 0x7a1f)
161
#define IS_SUB_IMM_SP(x)        ((x) == 0x7a3f)
162
#define IS_SUBL4_SP(x)          ((x) == 0x1acf)
163
#define IS_MOV_IMM_Rn(x)        (((x) & 0xfff0) == 0x7905)
164
#define IS_SUB_RnSP(x)          (((x) & 0xff0f) == 0x1907)
165
#define IS_ADD_RnSP(x)          (((x) & 0xff0f) == 0x0907)
166
#define IS_PUSH(x)              (((x) & 0xfff0) == 0x6df0)
167
 
168
/* If the instruction at PC is an argument register spill, return its
169
   length.  Otherwise, return zero.
170
 
171
   An argument register spill is an instruction that moves an argument
172
   from the register in which it was passed to the stack slot in which
173
   it really lives.  It is a byte, word, or longword move from an
174
   argument register to a negative offset from the frame pointer.
175
 
176
   CV, 2003-06-16: Or, in optimized code or when the `register' qualifier
177
   is used, it could be a byte, word or long move to registers r3-r5.  */
178
 
179
static int
180
h8300_is_argument_spill (CORE_ADDR pc)
181
{
182
  int w = read_memory_unsigned_integer (pc, 2);
183
 
184
  if ((IS_MOVB_RnRm (w) || IS_MOVW_RnRm (w) || IS_MOVL_RnRm (w))
185
      && (w & 0x70) <= 0x20     /* Rs is R0, R1 or R2 */
186
      && (w & 0x7) >= 0x3 && (w & 0x7) <= 0x5)  /* Rd is R3, R4 or R5 */
187
    return 2;
188
 
189
  if (IS_MOVB_Rn16_SP (w)
190
      && 8 <= (w & 0xf) && (w & 0xf) <= 10)     /* Rs is R0L, R1L, or R2L  */
191
    {
192
      if (read_memory_integer (pc + 2, 2) < 0)   /* ... and d:16 is negative.  */
193
        return 4;
194
    }
195
  else if (IS_MOVB_EXT (w))
196
    {
197
      if (IS_MOVB_Rn24_SP (read_memory_unsigned_integer (pc + 2, 2)))
198
        {
199
          LONGEST disp = read_memory_integer (pc + 4, 4);
200
 
201
          /* ... and d:24 is negative.  */
202
          if (disp < 0 && disp > 0xffffff)
203
            return 8;
204
        }
205
    }
206
  else if (IS_MOVW_Rn16_SP (w)
207
           && (w & 0xf) <= 2)   /* Rs is R0, R1, or R2 */
208
    {
209
      /* ... and d:16 is negative.  */
210
      if (read_memory_integer (pc + 2, 2) < 0)
211
        return 4;
212
    }
213
  else if (IS_MOVW_EXT (w))
214
    {
215
      if (IS_MOVW_Rn24_SP (read_memory_unsigned_integer (pc + 2, 2)))
216
        {
217
          LONGEST disp = read_memory_integer (pc + 4, 4);
218
 
219
          /* ... and d:24 is negative.  */
220
          if (disp < 0 && disp > 0xffffff)
221
            return 8;
222
        }
223
    }
224
  else if (IS_MOVL_PRE (w))
225
    {
226
      int w2 = read_memory_integer (pc + 2, 2);
227
 
228
      if (IS_MOVL_Rn16_SP (w2)
229
          && (w2 & 0xf) <= 2)   /* Rs is ER0, ER1, or ER2 */
230
        {
231
          /* ... and d:16 is negative.  */
232
          if (read_memory_integer (pc + 4, 2) < 0)
233
            return 6;
234
        }
235
      else if (IS_MOVL_EXT (w2))
236
        {
237
          int w3 = read_memory_integer (pc + 4, 2);
238
 
239
          if (IS_MOVL_Rn24_SP (read_memory_integer (pc + 4, 2)))
240
            {
241
              LONGEST disp = read_memory_integer (pc + 6, 4);
242
 
243
              /* ... and d:24 is negative.  */
244
              if (disp < 0 && disp > 0xffffff)
245
                return 10;
246
            }
247
        }
248
    }
249
 
250
  return 0;
251
}
252
 
253
/* Do a full analysis of the prologue at PC and update CACHE
254
   accordingly.  Bail out early if CURRENT_PC is reached.  Return the
255
   address where the analysis stopped.
256
 
257
   We handle all cases that can be generated by gcc.
258
 
259
   For allocating a stack frame:
260
 
261
   mov.w r6,@-sp
262
   mov.w sp,r6
263
   mov.w #-n,rN
264
   add.w rN,sp
265
 
266
   mov.w r6,@-sp
267
   mov.w sp,r6
268
   subs  #2,sp
269
   (repeat)
270
 
271
   mov.l er6,@-sp
272
   mov.l sp,er6
273
   add.l #-n,sp
274
 
275
   mov.w r6,@-sp
276
   mov.w sp,r6
277
   subs  #4,sp
278
   (repeat)
279
 
280
   For saving registers:
281
 
282
   mov.w rN,@-sp
283
   mov.l erN,@-sp
284
   stm.l reglist,@-sp
285
 
286
   */
287
 
288
static CORE_ADDR
289
h8300_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc,
290
                        struct h8300_frame_cache *cache)
291
{
292
  unsigned int op;
293
  int regno, i, spill_size;
294
 
295
  cache->sp_offset = 0;
296
 
297
  if (pc >= current_pc)
298
    return current_pc;
299
 
300
  op = read_memory_unsigned_integer (pc, 4);
301
 
302
  if (IS_PUSHFP_MOVESPFP (op))
303
    {
304
      cache->saved_regs[E_FP_REGNUM] = 0;
305
      cache->uses_fp = 1;
306
      pc += 4;
307
    }
308
  else if (IS_PUSH_FP (op))
309
    {
310
      cache->saved_regs[E_FP_REGNUM] = 0;
311
      pc += 4;
312
      if (pc >= current_pc)
313
        return current_pc;
314
      op = read_memory_unsigned_integer (pc, 2);
315
      if (IS_MOV_SP_FP (op))
316
        {
317
          cache->uses_fp = 1;
318
          pc += 2;
319
        }
320
    }
321
 
322
  while (pc < current_pc)
323
    {
324
      op = read_memory_unsigned_integer (pc, 2);
325
      if (IS_SUB2_SP (op))
326
        {
327
          cache->sp_offset += 2;
328
          pc += 2;
329
        }
330
      else if (IS_SUB4_SP (op))
331
        {
332
          cache->sp_offset += 4;
333
          pc += 2;
334
        }
335
      else if (IS_ADD_IMM_SP (op))
336
        {
337
          cache->sp_offset += -read_memory_integer (pc + 2, 2);
338
          pc += 4;
339
        }
340
      else if (IS_SUB_IMM_SP (op))
341
        {
342
          cache->sp_offset += read_memory_integer (pc + 2, 2);
343
          pc += 4;
344
        }
345
      else if (IS_SUBL4_SP (op))
346
        {
347
          cache->sp_offset += 4;
348
          pc += 2;
349
        }
350
      else if (IS_MOV_IMM_Rn (op))
351
        {
352
          int offset = read_memory_integer (pc + 2, 2);
353
          regno = op & 0x000f;
354
          op = read_memory_unsigned_integer (pc + 4, 2);
355
          if (IS_ADD_RnSP (op) && (op & 0x00f0) == regno)
356
            {
357
              cache->sp_offset -= offset;
358
              pc += 6;
359
            }
360
          else if (IS_SUB_RnSP (op) && (op & 0x00f0) == regno)
361
            {
362
              cache->sp_offset += offset;
363
              pc += 6;
364
            }
365
          else
366
            break;
367
        }
368
      else if (IS_PUSH (op))
369
        {
370
          regno = op & 0x000f;
371
          cache->sp_offset += 2;
372
          cache->saved_regs[regno] = cache->sp_offset;
373
          pc += 2;
374
        }
375
      else if (op == 0x0100)
376
        {
377
          op = read_memory_unsigned_integer (pc + 2, 2);
378
          if (IS_PUSH (op))
379
            {
380
              regno = op & 0x000f;
381
              cache->sp_offset += 4;
382
              cache->saved_regs[regno] = cache->sp_offset;
383
              pc += 4;
384
            }
385
          else
386
            break;
387
        }
388
      else if ((op & 0xffcf) == 0x0100)
389
        {
390
          int op1;
391
          op1 = read_memory_unsigned_integer (pc + 2, 2);
392
          if (IS_PUSH (op1))
393
            {
394
              /* Since the prefix is 0x01x0, this is not a simple pushm but a
395
                 stm.l reglist,@-sp */
396
              i = ((op & 0x0030) >> 4) + 1;
397
              regno = op1 & 0x000f;
398
              for (; i > 0; regno++, --i)
399
                {
400
                  cache->sp_offset += 4;
401
                  cache->saved_regs[regno] = cache->sp_offset;
402
                }
403
              pc += 4;
404
            }
405
          else
406
            break;
407
        }
408
      else
409
        break;
410
    }
411
 
412
  /* Check for spilling an argument register to the stack frame.
413
     This could also be an initializing store from non-prologue code,
414
     but I don't think there's any harm in skipping that.  */
415
  while ((spill_size = h8300_is_argument_spill (pc)) > 0
416
         && pc + spill_size <= current_pc)
417
    pc += spill_size;
418
 
419
  return pc;
420
}
421
 
422
static struct h8300_frame_cache *
423
h8300_frame_cache (struct frame_info *next_frame, void **this_cache)
424
{
425
  struct gdbarch *gdbarch = get_frame_arch (next_frame);
426
  struct h8300_frame_cache *cache;
427
  char buf[4];
428
  int i;
429
  CORE_ADDR current_pc;
430
 
431
  if (*this_cache)
432
    return *this_cache;
433
 
434
  cache = FRAME_OBSTACK_ZALLOC (struct h8300_frame_cache);
435
  h8300_init_frame_cache (gdbarch, cache);
436
  *this_cache = cache;
437
 
438
  /* In principle, for normal frames, %fp holds the frame pointer,
439
     which holds the base address for the current stack frame.
440
     However, for functions that don't need it, the frame pointer is
441
     optional.  For these "frameless" functions the frame pointer is
442
     actually the frame pointer of the calling frame.  */
443
 
444
  cache->base = frame_unwind_register_unsigned (next_frame, E_FP_REGNUM);
445
  if (cache->base == 0)
446
    return cache;
447
 
448
  cache->saved_regs[E_PC_REGNUM] = -BINWORD (gdbarch);
449
 
450
  cache->pc = frame_func_unwind (next_frame, NORMAL_FRAME);
451
  current_pc = frame_pc_unwind (next_frame);
452
  if (cache->pc != 0)
453
    h8300_analyze_prologue (cache->pc, current_pc, cache);
454
 
455
  if (!cache->uses_fp)
456
    {
457
      /* We didn't find a valid frame, which means that CACHE->base
458
         currently holds the frame pointer for our calling frame.  If
459
         we're at the start of a function, or somewhere half-way its
460
         prologue, the function's frame probably hasn't been fully
461
         setup yet.  Try to reconstruct the base address for the stack
462
         frame by looking at the stack pointer.  For truly "frameless"
463
         functions this might work too.  */
464
 
465
      cache->base = frame_unwind_register_unsigned (next_frame, E_SP_REGNUM)
466
                    + cache->sp_offset;
467
      cache->saved_sp = cache->base + BINWORD (gdbarch);
468
      cache->saved_regs[E_PC_REGNUM] = 0;
469
    }
470
  else
471
    {
472
      cache->saved_sp = cache->base + 2 * BINWORD (gdbarch);
473
      cache->saved_regs[E_PC_REGNUM] = -BINWORD (gdbarch);
474
    }
475
 
476
  /* Adjust all the saved registers such that they contain addresses
477
     instead of offsets.  */
478
  for (i = 0; i < gdbarch_num_regs (gdbarch); i++)
479
    if (cache->saved_regs[i] != -1)
480
      cache->saved_regs[i] = cache->base - cache->saved_regs[i];
481
 
482
  return cache;
483
}
484
 
485
static void
486
h8300_frame_this_id (struct frame_info *next_frame, void **this_cache,
487
                     struct frame_id *this_id)
488
{
489
  struct h8300_frame_cache *cache =
490
    h8300_frame_cache (next_frame, this_cache);
491
 
492
  /* This marks the outermost frame.  */
493
  if (cache->base == 0)
494
    return;
495
 
496
  *this_id = frame_id_build (cache->saved_sp, cache->pc);
497
}
498
 
499
static void
500
h8300_frame_prev_register (struct frame_info *next_frame, void **this_cache,
501
                           int regnum, int *optimizedp,
502
                           enum lval_type *lvalp, CORE_ADDR *addrp,
503
                           int *realnump, gdb_byte *valuep)
504
{
505
  struct gdbarch *gdbarch = get_frame_arch (next_frame);
506
  struct h8300_frame_cache *cache =
507
    h8300_frame_cache (next_frame, this_cache);
508
 
509
  gdb_assert (regnum >= 0);
510
 
511
  if (regnum == E_SP_REGNUM && cache->saved_sp)
512
    {
513
      *optimizedp = 0;
514
      *lvalp = not_lval;
515
      *addrp = 0;
516
      *realnump = -1;
517
      if (valuep)
518
        store_unsigned_integer (valuep, BINWORD (gdbarch), cache->saved_sp);
519
      return;
520
    }
521
 
522
  if (regnum < gdbarch_num_regs (gdbarch)
523
      && cache->saved_regs[regnum] != -1)
524
    {
525
      *optimizedp = 0;
526
      *lvalp = lval_memory;
527
      *addrp = cache->saved_regs[regnum];
528
      *realnump = -1;
529
      if (valuep)
530
        read_memory (*addrp, valuep, register_size (gdbarch, regnum));
531
      return;
532
    }
533
 
534
  *optimizedp = 0;
535
  *lvalp = lval_register;
536
  *addrp = 0;
537
  *realnump = regnum;
538
  if (valuep)
539
    frame_unwind_register (next_frame, *realnump, valuep);
540
}
541
 
542
static const struct frame_unwind h8300_frame_unwind = {
543
  NORMAL_FRAME,
544
  h8300_frame_this_id,
545
  h8300_frame_prev_register
546
};
547
 
548
static const struct frame_unwind *
549
h8300_frame_sniffer (struct frame_info *next_frame)
550
{
551
  return &h8300_frame_unwind;
552
}
553
 
554
static CORE_ADDR
555
h8300_frame_base_address (struct frame_info *next_frame, void **this_cache)
556
{
557
  struct h8300_frame_cache *cache = h8300_frame_cache (next_frame, this_cache);
558
  return cache->base;
559
}
560
 
561
static const struct frame_base h8300_frame_base = {
562
  &h8300_frame_unwind,
563
  h8300_frame_base_address,
564
  h8300_frame_base_address,
565
  h8300_frame_base_address
566
};
567
 
568
static CORE_ADDR
569
h8300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
570
{
571
  CORE_ADDR func_addr = 0 , func_end = 0;
572
 
573
  if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
574
    {
575
      struct symtab_and_line sal;
576
      struct h8300_frame_cache cache;
577
 
578
      /* Found a function.  */
579
      sal = find_pc_line (func_addr, 0);
580
      if (sal.end && sal.end < func_end)
581
        /* Found a line number, use it as end of prologue.  */
582
        return sal.end;
583
 
584
      /* No useable line symbol.  Use prologue parsing method.  */
585
      h8300_init_frame_cache (gdbarch, &cache);
586
      return h8300_analyze_prologue (func_addr, func_end, &cache);
587
    }
588
 
589
  /* No function symbol -- just return the PC.  */
590
  return (CORE_ADDR) pc;
591
}
592
 
593
/* Function: push_dummy_call
594
   Setup the function arguments for calling a function in the inferior.
595
   In this discussion, a `word' is 16 bits on the H8/300s, and 32 bits
596
   on the H8/300H.
597
 
598
   There are actually two ABI's here: -mquickcall (the default) and
599
   -mno-quickcall.  With -mno-quickcall, all arguments are passed on
600
   the stack after the return address, word-aligned.  With
601
   -mquickcall, GCC tries to use r0 -- r2 to pass registers.  Since
602
   GCC doesn't indicate in the object file which ABI was used to
603
   compile it, GDB only supports the default --- -mquickcall.
604
 
605
   Here are the rules for -mquickcall, in detail:
606
 
607
   Each argument, whether scalar or aggregate, is padded to occupy a
608
   whole number of words.  Arguments smaller than a word are padded at
609
   the most significant end; those larger than a word are padded at
610
   the least significant end.
611
 
612
   The initial arguments are passed in r0 -- r2.  Earlier arguments go in
613
   lower-numbered registers.  Multi-word arguments are passed in
614
   consecutive registers, with the most significant end in the
615
   lower-numbered register.
616
 
617
   If an argument doesn't fit entirely in the remaining registers, it
618
   is passed entirely on the stack.  Stack arguments begin just after
619
   the return address.  Once an argument has overflowed onto the stack
620
   this way, all subsequent arguments are passed on the stack.
621
 
622
   The above rule has odd consequences.  For example, on the h8/300s,
623
   if a function takes two longs and an int as arguments:
624
   - the first long will be passed in r0/r1,
625
   - the second long will be passed entirely on the stack, since it
626
     doesn't fit in r2,
627
   - and the int will be passed on the stack, even though it could fit
628
     in r2.
629
 
630
   A weird exception: if an argument is larger than a word, but not a
631
   whole number of words in length (before padding), it is passed on
632
   the stack following the rules for stack arguments above, even if
633
   there are sufficient registers available to hold it.  Stranger
634
   still, the argument registers are still `used up' --- even though
635
   there's nothing in them.
636
 
637
   So, for example, on the h8/300s, if a function expects a three-byte
638
   structure and an int, the structure will go on the stack, and the
639
   int will go in r2, not r0.
640
 
641
   If the function returns an aggregate type (struct, union, or class)
642
   by value, the caller must allocate space to hold the return value,
643
   and pass the callee a pointer to this space as an invisible first
644
   argument, in R0.
645
 
646
   For varargs functions, the last fixed argument and all the variable
647
   arguments are always passed on the stack.  This means that calls to
648
   varargs functions don't work properly unless there is a prototype
649
   in scope.
650
 
651
   Basically, this ABI is not good, for the following reasons:
652
   - You can't call vararg functions properly unless a prototype is in scope.
653
   - Structure passing is inconsistent, to no purpose I can see.
654
   - It often wastes argument registers, of which there are only three
655
     to begin with.  */
656
 
657
static CORE_ADDR
658
h8300_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
659
                       struct regcache *regcache, CORE_ADDR bp_addr,
660
                       int nargs, struct value **args, CORE_ADDR sp,
661
                       int struct_return, CORE_ADDR struct_addr)
662
{
663
  int stack_alloc = 0, stack_offset = 0;
664
  int wordsize = BINWORD (gdbarch);
665
  int reg = E_ARG0_REGNUM;
666
  int argument;
667
 
668
  /* First, make sure the stack is properly aligned.  */
669
  sp = align_down (sp, wordsize);
670
 
671
  /* Now make sure there's space on the stack for the arguments.  We
672
     may over-allocate a little here, but that won't hurt anything.  */
673
  for (argument = 0; argument < nargs; argument++)
674
    stack_alloc += align_up (TYPE_LENGTH (value_type (args[argument])),
675
                             wordsize);
676
  sp -= stack_alloc;
677
 
678
  /* Now load as many arguments as possible into registers, and push
679
     the rest onto the stack.
680
     If we're returning a structure by value, then we must pass a
681
     pointer to the buffer for the return value as an invisible first
682
     argument.  */
683
  if (struct_return)
684
    regcache_cooked_write_unsigned (regcache, reg++, struct_addr);
685
 
686
  for (argument = 0; argument < nargs; argument++)
687
    {
688
      struct type *type = value_type (args[argument]);
689
      int len = TYPE_LENGTH (type);
690
      char *contents = (char *) value_contents (args[argument]);
691
 
692
      /* Pad the argument appropriately.  */
693
      int padded_len = align_up (len, wordsize);
694
      gdb_byte *padded = alloca (padded_len);
695
 
696
      memset (padded, 0, padded_len);
697
      memcpy (len < wordsize ? padded + padded_len - len : padded,
698
              contents, len);
699
 
700
      /* Could the argument fit in the remaining registers?  */
701
      if (padded_len <= (E_ARGLAST_REGNUM - reg + 1) * wordsize)
702
        {
703
          /* Are we going to pass it on the stack anyway, for no good
704
             reason?  */
705
          if (len > wordsize && len % wordsize)
706
            {
707
              /* I feel so unclean.  */
708
              write_memory (sp + stack_offset, padded, padded_len);
709
              stack_offset += padded_len;
710
 
711
              /* That's right --- even though we passed the argument
712
                 on the stack, we consume the registers anyway!  Love
713
                 me, love my dog.  */
714
              reg += padded_len / wordsize;
715
            }
716
          else
717
            {
718
              /* Heavens to Betsy --- it's really going in registers!
719
                 It would be nice if we could use write_register_bytes
720
                 here, but on the h8/300s, there are gaps between
721
                 the registers in the register file.  */
722
              int offset;
723
 
724
              for (offset = 0; offset < padded_len; offset += wordsize)
725
                {
726
                  ULONGEST word = extract_unsigned_integer (padded + offset,
727
                                                            wordsize);
728
                  regcache_cooked_write_unsigned (regcache, reg++, word);
729
                }
730
            }
731
        }
732
      else
733
        {
734
          /* It doesn't fit in registers!  Onto the stack it goes.  */
735
          write_memory (sp + stack_offset, padded, padded_len);
736
          stack_offset += padded_len;
737
 
738
          /* Once one argument has spilled onto the stack, all
739
             subsequent arguments go on the stack.  */
740
          reg = E_ARGLAST_REGNUM + 1;
741
        }
742
    }
743
 
744
  /* Store return address.  */
745
  sp -= wordsize;
746
  write_memory_unsigned_integer (sp, wordsize, bp_addr);
747
 
748
  /* Update stack pointer.  */
749
  regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
750
 
751
  /* Return the new stack pointer minus the return address slot since
752
     that's what DWARF2/GCC uses as the frame's CFA.  */
753
  return sp + wordsize;
754
}
755
 
756
/* Function: extract_return_value
757
   Figure out where in REGBUF the called function has left its return value.
758
   Copy that into VALBUF.  Be sure to account for CPU type.   */
759
 
760
static void
761
h8300_extract_return_value (struct type *type, struct regcache *regcache,
762
                            void *valbuf)
763
{
764
  int len = TYPE_LENGTH (type);
765
  ULONGEST c, addr;
766
 
767
  switch (len)
768
    {
769
    case 1:
770
    case 2:
771
      regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
772
      store_unsigned_integer (valbuf, len, c);
773
      break;
774
    case 4:                     /* Needs two registers on plain H8/300 */
775
      regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
776
      store_unsigned_integer (valbuf, 2, c);
777
      regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
778
      store_unsigned_integer ((void *) ((char *) valbuf + 2), 2, c);
779
      break;
780
    case 8:                     /* long long is now 8 bytes.  */
781
      if (TYPE_CODE (type) == TYPE_CODE_INT)
782
        {
783
          regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr);
784
          c = read_memory_unsigned_integer ((CORE_ADDR) addr, len);
785
          store_unsigned_integer (valbuf, len, c);
786
        }
787
      else
788
        {
789
          error ("I don't know how this 8 byte value is returned.");
790
        }
791
      break;
792
    }
793
}
794
 
795
static void
796
h8300h_extract_return_value (struct type *type, struct regcache *regcache,
797
                             void *valbuf)
798
{
799
  int len = TYPE_LENGTH (type);
800
  ULONGEST c, addr;
801
 
802
  switch (len)
803
    {
804
    case 1:
805
    case 2:
806
    case 4:
807
      regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
808
      store_unsigned_integer (valbuf, len, c);
809
      break;
810
    case 8:                     /* long long is now 8 bytes.  */
811
      if (TYPE_CODE (type) == TYPE_CODE_INT)
812
        {
813
          regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
814
          store_unsigned_integer (valbuf, 4, c);
815
          regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
816
          store_unsigned_integer ((void *) ((char *) valbuf + 4), 4, c);
817
        }
818
      else
819
        {
820
          error ("I don't know how this 8 byte value is returned.");
821
        }
822
      break;
823
    }
824
}
825
 
826
int
827
h8300_use_struct_convention (struct type *value_type)
828
{
829
  /* Types of 1, 2 or 4 bytes are returned in R0/R1, everything else on the
830
     stack. */
831
 
832
  if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT
833
      || TYPE_CODE (value_type) == TYPE_CODE_UNION)
834
    return 1;
835
  return !(TYPE_LENGTH (value_type) == 1
836
           || TYPE_LENGTH (value_type) == 2
837
           || TYPE_LENGTH (value_type) == 4);
838
}
839
 
840
int
841
h8300h_use_struct_convention (struct type *value_type)
842
{
843
  /* Types of 1, 2 or 4 bytes are returned in R0, INT types of 8 bytes are
844
     returned in R0/R1, everything else on the stack. */
845
  if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT
846
      || TYPE_CODE (value_type) == TYPE_CODE_UNION)
847
    return 1;
848
  return !(TYPE_LENGTH (value_type) == 1
849
           || TYPE_LENGTH (value_type) == 2
850
           || TYPE_LENGTH (value_type) == 4
851
           || (TYPE_LENGTH (value_type) == 8
852
               && TYPE_CODE (value_type) == TYPE_CODE_INT));
853
}
854
 
855
/* Function: store_return_value
856
   Place the appropriate value in the appropriate registers.
857
   Primarily used by the RETURN command.  */
858
 
859
static void
860
h8300_store_return_value (struct type *type, struct regcache *regcache,
861
                          const void *valbuf)
862
{
863
  int len = TYPE_LENGTH (type);
864
  ULONGEST val;
865
 
866
  switch (len)
867
    {
868
    case 1:
869
    case 2:                     /* short... */
870
      val = extract_unsigned_integer (valbuf, len);
871
      regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
872
      break;
873
    case 4:                     /* long, float */
874
      val = extract_unsigned_integer (valbuf, len);
875
      regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
876
                                      (val >> 16) & 0xffff);
877
      regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, val & 0xffff);
878
      break;
879
    case 8:                     /* long long, double and long double are all defined
880
                                   as 4 byte types so far so this shouldn't happen.  */
881
      error ("I don't know how to return an 8 byte value.");
882
      break;
883
    }
884
}
885
 
886
static void
887
h8300h_store_return_value (struct type *type, struct regcache *regcache,
888
                           const void *valbuf)
889
{
890
  int len = TYPE_LENGTH (type);
891
  ULONGEST val;
892
 
893
  switch (len)
894
    {
895
    case 1:
896
    case 2:
897
    case 4:                     /* long, float */
898
      val = extract_unsigned_integer (valbuf, len);
899
      regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
900
      break;
901
    case 8:
902
      val = extract_unsigned_integer (valbuf, len);
903
      regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
904
                                      (val >> 32) & 0xffffffff);
905
      regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM,
906
                                      val & 0xffffffff);
907
      break;
908
    }
909
}
910
 
911
static enum return_value_convention
912
h8300_return_value (struct gdbarch *gdbarch, struct type *type,
913
                    struct regcache *regcache,
914
                    gdb_byte *readbuf, const gdb_byte *writebuf)
915
{
916
  if (h8300_use_struct_convention (type))
917
    return RETURN_VALUE_STRUCT_CONVENTION;
918
  if (writebuf)
919
    h8300_store_return_value (type, regcache, writebuf);
920
  else if (readbuf)
921
    h8300_extract_return_value (type, regcache, readbuf);
922
  return RETURN_VALUE_REGISTER_CONVENTION;
923
}
924
 
925
static enum return_value_convention
926
h8300h_return_value (struct gdbarch *gdbarch, struct type *type,
927
                     struct regcache *regcache,
928
                     gdb_byte *readbuf, const gdb_byte *writebuf)
929
{
930
  if (h8300h_use_struct_convention (type))
931
    {
932
      if (readbuf)
933
        {
934
          ULONGEST addr;
935
 
936
          regcache_raw_read_unsigned (regcache, E_R0_REGNUM, &addr);
937
          read_memory (addr, readbuf, TYPE_LENGTH (type));
938
        }
939
 
940
      return RETURN_VALUE_ABI_RETURNS_ADDRESS;
941
    }
942
  if (writebuf)
943
    h8300h_store_return_value (type, regcache, writebuf);
944
  else if (readbuf)
945
    h8300h_extract_return_value (type, regcache, readbuf);
946
  return RETURN_VALUE_REGISTER_CONVENTION;
947
}
948
 
949
static struct cmd_list_element *setmachinelist;
950
 
951
static const char *
952
h8300_register_name (struct gdbarch *gdbarch, int regno)
953
{
954
  /* The register names change depending on which h8300 processor
955
     type is selected. */
956
  static char *register_names[] = {
957
    "r0", "r1", "r2", "r3", "r4", "r5", "r6",
958
    "sp", "", "pc", "cycles", "tick", "inst",
959
    "ccr",                      /* pseudo register */
960
  };
961
  if (regno < 0
962
      || regno >= (sizeof (register_names) / sizeof (*register_names)))
963
    internal_error (__FILE__, __LINE__,
964
                    "h8300_register_name: illegal register number %d", regno);
965
  else
966
    return register_names[regno];
967
}
968
 
969
static const char *
970
h8300s_register_name (struct gdbarch *gdbarch, int regno)
971
{
972
  static char *register_names[] = {
973
    "er0", "er1", "er2", "er3", "er4", "er5", "er6",
974
    "sp", "", "pc", "cycles", "", "tick", "inst",
975
    "mach", "macl",
976
    "ccr", "exr"                /* pseudo registers */
977
  };
978
  if (regno < 0
979
      || regno >= (sizeof (register_names) / sizeof (*register_names)))
980
    internal_error (__FILE__, __LINE__,
981
                    "h8300s_register_name: illegal register number %d",
982
                    regno);
983
  else
984
    return register_names[regno];
985
}
986
 
987
static const char *
988
h8300sx_register_name (struct gdbarch *gdbarch, int regno)
989
{
990
  static char *register_names[] = {
991
    "er0", "er1", "er2", "er3", "er4", "er5", "er6",
992
    "sp", "", "pc", "cycles", "", "tick", "inst",
993
    "mach", "macl", "sbr", "vbr",
994
    "ccr", "exr"                /* pseudo registers */
995
  };
996
  if (regno < 0
997
      || regno >= (sizeof (register_names) / sizeof (*register_names)))
998
    internal_error (__FILE__, __LINE__,
999
                    "h8300sx_register_name: illegal register number %d",
1000
                    regno);
1001
  else
1002
    return register_names[regno];
1003
}
1004
 
1005
static void
1006
h8300_print_register (struct gdbarch *gdbarch, struct ui_file *file,
1007
                      struct frame_info *frame, int regno)
1008
{
1009
  LONGEST rval;
1010
  const char *name = gdbarch_register_name (gdbarch, regno);
1011
 
1012
  if (!name || !*name)
1013
    return;
1014
 
1015
  rval = get_frame_register_signed (frame, regno);
1016
 
1017
  fprintf_filtered (file, "%-14s ", name);
1018
  if ((regno == E_PSEUDO_CCR_REGNUM (gdbarch)) || \
1019
      (regno == E_PSEUDO_EXR_REGNUM (gdbarch) && is_h8300smode (gdbarch)))
1020
    {
1021
      fprintf_filtered (file, "0x%02x        ", (unsigned char) rval);
1022
      print_longest (file, 'u', 1, rval);
1023
    }
1024
  else
1025
    {
1026
      fprintf_filtered (file, "0x%s  ", phex ((ULONGEST) rval,
1027
                        BINWORD (gdbarch)));
1028
      print_longest (file, 'd', 1, rval);
1029
    }
1030
  if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
1031
    {
1032
      /* CCR register */
1033
      int C, Z, N, V;
1034
      unsigned char l = rval & 0xff;
1035
      fprintf_filtered (file, "\t");
1036
      fprintf_filtered (file, "I-%d ", (l & 0x80) != 0);
1037
      fprintf_filtered (file, "UI-%d ", (l & 0x40) != 0);
1038
      fprintf_filtered (file, "H-%d ", (l & 0x20) != 0);
1039
      fprintf_filtered (file, "U-%d ", (l & 0x10) != 0);
1040
      N = (l & 0x8) != 0;
1041
      Z = (l & 0x4) != 0;
1042
      V = (l & 0x2) != 0;
1043
      C = (l & 0x1) != 0;
1044
      fprintf_filtered (file, "N-%d ", N);
1045
      fprintf_filtered (file, "Z-%d ", Z);
1046
      fprintf_filtered (file, "V-%d ", V);
1047
      fprintf_filtered (file, "C-%d ", C);
1048
      if ((C | Z) == 0)
1049
        fprintf_filtered (file, "u> ");
1050
      if ((C | Z) == 1)
1051
        fprintf_filtered (file, "u<= ");
1052
      if ((C == 0))
1053
        fprintf_filtered (file, "u>= ");
1054
      if (C == 1)
1055
        fprintf_filtered (file, "u< ");
1056
      if (Z == 0)
1057
        fprintf_filtered (file, "!= ");
1058
      if (Z == 1)
1059
        fprintf_filtered (file, "== ");
1060
      if ((N ^ V) == 0)
1061
        fprintf_filtered (file, ">= ");
1062
      if ((N ^ V) == 1)
1063
        fprintf_filtered (file, "< ");
1064
      if ((Z | (N ^ V)) == 0)
1065
        fprintf_filtered (file, "> ");
1066
      if ((Z | (N ^ V)) == 1)
1067
        fprintf_filtered (file, "<= ");
1068
    }
1069
  else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch) && is_h8300smode (gdbarch))
1070
    {
1071
      /* EXR register */
1072
      unsigned char l = rval & 0xff;
1073
      fprintf_filtered (file, "\t");
1074
      fprintf_filtered (file, "T-%d - - - ", (l & 0x80) != 0);
1075
      fprintf_filtered (file, "I2-%d ", (l & 4) != 0);
1076
      fprintf_filtered (file, "I1-%d ", (l & 2) != 0);
1077
      fprintf_filtered (file, "I0-%d", (l & 1) != 0);
1078
    }
1079
  fprintf_filtered (file, "\n");
1080
}
1081
 
1082
static void
1083
h8300_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
1084
                            struct frame_info *frame, int regno, int cpregs)
1085
{
1086
  if (regno < 0)
1087
    {
1088
      for (regno = E_R0_REGNUM; regno <= E_SP_REGNUM; ++regno)
1089
        h8300_print_register (gdbarch, file, frame, regno);
1090
      h8300_print_register (gdbarch, file, frame,
1091
                            E_PSEUDO_CCR_REGNUM (gdbarch));
1092
      h8300_print_register (gdbarch, file, frame, E_PC_REGNUM);
1093
      if (is_h8300smode (gdbarch))
1094
        {
1095
          h8300_print_register (gdbarch, file, frame,
1096
                                E_PSEUDO_EXR_REGNUM (gdbarch));
1097
          if (is_h8300sxmode (gdbarch))
1098
            {
1099
              h8300_print_register (gdbarch, file, frame, E_SBR_REGNUM);
1100
              h8300_print_register (gdbarch, file, frame, E_VBR_REGNUM);
1101
            }
1102
          h8300_print_register (gdbarch, file, frame, E_MACH_REGNUM);
1103
          h8300_print_register (gdbarch, file, frame, E_MACL_REGNUM);
1104
          h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1105
          h8300_print_register (gdbarch, file, frame, E_TICKS_REGNUM);
1106
          h8300_print_register (gdbarch, file, frame, E_INSTS_REGNUM);
1107
        }
1108
      else
1109
        {
1110
          h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1111
          h8300_print_register (gdbarch, file, frame, E_TICK_REGNUM);
1112
          h8300_print_register (gdbarch, file, frame, E_INST_REGNUM);
1113
        }
1114
    }
1115
  else
1116
    {
1117
      if (regno == E_CCR_REGNUM)
1118
        h8300_print_register (gdbarch, file, frame,
1119
                              E_PSEUDO_CCR_REGNUM (gdbarch));
1120
      else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch)
1121
               && is_h8300smode (gdbarch))
1122
        h8300_print_register (gdbarch, file, frame,
1123
                              E_PSEUDO_EXR_REGNUM (gdbarch));
1124
      else
1125
        h8300_print_register (gdbarch, file, frame, regno);
1126
    }
1127
}
1128
 
1129
static struct type *
1130
h8300_register_type (struct gdbarch *gdbarch, int regno)
1131
{
1132
  if (regno < 0 || regno >= gdbarch_num_regs (gdbarch)
1133
                            + gdbarch_num_pseudo_regs (gdbarch))
1134
    internal_error (__FILE__, __LINE__,
1135
                    "h8300_register_type: illegal register number %d", regno);
1136
  else
1137
    {
1138
      switch (regno)
1139
        {
1140
        case E_PC_REGNUM:
1141
          return builtin_type_void_func_ptr;
1142
        case E_SP_REGNUM:
1143
        case E_FP_REGNUM:
1144
          return builtin_type_void_data_ptr;
1145
        default:
1146
          if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
1147
            return builtin_type_uint8;
1148
          else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch))
1149
            return builtin_type_uint8;
1150
          else if (is_h8300hmode (gdbarch))
1151
            return builtin_type_int32;
1152
          else
1153
            return builtin_type_int16;
1154
        }
1155
    }
1156
}
1157
 
1158
static void
1159
h8300_pseudo_register_read (struct gdbarch *gdbarch,
1160
                            struct regcache *regcache, int regno,
1161
                            gdb_byte *buf)
1162
{
1163
  if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
1164
    regcache_raw_read (regcache, E_CCR_REGNUM, buf);
1165
  else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch))
1166
    regcache_raw_read (regcache, E_EXR_REGNUM, buf);
1167
  else
1168
    regcache_raw_read (regcache, regno, buf);
1169
}
1170
 
1171
static void
1172
h8300_pseudo_register_write (struct gdbarch *gdbarch,
1173
                             struct regcache *regcache, int regno,
1174
                             const gdb_byte *buf)
1175
{
1176
  if (regno == E_PSEUDO_CCR_REGNUM (gdbarch))
1177
    regcache_raw_write (regcache, E_CCR_REGNUM, buf);
1178
  else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch))
1179
    regcache_raw_write (regcache, E_EXR_REGNUM, buf);
1180
  else
1181
    regcache_raw_write (regcache, regno, buf);
1182
}
1183
 
1184
static int
1185
h8300_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno)
1186
{
1187
  if (regno == E_CCR_REGNUM)
1188
    return E_PSEUDO_CCR_REGNUM (gdbarch);
1189
  return regno;
1190
}
1191
 
1192
static int
1193
h8300s_dbg_reg_to_regnum (struct gdbarch *gdbarch, int regno)
1194
{
1195
  if (regno == E_CCR_REGNUM)
1196
    return E_PSEUDO_CCR_REGNUM (gdbarch);
1197
  if (regno == E_EXR_REGNUM)
1198
    return E_PSEUDO_EXR_REGNUM (gdbarch);
1199
  return regno;
1200
}
1201
 
1202
const static unsigned char *
1203
h8300_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr,
1204
                          int *lenptr)
1205
{
1206
  /*static unsigned char breakpoint[] = { 0x7A, 0xFF }; *//* ??? */
1207
  static unsigned char breakpoint[] = { 0x01, 0x80 };   /* Sleep */
1208
 
1209
  *lenptr = sizeof (breakpoint);
1210
  return breakpoint;
1211
}
1212
 
1213
static void
1214
h8300_print_float_info (struct gdbarch *gdbarch, struct ui_file *file,
1215
                        struct frame_info *frame, const char *args)
1216
{
1217
  fprintf_filtered (file, "\
1218
No floating-point info available for this processor.\n");
1219
}
1220
 
1221
static struct gdbarch *
1222
h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1223
{
1224
  struct gdbarch_tdep *tdep = NULL;
1225
  struct gdbarch *gdbarch;
1226
 
1227
  arches = gdbarch_list_lookup_by_info (arches, &info);
1228
  if (arches != NULL)
1229
    return arches->gdbarch;
1230
 
1231
#if 0
1232
  tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
1233
#endif
1234
 
1235
  if (info.bfd_arch_info->arch != bfd_arch_h8300)
1236
    return NULL;
1237
 
1238
  gdbarch = gdbarch_alloc (&info, 0);
1239
 
1240
  switch (info.bfd_arch_info->mach)
1241
    {
1242
    case bfd_mach_h8300:
1243
      set_gdbarch_num_regs (gdbarch, 13);
1244
      set_gdbarch_num_pseudo_regs (gdbarch, 1);
1245
      set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1246
      set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1247
      set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1248
      set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1249
      set_gdbarch_register_name (gdbarch, h8300_register_name);
1250
      set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1251
      set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1252
      set_gdbarch_return_value (gdbarch, h8300_return_value);
1253
      set_gdbarch_print_insn (gdbarch, print_insn_h8300);
1254
      break;
1255
    case bfd_mach_h8300h:
1256
    case bfd_mach_h8300hn:
1257
      set_gdbarch_num_regs (gdbarch, 13);
1258
      set_gdbarch_num_pseudo_regs (gdbarch, 1);
1259
      set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1260
      set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1261
      set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1262
      set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1263
      set_gdbarch_register_name (gdbarch, h8300_register_name);
1264
      if (info.bfd_arch_info->mach != bfd_mach_h8300hn)
1265
        {
1266
          set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1267
          set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1268
        }
1269
      else
1270
        {
1271
          set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1272
          set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1273
        }
1274
      set_gdbarch_return_value (gdbarch, h8300h_return_value);
1275
      set_gdbarch_print_insn (gdbarch, print_insn_h8300h);
1276
      break;
1277
    case bfd_mach_h8300s:
1278
    case bfd_mach_h8300sn:
1279
      set_gdbarch_num_regs (gdbarch, 16);
1280
      set_gdbarch_num_pseudo_regs (gdbarch, 2);
1281
      set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1282
      set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1283
      set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1284
      set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1285
      set_gdbarch_register_name (gdbarch, h8300s_register_name);
1286
      if (info.bfd_arch_info->mach != bfd_mach_h8300sn)
1287
        {
1288
          set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1289
          set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1290
        }
1291
      else
1292
        {
1293
          set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1294
          set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1295
        }
1296
      set_gdbarch_return_value (gdbarch, h8300h_return_value);
1297
      set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
1298
      break;
1299
    case bfd_mach_h8300sx:
1300
    case bfd_mach_h8300sxn:
1301
      set_gdbarch_num_regs (gdbarch, 18);
1302
      set_gdbarch_num_pseudo_regs (gdbarch, 2);
1303
      set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1304
      set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1305
      set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1306
      set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1307
      set_gdbarch_register_name (gdbarch, h8300sx_register_name);
1308
      if (info.bfd_arch_info->mach != bfd_mach_h8300sxn)
1309
        {
1310
          set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1311
          set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1312
        }
1313
      else
1314
        {
1315
          set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1316
          set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1317
        }
1318
      set_gdbarch_return_value (gdbarch, h8300h_return_value);
1319
      set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
1320
      break;
1321
    }
1322
 
1323
  set_gdbarch_pseudo_register_read (gdbarch, h8300_pseudo_register_read);
1324
  set_gdbarch_pseudo_register_write (gdbarch, h8300_pseudo_register_write);
1325
 
1326
  /*
1327
   * Basic register fields and methods.
1328
   */
1329
 
1330
  set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
1331
  set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
1332
  set_gdbarch_register_type (gdbarch, h8300_register_type);
1333
  set_gdbarch_print_registers_info (gdbarch, h8300_print_registers_info);
1334
  set_gdbarch_print_float_info (gdbarch, h8300_print_float_info);
1335
 
1336
  /*
1337
   * Frame Info
1338
   */
1339
  set_gdbarch_skip_prologue (gdbarch, h8300_skip_prologue);
1340
 
1341
  /* Frame unwinder.  */
1342
  set_gdbarch_unwind_pc (gdbarch, h8300_unwind_pc);
1343
  set_gdbarch_unwind_sp (gdbarch, h8300_unwind_sp);
1344
  set_gdbarch_unwind_dummy_id (gdbarch, h8300_unwind_dummy_id);
1345
  frame_base_set_default (gdbarch, &h8300_frame_base);
1346
 
1347
  /*
1348
   * Miscelany
1349
   */
1350
  /* Stack grows up. */
1351
  set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1352
 
1353
  set_gdbarch_breakpoint_from_pc (gdbarch, h8300_breakpoint_from_pc);
1354
  set_gdbarch_push_dummy_call (gdbarch, h8300_push_dummy_call);
1355
 
1356
  set_gdbarch_char_signed (gdbarch, 0);
1357
  set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1358
  set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1359
  set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1360
  set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1361
  set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1362
 
1363
  set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1364
 
1365
  /* Hook in the DWARF CFI frame unwinder.  */
1366
  frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
1367
  frame_unwind_append_sniffer (gdbarch, h8300_frame_sniffer);
1368
 
1369
  return gdbarch;
1370
 
1371
}
1372
 
1373
extern initialize_file_ftype _initialize_h8300_tdep;    /* -Wmissing-prototypes */
1374
 
1375
void
1376
_initialize_h8300_tdep (void)
1377
{
1378
  register_gdbarch_init (bfd_arch_h8300, h8300_gdbarch_init);
1379
}
1380
 
1381
static int
1382
is_h8300hmode (struct gdbarch *gdbarch)
1383
{
1384
  return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1385
    || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1386
    || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1387
    || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1388
    || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300h
1389
    || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;
1390
}
1391
 
1392
static int
1393
is_h8300smode (struct gdbarch *gdbarch)
1394
{
1395
  return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1396
    || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1397
    || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1398
    || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn;
1399
}
1400
 
1401
static int
1402
is_h8300sxmode (struct gdbarch *gdbarch)
1403
{
1404
  return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1405
    || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn;
1406
}
1407
 
1408
static int
1409
is_h8300_normal_mode (struct gdbarch *gdbarch)
1410
{
1411
  return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1412
    || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1413
    || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;
1414
}

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