OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [gdb/] [i386-tdep.h] - Blame information for rev 461

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 24 jeremybenn
/* Target-dependent code for the i386.
2
 
3
   Copyright (C) 2001, 2002, 2003, 2004, 2006, 2007, 2008
4
   Free Software Foundation, Inc.
5
 
6
   This file is part of GDB.
7
 
8
   This program is free software; you can redistribute it and/or modify
9
   it under the terms of the GNU General Public License as published by
10
   the Free Software Foundation; either version 3 of the License, or
11
   (at your option) any later version.
12
 
13
   This program is distributed in the hope that it will be useful,
14
   but WITHOUT ANY WARRANTY; without even the implied warranty of
15
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16
   GNU General Public License for more details.
17
 
18
   You should have received a copy of the GNU General Public License
19
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
20
 
21
#ifndef I386_TDEP_H
22
#define I386_TDEP_H
23
 
24
struct frame_info;
25
struct gdbarch;
26
struct reggroup;
27
struct regset;
28
struct regcache;
29
 
30
/* GDB's i386 target supports both the 32-bit Intel Architecture
31
   (IA-32) and the 64-bit AMD x86-64 architecture.  Internally it uses
32
   a similar register layout for both.
33
 
34
   - General purpose registers
35
   - FPU data registers
36
   - FPU control registers
37
   - SSE data registers
38
   - SSE control register
39
 
40
   The general purpose registers for the x86-64 architecture are quite
41
   different from IA-32.  Therefore, gdbarch_fp0_regnum
42
   determines the register number at which the FPU data registers
43
   start.  The number of FPU data and control registers is the same
44
   for both architectures.  The number of SSE registers however,
45
   differs and is determined by the num_xmm_regs member of `struct
46
   gdbarch_tdep'.  */
47
 
48
/* Convention for returning structures.  */
49
 
50
enum struct_return
51
{
52
  pcc_struct_return,            /* Return "short" structures in memory.  */
53
  reg_struct_return             /* Return "short" structures in registers.  */
54
};
55
 
56
/* i386 architecture specific information.  */
57
struct gdbarch_tdep
58
{
59
  /* General-purpose registers.  */
60
  struct regset *gregset;
61
  int *gregset_reg_offset;
62
  int gregset_num_regs;
63
  size_t sizeof_gregset;
64
 
65
  /* Floating-point registers.  */
66
  struct regset *fpregset;
67
  size_t sizeof_fpregset;
68
 
69
  /* Register number for %st(0).  The register numbers for the other
70
     registers follow from this one.  Set this to -1 to indicate the
71
     absence of an FPU.  */
72
  int st0_regnum;
73
 
74
  /* Register number for %mm0.  Set this to -1 to indicate the absence
75
     of MMX support.  */
76
  int mm0_regnum;
77
 
78
  /* Number of SSE registers.  */
79
  int num_xmm_regs;
80
 
81
  /* Offset of saved PC in jmp_buf.  */
82
  int jb_pc_offset;
83
 
84
  /* Convention for returning structures.  */
85
  enum struct_return struct_return;
86
 
87
  /* Address range where sigtramp lives.  */
88
  CORE_ADDR sigtramp_start;
89
  CORE_ADDR sigtramp_end;
90
 
91
  /* Detect sigtramp.  */
92
  int (*sigtramp_p) (struct frame_info *);
93
 
94
  /* Get address of sigcontext for sigtramp.  */
95
  CORE_ADDR (*sigcontext_addr) (struct frame_info *);
96
 
97
  /* Offset of registers in `struct sigcontext'.  */
98
  int *sc_reg_offset;
99
  int sc_num_regs;
100
 
101
  /* Offset of saved PC and SP in `struct sigcontext'.  Usage of these
102
     is deprecated, please use `sc_reg_offset' instead.  */
103
  int sc_pc_offset;
104
  int sc_sp_offset;
105
 
106
  /* ISA-specific data types.  */
107
  struct type *i386_mmx_type;
108
  struct type *i386_sse_type;
109
};
110
 
111
/* Floating-point registers.  */
112
 
113
/* All FPU control regusters (except for FIOFF and FOOFF) are 16-bit
114
   (at most) in the FPU, but are zero-extended to 32 bits in GDB's
115
   register cache.  */
116
 
117
/* Return non-zero if REGNUM matches the FP register and the FP
118
   register set is active.  */
119
extern int i386_fp_regnum_p (int regnum);
120
extern int i386_fpc_regnum_p (int regnum);
121
 
122
/* Register numbers of various important registers.  */
123
 
124
enum i386_regnum
125
{
126
  I386_EAX_REGNUM,              /* %eax */
127
  I386_ECX_REGNUM,              /* %ecx */
128
  I386_EDX_REGNUM,              /* %edx */
129
  I386_EBX_REGNUM,              /* %ebx */
130
  I386_ESP_REGNUM,              /* %esp */
131
  I386_EBP_REGNUM,              /* %ebp */
132
  I386_ESI_REGNUM,              /* %esi */
133
  I386_EDI_REGNUM,              /* %edi */
134
  I386_EIP_REGNUM,              /* %eip */
135
  I386_EFLAGS_REGNUM,           /* %eflags */
136
  I386_CS_REGNUM,               /* %cs */
137
  I386_SS_REGNUM,               /* %ss */
138
  I386_DS_REGNUM,               /* %ds */
139
  I386_ES_REGNUM,               /* %es */
140
  I386_FS_REGNUM,               /* %fs */
141
  I386_GS_REGNUM,               /* %gs */
142
  I386_ST0_REGNUM               /* %st(0) */
143
};
144
 
145
#define I386_NUM_GREGS  16
146
#define I386_NUM_FREGS  16
147
#define I386_NUM_XREGS  9
148
 
149
#define I386_SSE_NUM_REGS       (I386_NUM_GREGS + I386_NUM_FREGS \
150
                                 + I386_NUM_XREGS)
151
 
152
/* Size of the largest register.  */
153
#define I386_MAX_REGISTER_SIZE  16
154
 
155
/* Types for i386-specific registers.  */
156
extern struct type *i386_eflags_type;
157
extern struct type *i386_mxcsr_type;
158
 
159
extern struct type *i386_mmx_type (struct gdbarch *gdbarch);
160
extern struct type *i386_sse_type (struct gdbarch *gdbarch);
161
 
162
/* Segment selectors.  */
163
#define I386_SEL_RPL    0x0003  /* Requester's Privilege Level mask.  */
164
#define I386_SEL_UPL    0x0003  /* User Privilige Level. */
165
#define I386_SEL_KPL    0x0000  /* Kernel Privilige Level. */
166
 
167
/* Functions exported from i386-tdep.c.  */
168
extern CORE_ADDR i386_pe_skip_trampoline_code (CORE_ADDR pc, char *name);
169
 
170
/* Return the name of register REGNUM.  */
171
extern char const *i386_register_name (struct gdbarch * gdbarch, int regnum);
172
 
173
/* Return non-zero if REGNUM is a member of the specified group.  */
174
extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
175
                                     struct reggroup *group);
176
 
177
/* Supply register REGNUM from the general-purpose register set REGSET
178
   to register cache REGCACHE.  If REGNUM is -1, do this for all
179
   registers in REGSET.  */
180
extern void i386_supply_gregset (const struct regset *regset,
181
                                 struct regcache *regcache, int regnum,
182
                                 const void *gregs, size_t len);
183
 
184
/* Collect register REGNUM from the register cache REGCACHE and store
185
   it in the buffer specified by GREGS and LEN as described by the
186
   general-purpose register set REGSET.  If REGNUM is -1, do this for
187
   all registers in REGSET.  */
188
extern void i386_collect_gregset (const struct regset *regset,
189
                                  const struct regcache *regcache,
190
                                  int regnum, void *gregs, size_t len);
191
 
192
/* Return the appropriate register set for the core section identified
193
   by SECT_NAME and SECT_SIZE.  */
194
extern const struct regset *
195
  i386_regset_from_core_section (struct gdbarch *gdbarch,
196
                                 const char *sect_name, size_t sect_size);
197
 
198
/* Initialize a basic ELF architecture variant.  */
199
extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *);
200
 
201
/* Initialize a SVR4 architecture variant.  */
202
extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);
203
 
204
 
205
/* Functions and variables exported from i386bsd-tdep.c.  */
206
 
207
extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
208
extern CORE_ADDR i386fbsd_sigtramp_start_addr;
209
extern CORE_ADDR i386fbsd_sigtramp_end_addr;
210
extern CORE_ADDR i386obsd_sigtramp_start_addr;
211
extern CORE_ADDR i386obsd_sigtramp_end_addr;
212
extern int i386fbsd4_sc_reg_offset[];
213
extern int i386fbsd_sc_reg_offset[];
214
extern int i386nbsd_sc_reg_offset[];
215
extern int i386obsd_sc_reg_offset[];
216
extern int i386bsd_sc_reg_offset[];
217
 
218
#endif /* i386-tdep.h */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.